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spapr/irq: add an 'nr_irq' parameter to initialize the backend.

Browse Source 
When using the 'dual' interrupt mode, the source numbers of both sPAPR
IRQ backends are aligned to share a common IRQ number space and to use
a similar mapping of the machine qemu_irq array which is indexed by
the source number.

The XICS IRQ number range initially being [ 0x1000 - 0x2000 ], this
requires to change the XICS ICSState offset to 0 and to provision for
an extra 4K of source numbers and qemu_irqs which will never be used
by the machine when running under the XICS interrupt mode. This is not
an optimal solution.

Change the init() method to allocate an IRQ number space of the
expected size for the XICS sPAPR IRQ backend. It breaks the interrupt
signaling when under the 'dual' mode because source numbers have
unexpected values but next patch will fix that.

Signed-off-by: Cédric Le Goater <clg@kaod.org>
Message-Id: <20190213210756.27032-2-clg@kaod.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
This commit is contained in:
Cédric Le Goater 2019-02-13 22:07:55 +01:00 committed by David Gibson
parent cc941111a5
commit 2e66cdb715
2 changed files with 11 additions and 9 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

18
hw/ppc/spapr_irq.c
View File

@ -93,10 +93,10 @@ error:
return NULL;
}
static void spapr_irq_init_xics(sPAPRMachineState *spapr, Error **errp)
static void spapr_irq_init_xics(sPAPRMachineState *spapr, int nr_irqs,
Error **errp)
{
MachineState *machine = MACHINE(spapr);
int nr_irqs = spapr->irq->nr_irqs;
Error *local_err = NULL;
if (kvm_enabled()) {
@ -262,7 +262,8 @@ sPAPRIrq spapr_irq_xics = {
/*
* XIVE IRQ backend.
*/
static void spapr_irq_init_xive(sPAPRMachineState *spapr, Error **errp)
static void spapr_irq_init_xive(sPAPRMachineState *spapr, int nr_irqs,
Error **errp)
{
MachineState *machine = MACHINE(spapr);
uint32_t nr_servers = spapr_max_server_number(spapr);
@ -278,7 +279,7 @@ static void spapr_irq_init_xive(sPAPRMachineState *spapr, Error **errp)
}
dev = qdev_create(NULL, TYPE_SPAPR_XIVE);
qdev_prop_set_uint32(dev, "nr-irqs", spapr->irq->nr_irqs);
qdev_prop_set_uint32(dev, "nr-irqs", nr_irqs);
/*
* 8 XIVE END structures per CPU. One for each available priority
*/
@ -435,7 +436,8 @@ static sPAPRIrq *spapr_irq_current(sPAPRMachineState *spapr)
&spapr_irq_xive : &spapr_irq_xics;
}
static void spapr_irq_init_dual(sPAPRMachineState *spapr, Error **errp)
static void spapr_irq_init_dual(sPAPRMachineState *spapr, int nr_irqs,
Error **errp)
{
MachineState *machine = MACHINE(spapr);
Error *local_err = NULL;
@ -445,7 +447,7 @@ static void spapr_irq_init_dual(sPAPRMachineState *spapr, Error **errp)
return;
}
spapr_irq_xics.init(spapr, &local_err);
spapr_irq_xics.init(spapr, spapr_irq_xics.nr_irqs, &local_err);
if (local_err) {
error_propagate(errp, local_err);
return;
@ -462,7 +464,7 @@ static void spapr_irq_init_dual(sPAPRMachineState *spapr, Error **errp)
*/
spapr->ics->offset = 0;
spapr_irq_xive.init(spapr, &local_err);
spapr_irq_xive.init(spapr, spapr_irq_xive.nr_irqs, &local_err);
if (local_err) {
error_propagate(errp, local_err);
return;
@ -618,7 +620,7 @@ void spapr_irq_init(sPAPRMachineState *spapr, Error **errp)
spapr_irq_msi_init(spapr, spapr->irq->nr_msis);
}
spapr->irq->init(spapr, errp);
spapr->irq->init(spapr, spapr->irq->nr_irqs, errp);
spapr->qirqs = qemu_allocate_irqs(spapr->irq->set_irq, spapr,
spapr->irq->nr_irqs);

2
include/hw/ppc/spapr_irq.h
View File

@ -35,7 +35,7 @@ typedef struct sPAPRIrq {
uint32_t nr_msis;
uint8_t ov5;
void (*init)(sPAPRMachineState *spapr, Error **errp);
void (*init)(sPAPRMachineState *spapr, int nr_irqs, Error **errp);
int (*claim)(sPAPRMachineState *spapr, int irq, bool lsi, Error **errp);
void (*free)(sPAPRMachineState *spapr, int irq, int num);
qemu_irq (*qirq)(sPAPRMachineState *spapr, int irq);