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target/s390x: Use tcg_constant_* in translate_vx.c.inc
In most cases, this is a simple local allocate and free replaced by tcg_constant_*. In three cases, a variable temp was initialized with a constant value -- reorg to localize the constant. In gen_acc, this fixes a leak. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Ilya Leoshkevich <iii@linux.ibm.com> Message-Id: <20230220184052.163465-5-richard.henderson@linaro.org> Signed-off-by: Thomas Huth <thuth@redhat.com>
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@ -319,12 +319,10 @@ static void gen_gvec128_4_i64(gen_gvec128_4_i64_fn fn, uint8_t d, uint8_t a,
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static void gen_addi2_i64(TCGv_i64 dl, TCGv_i64 dh, TCGv_i64 al, TCGv_i64 ah,
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uint64_t b)
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{
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TCGv_i64 bl = tcg_const_i64(b);
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TCGv_i64 bh = tcg_const_i64(0);
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TCGv_i64 bl = tcg_constant_i64(b);
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TCGv_i64 bh = tcg_constant_i64(0);
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tcg_gen_add2_i64(dl, dh, al, ah, bl, bh);
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tcg_temp_free_i64(bl);
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tcg_temp_free_i64(bh);
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}
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static DisasJumpType op_vbperm(DisasContext *s, DisasOps *o)
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@ -609,9 +607,8 @@ static DisasJumpType op_vlei(DisasContext *s, DisasOps *o)
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return DISAS_NORETURN;
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}
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tmp = tcg_const_i64((int16_t)get_field(s, i2));
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tmp = tcg_constant_i64((int16_t)get_field(s, i2));
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write_vec_element_i64(tmp, get_field(s, v1), enr, es);
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tcg_temp_free_i64(tmp);
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return DISAS_NEXT;
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}
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@ -1107,11 +1104,13 @@ static DisasJumpType op_vseg(DisasContext *s, DisasOps *o)
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static DisasJumpType op_vst(DisasContext *s, DisasOps *o)
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{
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TCGv_i64 tmp = tcg_const_i64(16);
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TCGv_i64 tmp;
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/* Probe write access before actually modifying memory */
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gen_helper_probe_write_access(cpu_env, o->addr1, tmp);
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gen_helper_probe_write_access(cpu_env, o->addr1,
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tcg_constant_i64(16));
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tmp = tcg_temp_new_i64();
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read_vec_element_i64(tmp, get_field(s, v1), 0, ES_64);
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tcg_gen_qemu_st_i64(tmp, o->addr1, get_mem_index(s), MO_TEUQ);
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gen_addi_and_wrap_i64(s, o->addr1, o->addr1, 8);
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@ -1270,9 +1269,10 @@ static DisasJumpType op_vstm(DisasContext *s, DisasOps *o)
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}
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/* Probe write access before actually modifying memory */
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tmp = tcg_const_i64((v3 - v1 + 1) * 16);
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gen_helper_probe_write_access(cpu_env, o->addr1, tmp);
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gen_helper_probe_write_access(cpu_env, o->addr1,
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tcg_constant_i64((v3 - v1 + 1) * 16));
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tmp = tcg_temp_new_i64();
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for (;; v1++) {
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read_vec_element_i64(tmp, v1, 0, ES_64);
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tcg_gen_qemu_st_i64(tmp, o->addr1, get_mem_index(s), MO_TEUQ);
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@ -1359,7 +1359,7 @@ static DisasJumpType op_va(DisasContext *s, DisasOps *o)
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static void gen_acc(TCGv_i64 d, TCGv_i64 a, TCGv_i64 b, uint8_t es)
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{
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const uint8_t msb_bit_nr = NUM_VEC_ELEMENT_BITS(es) - 1;
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TCGv_i64 msb_mask = tcg_const_i64(dup_const(es, 1ull << msb_bit_nr));
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TCGv_i64 msb_mask = tcg_constant_i64(dup_const(es, 1ull << msb_bit_nr));
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TCGv_i64 t1 = tcg_temp_new_i64();
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TCGv_i64 t2 = tcg_temp_new_i64();
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TCGv_i64 t3 = tcg_temp_new_i64();
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@ -1416,7 +1416,7 @@ static void gen_acc2_i64(TCGv_i64 dl, TCGv_i64 dh, TCGv_i64 al,
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{
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TCGv_i64 th = tcg_temp_new_i64();
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TCGv_i64 tl = tcg_temp_new_i64();
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TCGv_i64 zero = tcg_const_i64(0);
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TCGv_i64 zero = tcg_constant_i64(0);
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tcg_gen_add2_i64(tl, th, al, zero, bl, zero);
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tcg_gen_add2_i64(tl, th, th, zero, ah, zero);
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@ -1425,7 +1425,6 @@ static void gen_acc2_i64(TCGv_i64 dl, TCGv_i64 dh, TCGv_i64 al,
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tcg_temp_free_i64(th);
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tcg_temp_free_i64(tl);
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tcg_temp_free_i64(zero);
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}
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static DisasJumpType op_vacc(DisasContext *s, DisasOps *o)
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@ -1455,15 +1454,14 @@ static void gen_ac2_i64(TCGv_i64 dl, TCGv_i64 dh, TCGv_i64 al, TCGv_i64 ah,
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TCGv_i64 bl, TCGv_i64 bh, TCGv_i64 cl, TCGv_i64 ch)
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{
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TCGv_i64 tl = tcg_temp_new_i64();
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TCGv_i64 th = tcg_const_i64(0);
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TCGv_i64 zero = tcg_constant_i64(0);
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/* extract the carry only */
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tcg_gen_extract_i64(tl, cl, 0, 1);
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tcg_gen_add2_i64(dl, dh, al, ah, bl, bh);
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tcg_gen_add2_i64(dl, dh, dl, dh, tl, th);
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tcg_gen_add2_i64(dl, dh, dl, dh, tl, zero);
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tcg_temp_free_i64(tl);
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tcg_temp_free_i64(th);
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}
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static DisasJumpType op_vac(DisasContext *s, DisasOps *o)
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@ -1484,7 +1482,7 @@ static void gen_accc2_i64(TCGv_i64 dl, TCGv_i64 dh, TCGv_i64 al, TCGv_i64 ah,
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{
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TCGv_i64 tl = tcg_temp_new_i64();
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TCGv_i64 th = tcg_temp_new_i64();
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TCGv_i64 zero = tcg_const_i64(0);
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TCGv_i64 zero = tcg_constant_i64(0);
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tcg_gen_andi_i64(tl, cl, 1);
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tcg_gen_add2_i64(tl, th, tl, zero, al, zero);
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@ -1495,7 +1493,6 @@ static void gen_accc2_i64(TCGv_i64 dl, TCGv_i64 dh, TCGv_i64 al, TCGv_i64 ah,
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tcg_temp_free_i64(tl);
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tcg_temp_free_i64(th);
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tcg_temp_free_i64(zero);
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}
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static DisasJumpType op_vaccc(DisasContext *s, DisasOps *o)
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@ -1597,14 +1594,13 @@ static void gen_avgl_i32(TCGv_i32 d, TCGv_i32 a, TCGv_i32 b)
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static void gen_avgl_i64(TCGv_i64 dl, TCGv_i64 al, TCGv_i64 bl)
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{
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TCGv_i64 dh = tcg_temp_new_i64();
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TCGv_i64 zero = tcg_const_i64(0);
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TCGv_i64 zero = tcg_constant_i64(0);
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tcg_gen_add2_i64(dl, dh, al, zero, bl, zero);
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gen_addi2_i64(dl, dh, dl, dh, 1);
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tcg_gen_extract2_i64(dl, dl, dh, 1);
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tcg_temp_free_i64(dh);
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tcg_temp_free_i64(zero);
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}
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static DisasJumpType op_vavgl(DisasContext *s, DisasOps *o)
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@ -2440,7 +2436,7 @@ static void gen_scbi2_i64(TCGv_i64 dl, TCGv_i64 dh, TCGv_i64 al,
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{
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TCGv_i64 th = tcg_temp_new_i64();
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TCGv_i64 tl = tcg_temp_new_i64();
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TCGv_i64 zero = tcg_const_i64(0);
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TCGv_i64 zero = tcg_constant_i64(0);
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tcg_gen_sub2_i64(tl, th, al, zero, bl, zero);
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tcg_gen_andi_i64(th, th, 1);
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@ -2452,7 +2448,6 @@ static void gen_scbi2_i64(TCGv_i64 dl, TCGv_i64 dh, TCGv_i64 al,
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tcg_temp_free_i64(th);
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tcg_temp_free_i64(tl);
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tcg_temp_free_i64(zero);
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}
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static DisasJumpType op_vscbi(DisasContext *s, DisasOps *o)
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@ -2572,11 +2567,12 @@ static DisasJumpType op_vsumq(DisasContext *s, DisasOps *o)
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return DISAS_NORETURN;
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}
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sumh = tcg_const_i64(0);
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sumh = tcg_temp_new_i64();
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suml = tcg_temp_new_i64();
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zero = tcg_const_i64(0);
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zero = tcg_constant_i64(0);
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tmpl = tcg_temp_new_i64();
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tcg_gen_mov_i64(sumh, zero);
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read_vec_element_i64(suml, get_field(s, v3), max_idx, es);
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for (idx = 0; idx <= max_idx; idx++) {
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read_vec_element_i64(tmpl, get_field(s, v2), idx, es);
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@ -2587,7 +2583,6 @@ static DisasJumpType op_vsumq(DisasContext *s, DisasOps *o)
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tcg_temp_free_i64(sumh);
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tcg_temp_free_i64(suml);
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tcg_temp_free_i64(zero);
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tcg_temp_free_i64(tmpl);
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return DISAS_NEXT;
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}
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