mirrors/qemu
0
0
Fork 0
mirror of https://github.com/qemu/qemu.git synced 2024-12-04 01:03:38 +08:00
Code Issues Packages Projects Releases Wiki Activity

target/arm/sme: Introduce aarch64_set_svcr()

Browse Source 
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Fabiano Rosas <farosas@suse.de>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-id: 20230112102436.1913-4-philmd@linaro.org
Message-Id: <20230112004322.161330-1-richard.henderson@linaro.org>
[PMD: Split patch in multiple tiny steps]
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Richard Henderson 2023-01-12 11:24:32 +01:00 committed by Peter Maydell
parent 3c9ee54894
commit 2a8af38259
5 changed files with 13 additions and 4 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
linux-user/aarch64/cpu_loop.c
View File

@ -93,8 +93,8 @@ void cpu_loop(CPUARMState *env)
* On syscall, PSTATE.ZA is preserved, along with the ZA matrix. * On syscall, PSTATE.ZA is preserved, along with the ZA matrix.
* PSTATE.SM is cleared, per SMSTOP, which does ResetSVEState. * PSTATE.SM is cleared, per SMSTOP, which does ResetSVEState.
*/ */
aarch64_set_svcr(env, 0, R_SVCR_SM_MASK);
if (FIELD_EX64(env->svcr, SVCR, SM)) { if (FIELD_EX64(env->svcr, SVCR, SM)) {
env->svcr = FIELD_DP64(env->svcr, SVCR, SM, 0);
arm_rebuild_hflags(env); arm_rebuild_hflags(env);
arm_reset_sve_state(env); arm_reset_sve_state(env);
} }

2
linux-user/aarch64/signal.c
View File

@ -669,11 +669,11 @@ static void target_setup_frame(int usig, struct target_sigaction *ka,
* Invoke the signal handler with both SM and ZA disabled. * Invoke the signal handler with both SM and ZA disabled.
* When clearing SM, ResetSVEState, per SMSTOP. * When clearing SM, ResetSVEState, per SMSTOP.
*/ */
aarch64_set_svcr(env, 0, R_SVCR_SM_MASK | R_SVCR_ZA_MASK);
if (FIELD_EX64(env->svcr, SVCR, SM)) { if (FIELD_EX64(env->svcr, SVCR, SM)) {
arm_reset_sve_state(env); arm_reset_sve_state(env);
} }
if (env->svcr) { if (env->svcr) {
env->svcr = 0;
arm_rebuild_hflags(env); arm_rebuild_hflags(env);
} }

1
target/arm/cpu.h
View File

@ -1123,6 +1123,7 @@ int aarch64_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
void aarch64_sve_narrow_vq(CPUARMState *env, unsigned vq); void aarch64_sve_narrow_vq(CPUARMState *env, unsigned vq);
void aarch64_sve_change_el(CPUARMState *env, int old_el, void aarch64_sve_change_el(CPUARMState *env, int old_el,
int new_el, bool el0_a64); int new_el, bool el0_a64);
void aarch64_set_svcr(CPUARMState *env, uint64_t new, uint64_t mask);
void arm_reset_sve_state(CPUARMState *env); void arm_reset_sve_state(CPUARMState *env);
/* /*

8
target/arm/helper.c
View File

@ -6725,11 +6725,19 @@ static CPAccessResult access_esm(CPUARMState *env, const ARMCPRegInfo *ri,
return CP_ACCESS_OK; return CP_ACCESS_OK;
} }
void aarch64_set_svcr(CPUARMState *env, uint64_t new, uint64_t mask)
{
uint64_t change = (env->svcr ^ new) & mask;
env->svcr ^= change;
}
static void svcr_write(CPUARMState *env, const ARMCPRegInfo *ri, static void svcr_write(CPUARMState *env, const ARMCPRegInfo *ri,
uint64_t value) uint64_t value)
{ {
helper_set_pstate_sm(env, FIELD_EX64(value, SVCR, SM)); helper_set_pstate_sm(env, FIELD_EX64(value, SVCR, SM));
helper_set_pstate_za(env, FIELD_EX64(value, SVCR, ZA)); helper_set_pstate_za(env, FIELD_EX64(value, SVCR, ZA));
aarch64_set_svcr(env, value, -1);
arm_rebuild_hflags(env); arm_rebuild_hflags(env);
} }

4
target/arm/sme_helper.c
View File

@ -43,7 +43,7 @@ void helper_set_pstate_sm(CPUARMState *env, uint32_t i)
if (i == FIELD_EX64(env->svcr, SVCR, SM)) { if (i == FIELD_EX64(env->svcr, SVCR, SM)) {
return; return;
} }
env->svcr ^= R_SVCR_SM_MASK; aarch64_set_svcr(env, 0, R_SVCR_SM_MASK);
arm_reset_sve_state(env); arm_reset_sve_state(env);
arm_rebuild_hflags(env); arm_rebuild_hflags(env);
} }
@ -53,7 +53,7 @@ void helper_set_pstate_za(CPUARMState *env, uint32_t i)
if (i == FIELD_EX64(env->svcr, SVCR, ZA)) { if (i == FIELD_EX64(env->svcr, SVCR, ZA)) {
return; return;
} }
env->svcr ^= R_SVCR_ZA_MASK; aarch64_set_svcr(env, 0, R_SVCR_ZA_MASK);
/* /*
* ResetSMEState. * ResetSMEState.