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MIPS patches queue

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- Fix invalid Kconfig dependency
 - Fix missing migrated value
 - Fix TCG temporary leak
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Merge remote-tracking branch 'remotes/philmd/tags/mips-20210413' into staging

MIPS patches queue

- Fix invalid Kconfig dependency
- Fix missing migrated value
- Fix TCG temporary leak

# gpg: Signature made Tue 13 Apr 2021 11:10:11 BST
# gpg:                using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE
# gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full]
# Primary key fingerprint: FAAB E75E 1291 7221 DCFD  6BB2 E3E3 2C2C DEAD C0DE

* remotes/philmd/tags/mips-20210413:
  target/mips: Fix TCG temporary leak in gen_cache_operation()
  hw/isa/piix4: Migrate Reset Control Register
  hw/isa/Kconfig: Add missing dependency VIA VT82C686 -> APM

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Peter Maydell 2021-04-13 14:32:44 +01:00
commit 2935f6f2c1
3 changed files with 17 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
hw/isa/Kconfig
View File

@ -48,6 +48,7 @@ config VT82C686
select SERIAL_ISA
select FDC
select USB_UHCI
select APM
config SMC37C669
bool

15
hw/isa/piix4.c
View File

@ -93,12 +93,25 @@ static void piix4_isa_reset(DeviceState *dev)
pci_conf[0xae] = 0x00;
}
static int piix4_ide_post_load(void *opaque, int version_id)
{
PIIX4State *s = opaque;
if (version_id == 2) {
s->rcr = 0;
}
return 0;
}
static const VMStateDescription vmstate_piix4 = {
.name = "PIIX4",
.version_id = 2,
.version_id = 3,
.minimum_version_id = 2,
.post_load = piix4_ide_post_load,
.fields = (VMStateField[]) {
VMSTATE_PCI_DEVICE(dev, PIIX4State),
VMSTATE_UINT8_V(rcr, PIIX4State, 3),
VMSTATE_END_OF_LIST()
}
};

2
target/mips/translate.c
View File

@ -12804,6 +12804,8 @@ static void gen_cache_operation(DisasContext *ctx, uint32_t op, int base,
TCGv t1 = tcg_temp_new();
gen_base_offset_addr(ctx, t1, base, offset);
gen_helper_cache(cpu_env, t1, t0);
tcg_temp_free(t1);
tcg_temp_free_i32(t0);
}
#if defined(TARGET_MIPS64)