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hw/isa/piix: Reuse PIIX3 base class' realize method in PIIX4

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Resolves duplicate code. Also makes PIIX4 respect the PIIX3 properties which get
added, too. This allows for using PIIX4 in the PC machine.

Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Message-Id: <20231007123843.127151-25-shentey@gmail.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
This commit is contained in:
Bernhard Beschow 2023-10-07 14:38:32 +02:00 committed by Michael S. Tsirkin
parent 7d6f26594b
commit 2922dbc28c
2 changed files with 12 additions and 73 deletions
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80
hw/isa/piix.c
View File

@ -315,7 +315,8 @@ static const MemoryRegionOps rcr_ops = {
},
};
static void pci_piix3_realize(PCIDevice *dev, Error **errp)
static void pci_piix_realize(PCIDevice *dev, const char *uhci_type,
Error **errp)
{
PIIXState *d = PIIX_PCI_DEVICE(dev);
PCIBus *pci_bus = pci_get_bus(dev);
@ -374,8 +375,7 @@ static void pci_piix3_realize(PCIDevice *dev, Error **errp)
/* USB */
if (d->has_usb) {
object_initialize_child(OBJECT(dev), "uhci", &d->uhci,
TYPE_PIIX3_USB_UHCI);
object_initialize_child(OBJECT(dev), "uhci", &d->uhci, uhci_type);
qdev_prop_set_int32(DEVICE(&d->uhci), "addr", dev->devfn + 2);
if (!qdev_realize(DEVICE(&d->uhci), BUS(pci_bus), errp)) {
return;
@ -426,7 +426,7 @@ static void pci_piix_init(Object *obj)
object_initialize_child(obj, "rtc", &d->rtc, TYPE_MC146818_RTC);
}
static Property pci_piix3_props[] = {
static Property pci_piix_props[] = {
DEFINE_PROP_UINT32("smb_io_base", PIIXState, smb_io_base, 0),
DEFINE_PROP_BOOL("has-acpi", PIIXState, has_acpi, true),
DEFINE_PROP_BOOL("has-pic", PIIXState, has_pic, true),
@ -452,6 +452,7 @@ static void pci_piix_class_init(ObjectClass *klass, void *data)
* pc_piix.c's pc_init1()
*/
dc->user_creatable = false;
device_class_set_props(dc, pci_piix_props);
adevc->build_dev_aml = build_pci_isa_aml;
}
@ -475,7 +476,7 @@ static void piix3_realize(PCIDevice *dev, Error **errp)
PIIXState *piix3 = PIIX_PCI_DEVICE(dev);
PCIBus *pci_bus = pci_get_bus(dev);
pci_piix3_realize(dev, errp);
pci_piix_realize(dev, TYPE_PIIX3_USB_UHCI, errp);
if (*errp) {
return;
}
@ -501,7 +502,6 @@ static void piix3_class_init(ObjectClass *klass, void *data)
/* 82371SB PIIX3 PCI-to-ISA bridge (Step A1) */
k->device_id = PCI_DEVICE_ID_INTEL_82371SB_0;
dc->vmsd = &vmstate_piix3;
device_class_set_props(dc, pci_piix3_props);
}
static const TypeInfo piix3_info = {
@ -513,72 +513,15 @@ static const TypeInfo piix3_info = {
static void piix4_realize(PCIDevice *dev, Error **errp)
{
ERRP_GUARD();
PIIXState *s = PIIX_PCI_DEVICE(dev);
PCIBus *pci_bus = pci_get_bus(dev);
ISABus *isa_bus;
qemu_irq *i8259_out_irq;
qemu_irq *i8259;
size_t i;
isa_bus = isa_bus_new(DEVICE(dev), pci_address_space(dev),
pci_address_space_io(dev), errp);
if (!isa_bus) {
pci_piix_realize(dev, TYPE_PIIX4_USB_UHCI, errp);
if (*errp) {
return;
}
qdev_init_gpio_out_named(DEVICE(dev), &s->cpu_intr,
"intr", 1);
memory_region_init_io(&s->rcr_mem, OBJECT(dev), &rcr_ops, s,
"piix-reset-control", 1);
memory_region_add_subregion_overlap(pci_address_space_io(dev),
PIIX_RCR_IOPORT, &s->rcr_mem, 1);
/* initialize i8259 pic */
i8259_out_irq = qemu_allocate_irqs(piix_request_i8259_irq, s, 1);
i8259 = i8259_init(isa_bus, *i8259_out_irq);
for (i = 0; i < ISA_NUM_IRQS; i++) {
s->isa_irqs_in[i] = i8259[i];
}
g_free(i8259);
/* initialize ISA irqs */
isa_bus_register_input_irqs(isa_bus, s->isa_irqs_in);
/* initialize pit */
i8254_pit_init(isa_bus, 0x40, 0, NULL);
/* DMA */
i8257_dma_init(isa_bus, 0);
/* RTC */
qdev_prop_set_int32(DEVICE(&s->rtc), "base_year", 2000);
if (!qdev_realize(DEVICE(&s->rtc), BUS(isa_bus), errp)) {
return;
}
s->rtc.irq = isa_get_irq(ISA_DEVICE(&s->rtc), s->rtc.isairq);
/* IDE */
qdev_prop_set_int32(DEVICE(&s->ide), "addr", dev->devfn + 1);
if (!qdev_realize(DEVICE(&s->ide), BUS(pci_bus), errp)) {
return;
}
/* USB */
qdev_prop_set_int32(DEVICE(&s->uhci), "addr", dev->devfn + 2);
if (!qdev_realize(DEVICE(&s->uhci), BUS(pci_bus), errp)) {
return;
}
/* ACPI controller */
qdev_prop_set_int32(DEVICE(&s->pm), "addr", dev->devfn + 3);
if (!qdev_realize(DEVICE(&s->pm), BUS(pci_bus), errp)) {
return;
}
qdev_connect_gpio_out(DEVICE(&s->pm), 0, s->isa_irqs_in[9]);
pci_bus_irqs(pci_bus, piix4_set_irq, s, PIIX_NUM_PIRQS);
}
@ -587,11 +530,6 @@ static void piix4_init(Object *obj)
PIIXState *s = PIIX_PCI_DEVICE(obj);
object_initialize_child(obj, "ide", &s->ide, TYPE_PIIX4_IDE);
object_initialize_child(obj, "uhci", &s->uhci, TYPE_PIIX4_USB_UHCI);
object_initialize_child(obj, "pm", &s->pm, TYPE_PIIX4_PM);
qdev_prop_set_uint32(DEVICE(&s->pm), "smb_io_base", 0x1100);
qdev_prop_set_bit(DEVICE(&s->pm), "smm-enabled", 0);
}
static void piix4_class_init(ObjectClass *klass, void *data)

5
hw/mips/malta.c
View File

@ -1238,8 +1238,9 @@ void mips_malta_init(MachineState *machine)
pci_bus_map_irqs(pci_bus, malta_pci_slot_get_pirq);
/* Southbridge */
piix4 = pci_create_simple_multifunction(pci_bus, PIIX4_PCI_DEVFN,
TYPE_PIIX4_PCI_DEVICE);
piix4 = pci_new_multifunction(PIIX4_PCI_DEVFN, TYPE_PIIX4_PCI_DEVICE);
qdev_prop_set_uint32(DEVICE(piix4), "smb_io_base", 0x1100);
pci_realize_and_unref(piix4, pci_bus, &error_fatal);
isa_bus = ISA_BUS(qdev_get_child_bus(DEVICE(piix4), "isa.0"));
dev = DEVICE(object_resolve_path_component(OBJECT(piix4), "ide"));