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target/arm: Replace MTEDESC ESIZE+TSIZE with SIZEM1
After recent changes, mte_checkN does not use ESIZE, and mte_check1 never used TSIZE. We can combine the two into a single field: SIZEM1. Choose to pass size - 1 because size == 0 is never used, our immediate need in mte_probe_int is for the address of the last byte (ptr + size - 1), and since almost all operations are powers of 2, this makes the immediate constant one bit smaller. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20210416183106.1516563-6-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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@ -26,6 +26,7 @@
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#define TARGET_ARM_INTERNALS_H
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#include "hw/registerfields.h"
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#include "tcg/tcg-gvec-desc.h"
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#include "syndrome.h"
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/* register banks for CPU modes */
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@ -1142,8 +1143,7 @@ FIELD(MTEDESC, MIDX, 0, 4)
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FIELD(MTEDESC, TBI, 4, 2)
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FIELD(MTEDESC, TCMA, 6, 2)
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FIELD(MTEDESC, WRITE, 8, 1)
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FIELD(MTEDESC, ESIZE, 9, 5)
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FIELD(MTEDESC, TSIZE, 14, 10) /* mte_checkN only */
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FIELD(MTEDESC, SIZEM1, 9, SIMD_DATA_BITS - 9) /* size - 1 */
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bool mte_probe1(CPUARMState *env, uint32_t desc, uint64_t ptr);
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uint64_t mte_check1(CPUARMState *env, uint32_t desc,
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@ -692,13 +692,13 @@ static int checkN(uint8_t *mem, int odd, int cmp, int count)
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* Return positive on success with tbi enabled.
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*/
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static int mte_probe_int(CPUARMState *env, uint32_t desc, uint64_t ptr,
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uintptr_t ra, uint32_t total, uint64_t *fault)
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uintptr_t ra, uint64_t *fault)
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{
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int mmu_idx, ptr_tag, bit55;
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uint64_t ptr_last, prev_page, next_page;
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uint64_t tag_first, tag_last;
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uint64_t tag_byte_first, tag_byte_last;
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uint32_t tag_count, tag_size, n, c;
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uint32_t sizem1, tag_count, tag_size, n, c;
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uint8_t *mem1, *mem2;
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MMUAccessType type;
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@ -718,9 +718,10 @@ static int mte_probe_int(CPUARMState *env, uint32_t desc, uint64_t ptr,
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mmu_idx = FIELD_EX32(desc, MTEDESC, MIDX);
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type = FIELD_EX32(desc, MTEDESC, WRITE) ? MMU_DATA_STORE : MMU_DATA_LOAD;
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sizem1 = FIELD_EX32(desc, MTEDESC, SIZEM1);
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/* Find the addr of the end of the access */
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ptr_last = ptr + total - 1;
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ptr_last = ptr + sizem1;
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/* Round the bounds to the tag granule, and compute the number of tags. */
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tag_first = QEMU_ALIGN_DOWN(ptr, TAG_GRANULE);
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@ -738,7 +739,7 @@ static int mte_probe_int(CPUARMState *env, uint32_t desc, uint64_t ptr,
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if (likely(tag_last - prev_page <= TARGET_PAGE_SIZE)) {
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/* Memory access stays on one page. */
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tag_size = ((tag_byte_last - tag_byte_first) / (2 * TAG_GRANULE)) + 1;
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mem1 = allocation_tag_mem(env, mmu_idx, ptr, type, total,
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mem1 = allocation_tag_mem(env, mmu_idx, ptr, type, sizem1 + 1,
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MMU_DATA_LOAD, tag_size, ra);
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if (!mem1) {
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return 1;
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@ -792,8 +793,7 @@ uint64_t mte_checkN(CPUARMState *env, uint32_t desc,
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uint64_t ptr, uintptr_t ra)
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{
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uint64_t fault;
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uint32_t total = FIELD_EX32(desc, MTEDESC, TSIZE);
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int ret = mte_probe_int(env, desc, ptr, ra, total, &fault);
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int ret = mte_probe_int(env, desc, ptr, ra, &fault);
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if (unlikely(ret == 0)) {
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mte_check_fail(env, desc, fault, ra);
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@ -812,8 +812,7 @@ uint64_t mte_check1(CPUARMState *env, uint32_t desc,
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uint64_t ptr, uintptr_t ra)
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{
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uint64_t fault;
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uint32_t total = FIELD_EX32(desc, MTEDESC, ESIZE);
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int ret = mte_probe_int(env, desc, ptr, ra, total, &fault);
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int ret = mte_probe_int(env, desc, ptr, ra, &fault);
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if (unlikely(ret == 0)) {
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mte_check_fail(env, desc, fault, ra);
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@ -837,8 +836,7 @@ uint64_t HELPER(mte_check1)(CPUARMState *env, uint32_t desc, uint64_t ptr)
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bool mte_probe1(CPUARMState *env, uint32_t desc, uint64_t ptr)
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{
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uint64_t fault;
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uint32_t total = FIELD_EX32(desc, MTEDESC, ESIZE);
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int ret = mte_probe_int(env, desc, ptr, 0, total, &fault);
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int ret = mte_probe_int(env, desc, ptr, 0, &fault);
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return ret != 0;
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}
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@ -272,7 +272,7 @@ static TCGv_i64 gen_mte_check1_mmuidx(DisasContext *s, TCGv_i64 addr,
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desc = FIELD_DP32(desc, MTEDESC, TBI, s->tbid);
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desc = FIELD_DP32(desc, MTEDESC, TCMA, s->tcma);
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desc = FIELD_DP32(desc, MTEDESC, WRITE, is_write);
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desc = FIELD_DP32(desc, MTEDESC, ESIZE, 1 << log2_size);
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desc = FIELD_DP32(desc, MTEDESC, SIZEM1, (1 << log2_size) - 1);
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tcg_desc = tcg_const_i32(desc);
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ret = new_tmp_a64(s);
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@ -306,8 +306,7 @@ TCGv_i64 gen_mte_checkN(DisasContext *s, TCGv_i64 addr, bool is_write,
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desc = FIELD_DP32(desc, MTEDESC, TBI, s->tbid);
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desc = FIELD_DP32(desc, MTEDESC, TCMA, s->tcma);
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desc = FIELD_DP32(desc, MTEDESC, WRITE, is_write);
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desc = FIELD_DP32(desc, MTEDESC, ESIZE, 1 << log2_esize);
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desc = FIELD_DP32(desc, MTEDESC, TSIZE, total_size);
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desc = FIELD_DP32(desc, MTEDESC, SIZEM1, total_size - 1);
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tcg_desc = tcg_const_i32(desc);
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ret = new_tmp_a64(s);
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@ -4509,8 +4509,7 @@ static void do_mem_zpa(DisasContext *s, int zt, int pg, TCGv_i64 addr,
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desc = FIELD_DP32(desc, MTEDESC, TBI, s->tbid);
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desc = FIELD_DP32(desc, MTEDESC, TCMA, s->tcma);
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desc = FIELD_DP32(desc, MTEDESC, WRITE, is_write);
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desc = FIELD_DP32(desc, MTEDESC, ESIZE, 1 << msz);
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desc = FIELD_DP32(desc, MTEDESC, TSIZE, mte_n << msz);
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desc = FIELD_DP32(desc, MTEDESC, SIZEM1, (mte_n << msz) - 1);
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desc <<= SVE_MTEDESC_SHIFT;
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} else {
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addr = clean_data_tbi(s, addr);
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@ -5189,7 +5188,7 @@ static void do_mem_zpz(DisasContext *s, int zt, int pg, int zm,
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desc = FIELD_DP32(desc, MTEDESC, TBI, s->tbid);
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desc = FIELD_DP32(desc, MTEDESC, TCMA, s->tcma);
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desc = FIELD_DP32(desc, MTEDESC, WRITE, is_write);
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desc = FIELD_DP32(desc, MTEDESC, ESIZE, 1 << msz);
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desc = FIELD_DP32(desc, MTEDESC, SIZEM1, (1 << msz) - 1);
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desc <<= SVE_MTEDESC_SHIFT;
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}
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desc = simd_desc(vsz, vsz, desc | scale);
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