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target-m68k: introduce read_imXX() functions
Read a 8, 16 or 32bit immediat constant. An immediate constant is stored in the instruction opcode and can be in one or two extension words. Signed-off-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Richard Henderson <rth@twiddle.net>
This commit is contained in:
Laurent Vivier
parent
d8633620a1
commit
28b68cd79e
@ -268,14 +268,27 @@ static TCGv gen_ldst(DisasContext *s, int opsize, TCGv addr, TCGv val,
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}
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}
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/* Read a 16-bit immediate constant */
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static inline uint16_t read_im16(CPUM68KState *env, DisasContext *s)
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{
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uint16_t im;
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im = cpu_lduw_code(env, s->pc);
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s->pc += 2;
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return im;
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}
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/* Read an 8-bit immediate constant */
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static inline uint8_t read_im8(CPUM68KState *env, DisasContext *s)
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{
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return read_im16(env, s);
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}
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/* Read a 32-bit immediate constant. */
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static inline uint32_t read_im32(CPUM68KState *env, DisasContext *s)
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{
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uint32_t im;
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im = ((uint32_t)cpu_lduw_code(env, s->pc)) << 16;
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s->pc += 2;
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im |= cpu_lduw_code(env, s->pc);
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s->pc += 2;
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im = read_im16(env, s) << 16;
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im |= 0xffff & read_im16(env, s);
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return im;
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}
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@ -309,8 +322,7 @@ static TCGv gen_lea_indexed(CPUM68KState *env, DisasContext *s, TCGv base)
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uint32_t bd, od;
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offset = s->pc;
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ext = cpu_lduw_code(env, s->pc);
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s->pc += 2;
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ext = read_im16(env, s);
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if ((ext & 0x800) == 0 && !m68k_feature(s->env, M68K_FEATURE_WORD_INDEX))
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return NULL_QREG;
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@ -328,8 +340,7 @@ static TCGv gen_lea_indexed(CPUM68KState *env, DisasContext *s, TCGv base)
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if ((ext & 0x30) > 0x10) {
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/* base displacement */
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if ((ext & 0x30) == 0x20) {
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bd = (int16_t)cpu_lduw_code(env, s->pc);
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s->pc += 2;
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bd = (int16_t)read_im16(env, s);
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} else {
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bd = read_im32(env, s);
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}
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@ -377,8 +388,7 @@ static TCGv gen_lea_indexed(CPUM68KState *env, DisasContext *s, TCGv base)
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if ((ext & 3) > 1) {
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/* outer displacement */
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if ((ext & 3) == 2) {
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od = (int16_t)cpu_lduw_code(env, s->pc);
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s->pc += 2;
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od = (int16_t)read_im16(env, s);
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} else {
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od = read_im32(env, s);
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}
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@ -530,8 +540,7 @@ static TCGv gen_lea(CPUM68KState *env, DisasContext *s, uint16_t insn,
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case 5: /* Indirect displacement. */
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reg = AREG(insn, 0);
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tmp = tcg_temp_new();
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ext = cpu_lduw_code(env, s->pc);
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s->pc += 2;
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ext = read_im16(env, s);
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tcg_gen_addi_i32(tmp, reg, (int16_t)ext);
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return tmp;
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case 6: /* Indirect index + displacement. */
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@ -540,16 +549,14 @@ static TCGv gen_lea(CPUM68KState *env, DisasContext *s, uint16_t insn,
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case 7: /* Other */
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switch (insn & 7) {
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case 0: /* Absolute short. */
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offset = cpu_ldsw_code(env, s->pc);
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s->pc += 2;
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offset = (int16_t)read_im16(env, s);
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return tcg_const_i32(offset);
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case 1: /* Absolute long. */
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offset = read_im32(env, s);
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return tcg_const_i32(offset);
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case 2: /* pc displacement */
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offset = s->pc;
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offset += cpu_ldsw_code(env, s->pc);
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s->pc += 2;
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offset += (int16_t)read_im16(env, s);
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return tcg_const_i32(offset);
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case 3: /* pc index+displacement. */
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return gen_lea_indexed(env, s, NULL_QREG);
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@ -656,19 +663,17 @@ static TCGv gen_ea(CPUM68KState *env, DisasContext *s, uint16_t insn,
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switch (opsize) {
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case OS_BYTE:
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if (what == EA_LOADS) {
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offset = cpu_ldsb_code(env, s->pc + 1);
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offset = (int8_t)read_im8(env, s);
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} else {
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offset = cpu_ldub_code(env, s->pc + 1);
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offset = read_im8(env, s);
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}
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s->pc += 2;
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break;
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case OS_WORD:
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if (what == EA_LOADS) {
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offset = cpu_ldsw_code(env, s->pc);
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offset = (int16_t)read_im16(env, s);
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} else {
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offset = cpu_lduw_code(env, s->pc);
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offset = read_im16(env, s);
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}
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s->pc += 2;
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break;
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case OS_LONG:
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offset = read_im32(env, s);
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@ -961,8 +966,7 @@ DISAS_INSN(divl)
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TCGv reg;
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uint16_t ext;
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ext = cpu_lduw_code(env, s->pc);
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s->pc += 2;
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ext = read_im16(env, s);
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if (ext & 0x87f8) {
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gen_exception(s, s->pc - 4, EXCP_UNSUPPORTED);
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return;
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@ -1113,8 +1117,7 @@ DISAS_INSN(movem)
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TCGv tmp;
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int is_load;
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mask = cpu_lduw_code(env, s->pc);
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s->pc += 2;
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mask = read_im16(env, s);
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tmp = gen_lea(env, s, insn, OS_LONG);
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if (IS_NULL_QREG(tmp)) {
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gen_addr_fault(s);
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@ -1157,8 +1160,7 @@ DISAS_INSN(bitop_im)
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opsize = OS_LONG;
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op = (insn >> 6) & 3;
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bitnum = cpu_lduw_code(env, s->pc);
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s->pc += 2;
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bitnum = read_im16(env, s);
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if (bitnum & 0xff00) {
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disas_undef(env, s, insn);
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return;
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@ -1411,8 +1413,7 @@ static void gen_set_sr(CPUM68KState *env, DisasContext *s, uint16_t insn,
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else if ((insn & 0x3f) == 0x3c)
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{
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uint16_t val;
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val = cpu_lduw_code(env, s->pc);
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s->pc += 2;
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val = read_im16(env, s);
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gen_set_sr_im(s, val, ccr_only);
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}
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else
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@ -1535,8 +1536,7 @@ DISAS_INSN(mull)
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/* The upper 32 bits of the product are discarded, so
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muls.l and mulu.l are functionally equivalent. */
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ext = cpu_lduw_code(env, s->pc);
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s->pc += 2;
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ext = read_im16(env, s);
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if (ext & 0x87ff) {
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gen_exception(s, s->pc - 4, EXCP_UNSUPPORTED);
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return;
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@ -1677,8 +1677,7 @@ DISAS_INSN(branch)
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op = (insn >> 8) & 0xf;
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offset = (int8_t)insn;
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if (offset == 0) {
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offset = cpu_ldsw_code(env, s->pc);
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s->pc += 2;
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offset = (int16_t)read_im16(env, s);
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} else if (offset == -1) {
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offset = read_im32(env, s);
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}
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@ -1962,14 +1961,12 @@ DISAS_INSN(strldsr)
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uint32_t addr;
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addr = s->pc - 2;
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ext = cpu_lduw_code(env, s->pc);
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s->pc += 2;
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ext = read_im16(env, s);
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if (ext != 0x46FC) {
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gen_exception(s, addr, EXCP_UNSUPPORTED);
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return;
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}
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ext = cpu_lduw_code(env, s->pc);
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s->pc += 2;
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ext = read_im16(env, s);
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if (IS_USER(s) || (ext & SR_S) == 0) {
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gen_exception(s, addr, EXCP_PRIVILEGE);
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return;
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@ -2036,8 +2033,7 @@ DISAS_INSN(stop)
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return;
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}
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ext = cpu_lduw_code(env, s->pc);
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s->pc += 2;
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ext = read_im16(env, s);
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gen_set_sr_im(s, ext, 0);
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tcg_gen_movi_i32(cpu_halted, 1);
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@ -2063,8 +2059,7 @@ DISAS_INSN(movec)
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return;
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}
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ext = cpu_lduw_code(env, s->pc);
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s->pc += 2;
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ext = read_im16(env, s);
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if (ext & 0x8000) {
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reg = AREG(ext, 12);
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@ -2130,8 +2125,7 @@ DISAS_INSN(fpu)
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int set_dest;
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int opsize;
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ext = cpu_lduw_code(env, s->pc);
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s->pc += 2;
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ext = read_im16(env, s);
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opmode = ext & 0x7f;
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switch ((ext >> 13) & 7) {
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case 0: case 2:
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@ -2413,8 +2407,7 @@ DISAS_INSN(fbcc)
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offset = cpu_ldsw_code(env, s->pc);
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s->pc += 2;
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if (insn & (1 << 6)) {
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offset = (offset << 16) | cpu_lduw_code(env, s->pc);
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s->pc += 2;
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offset = (offset << 16) | read_im16(env, s);
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}
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l1 = gen_new_label();
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@ -2539,8 +2532,7 @@ DISAS_INSN(mac)
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s->done_mac = 1;
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}
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ext = cpu_lduw_code(env, s->pc);
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s->pc += 2;
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ext = read_im16(env, s);
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acc = ((insn >> 7) & 1) | ((ext >> 3) & 2);
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dual = ((insn & 0x30) != 0 && (ext & 3) != 0);
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@ -3011,8 +3003,7 @@ static void disas_m68k_insn(CPUM68KState * env, DisasContext *s)
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{
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uint16_t insn;
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insn = cpu_lduw_code(env, s->pc);
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s->pc += 2;
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insn = read_im16(env, s);
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opcode_table[insn](env, s, insn);
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}
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