mirror of
https://github.com/qemu/qemu.git
synced 2024-11-24 03:13:44 +08:00
Add GEN_VXFORM_UIMM macro for subsequent instructions.
Signed-off-by: Nathan Froyd <froydnj@codesourcery.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6173 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
parent
21d215831e
commit
27a4edb310
@ -372,6 +372,8 @@ EXTRACT_SHELPER(SIMM, 0, 16);
|
||||
EXTRACT_HELPER(UIMM, 0, 16);
|
||||
/* 5 bits signed immediate value */
|
||||
EXTRACT_HELPER(SIMM5, 16, 5);
|
||||
/* 5 bits signed immediate value */
|
||||
EXTRACT_HELPER(UIMM5, 16, 5);
|
||||
/* Bit count */
|
||||
EXTRACT_HELPER(NB, 11, 5);
|
||||
/* Shift count */
|
||||
@ -6288,6 +6290,24 @@ GEN_VXFORM(vrlw, 2, 2);
|
||||
tcg_temp_free_ptr(rd); \
|
||||
}
|
||||
|
||||
#define GEN_VXFORM_UIMM(name, opc2, opc3) \
|
||||
GEN_HANDLER(name, 0x04, opc2, opc3, 0x00000000, PPC_ALTIVEC) \
|
||||
{ \
|
||||
TCGv_ptr rb, rd; \
|
||||
TCGv_i32 uimm; \
|
||||
if (unlikely(!ctx->altivec_enabled)) { \
|
||||
gen_exception(ctx, POWERPC_EXCP_VPU); \
|
||||
return; \
|
||||
} \
|
||||
uimm = tcg_const_i32(UIMM5(ctx->opcode)); \
|
||||
rb = gen_avr_ptr(rB(ctx->opcode)); \
|
||||
rd = gen_avr_ptr(rD(ctx->opcode)); \
|
||||
gen_helper_##name (rd, rb, uimm); \
|
||||
tcg_temp_free_i32(uimm); \
|
||||
tcg_temp_free_ptr(rb); \
|
||||
tcg_temp_free_ptr(rd); \
|
||||
}
|
||||
|
||||
GEN_HANDLER(vsldoi, 0x04, 0x16, 0xFF, 0x00000400, PPC_ALTIVEC)
|
||||
{
|
||||
TCGv_ptr ra, rb, rd;
|
||||
|
Loading…
Reference in New Issue
Block a user