mirror of
https://github.com/qemu/qemu.git
synced 2024-11-27 05:43:47 +08:00
hw/net: spelling fixes
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru> Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
parent
bad5cfcd60
commit
2431f4f184
@ -81,8 +81,8 @@
|
|||||||
#define GEM_IPGSTRETCH (0x000000BC / 4) /* IPG Stretch reg */
|
#define GEM_IPGSTRETCH (0x000000BC / 4) /* IPG Stretch reg */
|
||||||
#define GEM_SVLAN (0x000000C0 / 4) /* Stacked VLAN reg */
|
#define GEM_SVLAN (0x000000C0 / 4) /* Stacked VLAN reg */
|
||||||
#define GEM_MODID (0x000000FC / 4) /* Module ID reg */
|
#define GEM_MODID (0x000000FC / 4) /* Module ID reg */
|
||||||
#define GEM_OCTTXLO (0x00000100 / 4) /* Octects transmitted Low reg */
|
#define GEM_OCTTXLO (0x00000100 / 4) /* Octets transmitted Low reg */
|
||||||
#define GEM_OCTTXHI (0x00000104 / 4) /* Octects transmitted High reg */
|
#define GEM_OCTTXHI (0x00000104 / 4) /* Octets transmitted High reg */
|
||||||
#define GEM_TXCNT (0x00000108 / 4) /* Error-free Frames transmitted */
|
#define GEM_TXCNT (0x00000108 / 4) /* Error-free Frames transmitted */
|
||||||
#define GEM_TXBCNT (0x0000010C / 4) /* Error-free Broadcast Frames */
|
#define GEM_TXBCNT (0x0000010C / 4) /* Error-free Broadcast Frames */
|
||||||
#define GEM_TXMCNT (0x00000110 / 4) /* Error-free Multicast Frame */
|
#define GEM_TXMCNT (0x00000110 / 4) /* Error-free Multicast Frame */
|
||||||
@ -101,8 +101,8 @@
|
|||||||
#define GEM_LATECOLLCNT (0x00000144 / 4) /* Late Collision Frames */
|
#define GEM_LATECOLLCNT (0x00000144 / 4) /* Late Collision Frames */
|
||||||
#define GEM_DEFERTXCNT (0x00000148 / 4) /* Deferred Transmission Frames */
|
#define GEM_DEFERTXCNT (0x00000148 / 4) /* Deferred Transmission Frames */
|
||||||
#define GEM_CSENSECNT (0x0000014C / 4) /* Carrier Sense Error Counter */
|
#define GEM_CSENSECNT (0x0000014C / 4) /* Carrier Sense Error Counter */
|
||||||
#define GEM_OCTRXLO (0x00000150 / 4) /* Octects Received register Low */
|
#define GEM_OCTRXLO (0x00000150 / 4) /* Octets Received register Low */
|
||||||
#define GEM_OCTRXHI (0x00000154 / 4) /* Octects Received register High */
|
#define GEM_OCTRXHI (0x00000154 / 4) /* Octets Received register High */
|
||||||
#define GEM_RXCNT (0x00000158 / 4) /* Error-free Frames Received */
|
#define GEM_RXCNT (0x00000158 / 4) /* Error-free Frames Received */
|
||||||
#define GEM_RXBROADCNT (0x0000015C / 4) /* Error-free Broadcast Frames RX */
|
#define GEM_RXBROADCNT (0x0000015C / 4) /* Error-free Broadcast Frames RX */
|
||||||
#define GEM_RXMULTICNT (0x00000160 / 4) /* Error-free Multicast Frames RX */
|
#define GEM_RXMULTICNT (0x00000160 / 4) /* Error-free Multicast Frames RX */
|
||||||
@ -954,7 +954,7 @@ static ssize_t gem_receive(NetClientState *nc, const uint8_t *buf, size_t size)
|
|||||||
/* Is this destination MAC address "for us" ? */
|
/* Is this destination MAC address "for us" ? */
|
||||||
maf = gem_mac_address_filter(s, buf);
|
maf = gem_mac_address_filter(s, buf);
|
||||||
if (maf == GEM_RX_REJECT) {
|
if (maf == GEM_RX_REJECT) {
|
||||||
return size; /* no, drop siliently b/c it's not an error */
|
return size; /* no, drop silently b/c it's not an error */
|
||||||
}
|
}
|
||||||
|
|
||||||
/* Discard packets with receive length error enabled ? */
|
/* Discard packets with receive length error enabled ? */
|
||||||
|
@ -551,7 +551,7 @@ static uint64_t dp8393x_read(void *opaque, hwaddr addr, unsigned int size)
|
|||||||
val = s->cam[s->regs[SONIC_CEP] & 0xf][SONIC_CAP0 - reg];
|
val = s->cam[s->regs[SONIC_CEP] & 0xf][SONIC_CAP0 - reg];
|
||||||
}
|
}
|
||||||
break;
|
break;
|
||||||
/* All other registers have no special contraints */
|
/* All other registers have no special constraints */
|
||||||
default:
|
default:
|
||||||
val = s->regs[reg];
|
val = s->regs[reg];
|
||||||
}
|
}
|
||||||
|
@ -130,7 +130,7 @@
|
|||||||
|
|
||||||
#define E1000_GCR2 0x05B64 /* 3GIO Control Register 2 */
|
#define E1000_GCR2 0x05B64 /* 3GIO Control Register 2 */
|
||||||
#define E1000_FFLT_DBG 0x05F04 /* Debug Register */
|
#define E1000_FFLT_DBG 0x05F04 /* Debug Register */
|
||||||
#define E1000_HICR 0x08F00 /* Host Inteface Control */
|
#define E1000_HICR 0x08F00 /* Host Interface Control */
|
||||||
|
|
||||||
#define E1000_RXMTRL 0x0B634 /* Time sync Rx EtherType and Msg Type - RW */
|
#define E1000_RXMTRL 0x0B634 /* Time sync Rx EtherType and Msg Type - RW */
|
||||||
#define E1000_RXUDP 0x0B638 /* Time Sync Rx UDP Port - RW */
|
#define E1000_RXUDP 0x0B638 /* Time Sync Rx UDP Port - RW */
|
||||||
|
@ -839,7 +839,7 @@ union e1000_rx_desc_packet_split {
|
|||||||
#define E1000_RXD_STAT_EOP 0x02 /* End of Packet */
|
#define E1000_RXD_STAT_EOP 0x02 /* End of Packet */
|
||||||
#define E1000_RXD_STAT_IXSM 0x04 /* Ignore checksum */
|
#define E1000_RXD_STAT_IXSM 0x04 /* Ignore checksum */
|
||||||
#define E1000_RXD_STAT_VP 0x08 /* IEEE VLAN Packet */
|
#define E1000_RXD_STAT_VP 0x08 /* IEEE VLAN Packet */
|
||||||
#define E1000_RXD_STAT_UDPCS 0x10 /* UDP xsum caculated */
|
#define E1000_RXD_STAT_UDPCS 0x10 /* UDP xsum calculated */
|
||||||
#define E1000_RXD_STAT_TCPCS 0x20 /* TCP xsum calculated */
|
#define E1000_RXD_STAT_TCPCS 0x20 /* TCP xsum calculated */
|
||||||
#define E1000_RXD_STAT_IPCS 0x40 /* IP xsum calculated */
|
#define E1000_RXD_STAT_IPCS 0x40 /* IP xsum calculated */
|
||||||
#define E1000_RXD_STAT_PIF 0x80 /* passed in-exact filter */
|
#define E1000_RXD_STAT_PIF 0x80 /* passed in-exact filter */
|
||||||
|
@ -365,7 +365,7 @@ void etsec_walk_tx_ring(eTSEC *etsec, int ring_nbr)
|
|||||||
} while (TRUE);
|
} while (TRUE);
|
||||||
|
|
||||||
/* Save the Buffer Descriptor Pointers to last bd that was not
|
/* Save the Buffer Descriptor Pointers to last bd that was not
|
||||||
* succesfully closed */
|
* successfully closed */
|
||||||
etsec->regs[TBPTR0 + ring_nbr].value = bd_addr;
|
etsec->regs[TBPTR0 + ring_nbr].value = bd_addr;
|
||||||
|
|
||||||
/* Set transmit halt THLTx */
|
/* Set transmit halt THLTx */
|
||||||
|
@ -364,7 +364,7 @@ union e1000_adv_rx_desc {
|
|||||||
/* Indicates that VF is still clear to send requests */
|
/* Indicates that VF is still clear to send requests */
|
||||||
#define E1000_VT_MSGTYPE_CTS 0x20000000
|
#define E1000_VT_MSGTYPE_CTS 0x20000000
|
||||||
#define E1000_VT_MSGINFO_SHIFT 16
|
#define E1000_VT_MSGINFO_SHIFT 16
|
||||||
/* bits 23:16 are used for exra info for certain messages */
|
/* bits 23:16 are used for extra info for certain messages */
|
||||||
#define E1000_VT_MSGINFO_MASK (0xFF << E1000_VT_MSGINFO_SHIFT)
|
#define E1000_VT_MSGINFO_MASK (0xFF << E1000_VT_MSGINFO_SHIFT)
|
||||||
|
|
||||||
#define E1000_VF_RESET 0x01 /* VF requests reset */
|
#define E1000_VF_RESET 0x01 /* VF requests reset */
|
||||||
@ -491,7 +491,7 @@ union e1000_adv_rx_desc {
|
|||||||
#define E1000_VF_MBX_INIT_DELAY 500 /* usec delay between retries */
|
#define E1000_VF_MBX_INIT_DELAY 500 /* usec delay between retries */
|
||||||
|
|
||||||
#define E1000_VT_MSGINFO_SHIFT 16
|
#define E1000_VT_MSGINFO_SHIFT 16
|
||||||
/* bits 23:16 are used for exra info for certain messages */
|
/* bits 23:16 are used for extra info for certain messages */
|
||||||
#define E1000_VT_MSGINFO_MASK (0xFF << E1000_VT_MSGINFO_SHIFT)
|
#define E1000_VT_MSGINFO_MASK (0xFF << E1000_VT_MSGINFO_SHIFT)
|
||||||
|
|
||||||
#define E1000_VF_RESET 0x01 /* VF requests reset */
|
#define E1000_VF_RESET 0x01 /* VF requests reset */
|
||||||
|
@ -571,7 +571,7 @@ static ssize_t mcf_fec_receive(NetClientState *nc, const uint8_t *buf, size_t si
|
|||||||
size += 4;
|
size += 4;
|
||||||
crc = cpu_to_be32(crc32(~0, buf, size));
|
crc = cpu_to_be32(crc32(~0, buf, size));
|
||||||
crc_ptr = (uint8_t *)&crc;
|
crc_ptr = (uint8_t *)&crc;
|
||||||
/* Huge frames are truncted. */
|
/* Huge frames are truncated. */
|
||||||
if (size > FEC_MAX_FRAME_SIZE) {
|
if (size > FEC_MAX_FRAME_SIZE) {
|
||||||
size = FEC_MAX_FRAME_SIZE;
|
size = FEC_MAX_FRAME_SIZE;
|
||||||
flags |= FEC_BD_TR | FEC_BD_LG;
|
flags |= FEC_BD_TR | FEC_BD_LG;
|
||||||
|
@ -134,7 +134,7 @@ static ssize_t fp_port_receive_iov(NetClientState *nc, const struct iovec *iov,
|
|||||||
FpPort *port = qemu_get_nic_opaque(nc);
|
FpPort *port = qemu_get_nic_opaque(nc);
|
||||||
|
|
||||||
/* If the port is disabled, we want to drop this pkt
|
/* If the port is disabled, we want to drop this pkt
|
||||||
* now rather than queing it for later. We don't want
|
* now rather than queueing it for later. We don't want
|
||||||
* any stale pkts getting into the device when the port
|
* any stale pkts getting into the device when the port
|
||||||
* transitions to enabled.
|
* transitions to enabled.
|
||||||
*/
|
*/
|
||||||
|
@ -100,7 +100,7 @@ enum RTL8139_registers {
|
|||||||
MAC0 = 0, /* Ethernet hardware address. */
|
MAC0 = 0, /* Ethernet hardware address. */
|
||||||
MAR0 = 8, /* Multicast filter. */
|
MAR0 = 8, /* Multicast filter. */
|
||||||
TxStatus0 = 0x10,/* Transmit status (Four 32bit registers). C mode only */
|
TxStatus0 = 0x10,/* Transmit status (Four 32bit registers). C mode only */
|
||||||
/* Dump Tally Conter control register(64bit). C+ mode only */
|
/* Dump Tally Counter control register(64bit). C+ mode only */
|
||||||
TxAddr0 = 0x20, /* Tx descriptors (also four 32bit). */
|
TxAddr0 = 0x20, /* Tx descriptors (also four 32bit). */
|
||||||
RxBuf = 0x30,
|
RxBuf = 0x30,
|
||||||
ChipCmd = 0x37,
|
ChipCmd = 0x37,
|
||||||
|
@ -361,7 +361,7 @@ static void smc91c111_writeb(void *opaque, hwaddr offset,
|
|||||||
case 4: case 5: case 6: case 7: case 8: case 9: /* IA */
|
case 4: case 5: case 6: case 7: case 8: case 9: /* IA */
|
||||||
/* Not implemented. */
|
/* Not implemented. */
|
||||||
return;
|
return;
|
||||||
case 10: /* Genral Purpose */
|
case 10: /* General Purpose */
|
||||||
SET_LOW(gpr, value);
|
SET_LOW(gpr, value);
|
||||||
return;
|
return;
|
||||||
case 11:
|
case 11:
|
||||||
|
@ -1228,7 +1228,7 @@ static void sungem_mmio_mif_write(void *opaque, hwaddr addr, uint64_t val,
|
|||||||
case MIF_SMACHINE:
|
case MIF_SMACHINE:
|
||||||
return; /* No actual write */
|
return; /* No actual write */
|
||||||
case MIF_CFG:
|
case MIF_CFG:
|
||||||
/* Maintain the RO MDI bits to advertize an MDIO PHY on MDI0 */
|
/* Maintain the RO MDI bits to advertise an MDIO PHY on MDI0 */
|
||||||
val &= ~MIF_CFG_MDI1;
|
val &= ~MIF_CFG_MDI1;
|
||||||
val |= MIF_CFG_MDI0;
|
val |= MIF_CFG_MDI0;
|
||||||
break;
|
break;
|
||||||
|
@ -901,7 +901,7 @@ static void sunhme_reset(DeviceState *ds)
|
|||||||
/* Configure internal transceiver */
|
/* Configure internal transceiver */
|
||||||
s->mifregs[HME_MIFI_CFG >> 2] |= HME_MIF_CFG_MDI0;
|
s->mifregs[HME_MIFI_CFG >> 2] |= HME_MIF_CFG_MDI0;
|
||||||
|
|
||||||
/* Advetise auto, 100Mbps FD */
|
/* Advertise auto, 100Mbps FD */
|
||||||
s->miiregs[MII_ANAR] = MII_ANAR_TXFD;
|
s->miiregs[MII_ANAR] = MII_ANAR_TXFD;
|
||||||
s->miiregs[MII_BMSR] = MII_BMSR_AUTONEG | MII_BMSR_100TX_FD |
|
s->miiregs[MII_BMSR] = MII_BMSR_AUTONEG | MII_BMSR_100TX_FD |
|
||||||
MII_BMSR_AN_COMP;
|
MII_BMSR_AN_COMP;
|
||||||
|
@ -1330,7 +1330,7 @@ static void virtio_net_detach_epbf_rss(VirtIONet *n)
|
|||||||
static bool virtio_net_load_ebpf(VirtIONet *n)
|
static bool virtio_net_load_ebpf(VirtIONet *n)
|
||||||
{
|
{
|
||||||
if (!virtio_net_attach_ebpf_to_backend(n->nic, -1)) {
|
if (!virtio_net_attach_ebpf_to_backend(n->nic, -1)) {
|
||||||
/* backend does't support steering ebpf */
|
/* backend doesn't support steering ebpf */
|
||||||
return false;
|
return false;
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -2069,7 +2069,7 @@ static void virtio_net_rsc_extract_unit6(VirtioNetRscChain *chain,
|
|||||||
+ sizeof(struct ip6_header));
|
+ sizeof(struct ip6_header));
|
||||||
unit->tcp_hdrlen = (htons(unit->tcp->th_offset_flags) & 0xF000) >> 10;
|
unit->tcp_hdrlen = (htons(unit->tcp->th_offset_flags) & 0xF000) >> 10;
|
||||||
|
|
||||||
/* There is a difference between payload lenght in ipv4 and v6,
|
/* There is a difference between payload length in ipv4 and v6,
|
||||||
ip header is excluded in ipv6 */
|
ip header is excluded in ipv6 */
|
||||||
unit->payload = htons(*unit->ip_plen) - unit->tcp_hdrlen;
|
unit->payload = htons(*unit->ip_plen) - unit->tcp_hdrlen;
|
||||||
}
|
}
|
||||||
@ -3818,7 +3818,7 @@ static void virtio_net_instance_init(Object *obj)
|
|||||||
|
|
||||||
/*
|
/*
|
||||||
* The default config_size is sizeof(struct virtio_net_config).
|
* The default config_size is sizeof(struct virtio_net_config).
|
||||||
* Can be overriden with virtio_net_set_config_size.
|
* Can be overridden with virtio_net_set_config_size.
|
||||||
*/
|
*/
|
||||||
n->config_size = sizeof(struct virtio_net_config);
|
n->config_size = sizeof(struct virtio_net_config);
|
||||||
device_add_bootindex_property(obj, &n->nic_conf.bootindex,
|
device_add_bootindex_property(obj, &n->nic_conf.bootindex,
|
||||||
|
@ -1889,7 +1889,7 @@ vmxnet3_io_bar1_read(void *opaque, hwaddr addr, unsigned size)
|
|||||||
break;
|
break;
|
||||||
|
|
||||||
default:
|
default:
|
||||||
VMW_CBPRN("Unknow read BAR1[%" PRIx64 "], %d bytes", addr, size);
|
VMW_CBPRN("Unknown read BAR1[%" PRIx64 "], %d bytes", addr, size);
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -733,7 +733,7 @@ struct Vmxnet3_TxQueueDesc {
|
|||||||
struct Vmxnet3_RxQueueDesc {
|
struct Vmxnet3_RxQueueDesc {
|
||||||
struct Vmxnet3_RxQueueCtrl ctrl;
|
struct Vmxnet3_RxQueueCtrl ctrl;
|
||||||
struct Vmxnet3_RxQueueConf conf;
|
struct Vmxnet3_RxQueueConf conf;
|
||||||
/* Driver read after a GET commad */
|
/* Driver read after a GET command */
|
||||||
struct Vmxnet3_QueueStatus status;
|
struct Vmxnet3_QueueStatus status;
|
||||||
struct UPT1_RxStats stats;
|
struct UPT1_RxStats stats;
|
||||||
u8 __pad[88]; /* 128 aligned */
|
u8 __pad[88]; /* 128 aligned */
|
||||||
|
Loading…
Reference in New Issue
Block a user