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target/nios2: Inline handle_instruction
Move handle_instruction into nios2_tr_translate_insn as the only caller. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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@ -735,38 +735,6 @@ illegal_op:
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t_gen_helper_raise_exception(dc, EXCP_ILLEGAL);
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}
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static void handle_instruction(DisasContext *dc, CPUNios2State *env)
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{
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uint32_t code;
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uint8_t op;
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const Nios2Instruction *instr;
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#if defined(CONFIG_USER_ONLY)
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/* FIXME: Is this needed ? */
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if (dc->pc >= 0x1000 && dc->pc < 0x2000) {
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t_gen_helper_raise_exception(dc, 0xaa);
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return;
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}
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#endif
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code = cpu_ldl_code(env, dc->pc);
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op = get_opcode(code);
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if (unlikely(op >= ARRAY_SIZE(i_type_instructions))) {
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t_gen_helper_raise_exception(dc, EXCP_ILLEGAL);
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return;
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}
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dc->zero = NULL;
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instr = &i_type_instructions[op];
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instr->handler(dc, code, instr->flags);
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if (dc->zero) {
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tcg_temp_free(dc->zero);
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}
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}
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static const char * const regnames[] = {
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"zero", "at", "r2", "r3",
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"r4", "r5", "r6", "r7",
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@ -842,12 +810,40 @@ static void nios2_tr_translate_insn(DisasContextBase *dcbase, CPUState *cs)
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{
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DisasContext *dc = container_of(dcbase, DisasContext, base);
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CPUNios2State *env = cs->env_ptr;
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const Nios2Instruction *instr;
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uint32_t code, pc;
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uint8_t op;
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dc->pc = dc->base.pc_next;
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dc->base.pc_next += 4;
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pc = dc->base.pc_next;
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dc->pc = pc;
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dc->base.pc_next = pc + 4;
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/* Decode an instruction */
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handle_instruction(dc, env);
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#if defined(CONFIG_USER_ONLY)
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/* FIXME: Is this needed ? */
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if (pc >= 0x1000 && pc < 0x2000) {
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t_gen_helper_raise_exception(dc, 0xaa);
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return;
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}
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#endif
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code = cpu_ldl_code(env, pc);
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op = get_opcode(code);
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if (unlikely(op >= ARRAY_SIZE(i_type_instructions))) {
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t_gen_helper_raise_exception(dc, EXCP_ILLEGAL);
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return;
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}
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dc->zero = NULL;
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instr = &i_type_instructions[op];
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instr->handler(dc, code, instr->flags);
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if (dc->zero) {
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tcg_temp_free(dc->zero);
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}
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}
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static void nios2_tr_tb_stop(DisasContextBase *dcbase, CPUState *cs)
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