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target-sh4: Use mul*2 for dmul*
Cc: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
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@ -833,36 +833,10 @@ static void _decode_opc(DisasContext * ctx)
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gen_helper_div1(REG(B11_8), cpu_env, REG(B7_4), REG(B11_8));
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return;
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case 0x300d: /* dmuls.l Rm,Rn */
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{
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TCGv_i64 tmp1 = tcg_temp_new_i64();
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TCGv_i64 tmp2 = tcg_temp_new_i64();
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tcg_gen_ext_i32_i64(tmp1, REG(B7_4));
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tcg_gen_ext_i32_i64(tmp2, REG(B11_8));
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tcg_gen_mul_i64(tmp1, tmp1, tmp2);
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tcg_gen_trunc_i64_i32(cpu_macl, tmp1);
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tcg_gen_shri_i64(tmp1, tmp1, 32);
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tcg_gen_trunc_i64_i32(cpu_mach, tmp1);
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tcg_temp_free_i64(tmp2);
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tcg_temp_free_i64(tmp1);
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}
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tcg_gen_muls2_i32(cpu_macl, cpu_mach, REG(B7_4), REG(B11_8));
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return;
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case 0x3005: /* dmulu.l Rm,Rn */
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{
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TCGv_i64 tmp1 = tcg_temp_new_i64();
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TCGv_i64 tmp2 = tcg_temp_new_i64();
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tcg_gen_extu_i32_i64(tmp1, REG(B7_4));
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tcg_gen_extu_i32_i64(tmp2, REG(B11_8));
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tcg_gen_mul_i64(tmp1, tmp1, tmp2);
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tcg_gen_trunc_i64_i32(cpu_macl, tmp1);
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tcg_gen_shri_i64(tmp1, tmp1, 32);
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tcg_gen_trunc_i64_i32(cpu_mach, tmp1);
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tcg_temp_free_i64(tmp2);
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tcg_temp_free_i64(tmp1);
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}
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tcg_gen_mulu2_i32(cpu_macl, cpu_mach, REG(B7_4), REG(B11_8));
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return;
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case 0x600e: /* exts.b Rm,Rn */
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tcg_gen_ext8s_i32(REG(B11_8), REG(B7_4));
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