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tcg/s390x: Implement negsetcond_*
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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41e4c0a9ad
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128c7d5194
@ -1266,7 +1266,8 @@ static int tgen_cmp(TCGContext *s, TCGType type, TCGCond c, TCGReg r1,
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}
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static void tgen_setcond(TCGContext *s, TCGType type, TCGCond cond,
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TCGReg dest, TCGReg c1, TCGArg c2, int c2const)
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TCGReg dest, TCGReg c1, TCGArg c2,
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bool c2const, bool neg)
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{
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int cc;
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@ -1275,11 +1276,27 @@ static void tgen_setcond(TCGContext *s, TCGType type, TCGCond cond,
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/* Emit: d = 0, d = (cc ? 1 : d). */
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cc = tgen_cmp(s, type, cond, c1, c2, c2const, false);
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tcg_out_movi(s, TCG_TYPE_I64, dest, 0);
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tcg_out_insn(s, RIEg, LOCGHI, dest, 1, cc);
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tcg_out_insn(s, RIEg, LOCGHI, dest, neg ? -1 : 1, cc);
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return;
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}
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restart:
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switch (cond) {
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case TCG_COND_GEU:
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case TCG_COND_LTU:
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case TCG_COND_LT:
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case TCG_COND_GE:
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/* Swap operands so that we can use LEU/GTU/GT/LE. */
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if (!c2const) {
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TCGReg t = c1;
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c1 = c2;
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c2 = t;
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cond = tcg_swap_cond(cond);
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}
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break;
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default:
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break;
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}
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switch (cond) {
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case TCG_COND_NE:
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/* X != 0 is X > 0. */
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@ -1292,11 +1309,20 @@ static void tgen_setcond(TCGContext *s, TCGType type, TCGCond cond,
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case TCG_COND_GTU:
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case TCG_COND_GT:
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/* The result of a compare has CC=2 for GT and CC=3 unused.
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ADD LOGICAL WITH CARRY considers (CC & 2) the carry bit. */
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/*
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* The result of a compare has CC=2 for GT and CC=3 unused.
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* ADD LOGICAL WITH CARRY considers (CC & 2) the carry bit.
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*/
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tgen_cmp(s, type, cond, c1, c2, c2const, true);
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tcg_out_movi(s, type, dest, 0);
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tcg_out_insn(s, RRE, ALCGR, dest, dest);
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if (neg) {
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if (type == TCG_TYPE_I32) {
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tcg_out_insn(s, RR, LCR, dest, dest);
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} else {
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tcg_out_insn(s, RRE, LCGR, dest, dest);
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}
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}
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return;
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case TCG_COND_EQ:
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@ -1310,27 +1336,17 @@ static void tgen_setcond(TCGContext *s, TCGType type, TCGCond cond,
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case TCG_COND_LEU:
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case TCG_COND_LE:
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/* As above, but we're looking for borrow, or !carry.
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The second insn computes d - d - borrow, or -1 for true
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and 0 for false. So we must mask to 1 bit afterward. */
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/*
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* As above, but we're looking for borrow, or !carry.
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* The second insn computes d - d - borrow, or -1 for true
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* and 0 for false. So we must mask to 1 bit afterward.
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*/
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tgen_cmp(s, type, cond, c1, c2, c2const, true);
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tcg_out_insn(s, RRE, SLBGR, dest, dest);
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tgen_andi(s, type, dest, 1);
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return;
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case TCG_COND_GEU:
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case TCG_COND_LTU:
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case TCG_COND_LT:
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case TCG_COND_GE:
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/* Swap operands so that we can use LEU/GTU/GT/LE. */
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if (!c2const) {
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TCGReg t = c1;
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c1 = c2;
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c2 = t;
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cond = tcg_swap_cond(cond);
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goto restart;
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if (!neg) {
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tgen_andi(s, type, dest, 1);
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}
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break;
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return;
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default:
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g_assert_not_reached();
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@ -1339,7 +1355,7 @@ static void tgen_setcond(TCGContext *s, TCGType type, TCGCond cond,
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cc = tgen_cmp(s, type, cond, c1, c2, c2const, false);
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/* Emit: d = 0, t = 1, d = (cc ? t : d). */
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tcg_out_movi(s, TCG_TYPE_I64, dest, 0);
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tcg_out_movi(s, TCG_TYPE_I64, TCG_TMP0, 1);
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tcg_out_movi(s, TCG_TYPE_I64, TCG_TMP0, neg ? -1 : 1);
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tcg_out_insn(s, RRFc, LOCGR, dest, TCG_TMP0, cc);
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}
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@ -2288,7 +2304,11 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc,
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break;
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case INDEX_op_setcond_i32:
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tgen_setcond(s, TCG_TYPE_I32, args[3], args[0], args[1],
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args[2], const_args[2]);
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args[2], const_args[2], false);
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break;
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case INDEX_op_negsetcond_i32:
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tgen_setcond(s, TCG_TYPE_I32, args[3], args[0], args[1],
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args[2], const_args[2], true);
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break;
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case INDEX_op_movcond_i32:
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tgen_movcond(s, TCG_TYPE_I32, args[5], args[0], args[1],
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@ -2566,7 +2586,11 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc,
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break;
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case INDEX_op_setcond_i64:
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tgen_setcond(s, TCG_TYPE_I64, args[3], args[0], args[1],
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args[2], const_args[2]);
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args[2], const_args[2], false);
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break;
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case INDEX_op_negsetcond_i64:
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tgen_setcond(s, TCG_TYPE_I64, args[3], args[0], args[1],
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args[2], const_args[2], true);
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break;
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case INDEX_op_movcond_i64:
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tgen_movcond(s, TCG_TYPE_I64, args[5], args[0], args[1],
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@ -3109,8 +3133,10 @@ static TCGConstraintSetIndex tcg_target_op_def(TCGOpcode op)
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case INDEX_op_rotr_i32:
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case INDEX_op_rotr_i64:
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case INDEX_op_setcond_i32:
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case INDEX_op_negsetcond_i32:
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return C_O1_I2(r, r, ri);
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case INDEX_op_setcond_i64:
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case INDEX_op_negsetcond_i64:
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return C_O1_I2(r, r, rA);
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case INDEX_op_clz_i64:
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@ -96,7 +96,7 @@ extern uint64_t s390_facilities[3];
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#define TCG_TARGET_HAS_sextract_i32 0
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#define TCG_TARGET_HAS_extract2_i32 0
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#define TCG_TARGET_HAS_movcond_i32 1
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#define TCG_TARGET_HAS_negsetcond_i32 0
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#define TCG_TARGET_HAS_negsetcond_i32 1
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#define TCG_TARGET_HAS_add2_i32 1
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#define TCG_TARGET_HAS_sub2_i32 1
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#define TCG_TARGET_HAS_mulu2_i32 0
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@ -132,7 +132,7 @@ extern uint64_t s390_facilities[3];
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#define TCG_TARGET_HAS_sextract_i64 0
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#define TCG_TARGET_HAS_extract2_i64 0
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#define TCG_TARGET_HAS_movcond_i64 1
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#define TCG_TARGET_HAS_negsetcond_i64 0
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#define TCG_TARGET_HAS_negsetcond_i64 1
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#define TCG_TARGET_HAS_add2_i64 1
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#define TCG_TARGET_HAS_sub2_i64 1
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#define TCG_TARGET_HAS_mulu2_i64 1
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