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target/cris: Remove dc->flagx_known
Ever since 2a44f7f173, flagx_known is always true.
Fold away all of the tests against the flag.
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Richard Henderson
parent
3a1a80cc05
commit
0ce97a315f
@ -120,8 +120,6 @@ typedef struct DisasContext {
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int cc_x_uptodate; /* 1 - ccs, 2 - known | X_FLAG. 0 not up-to-date. */
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int flags_uptodate; /* Whether or not $ccs is up-to-date. */
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int flagx_known; /* Whether or not flags_x has the x flag known at
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translation time. */
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int flags_x;
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int clear_x; /* Clear x after this insn? */
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@ -377,66 +375,26 @@ static inline void t_gen_add_flag(TCGv d, int flag)
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static inline void t_gen_addx_carry(DisasContext *dc, TCGv d)
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{
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if (dc->flagx_known) {
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if (dc->flags_x) {
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TCGv c;
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c = tcg_temp_new();
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t_gen_mov_TN_preg(c, PR_CCS);
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/* C flag is already at bit 0. */
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tcg_gen_andi_tl(c, c, C_FLAG);
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tcg_gen_add_tl(d, d, c);
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tcg_temp_free(c);
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}
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} else {
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TCGv x, c;
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if (dc->flags_x) {
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TCGv c = tcg_temp_new();
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x = tcg_temp_new();
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c = tcg_temp_new();
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t_gen_mov_TN_preg(x, PR_CCS);
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tcg_gen_mov_tl(c, x);
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/* Propagate carry into d if X is set. Branch free. */
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t_gen_mov_TN_preg(c, PR_CCS);
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/* C flag is already at bit 0. */
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tcg_gen_andi_tl(c, c, C_FLAG);
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tcg_gen_andi_tl(x, x, X_FLAG);
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tcg_gen_shri_tl(x, x, 4);
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tcg_gen_and_tl(x, x, c);
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tcg_gen_add_tl(d, d, x);
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tcg_temp_free(x);
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tcg_gen_add_tl(d, d, c);
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tcg_temp_free(c);
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}
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}
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static inline void t_gen_subx_carry(DisasContext *dc, TCGv d)
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{
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if (dc->flagx_known) {
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if (dc->flags_x) {
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TCGv c;
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c = tcg_temp_new();
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t_gen_mov_TN_preg(c, PR_CCS);
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/* C flag is already at bit 0. */
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tcg_gen_andi_tl(c, c, C_FLAG);
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tcg_gen_sub_tl(d, d, c);
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tcg_temp_free(c);
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}
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} else {
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TCGv x, c;
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if (dc->flags_x) {
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TCGv c = tcg_temp_new();
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x = tcg_temp_new();
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c = tcg_temp_new();
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t_gen_mov_TN_preg(x, PR_CCS);
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tcg_gen_mov_tl(c, x);
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/* Propagate carry into d if X is set. Branch free. */
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t_gen_mov_TN_preg(c, PR_CCS);
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/* C flag is already at bit 0. */
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tcg_gen_andi_tl(c, c, C_FLAG);
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tcg_gen_andi_tl(x, x, X_FLAG);
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tcg_gen_shri_tl(x, x, 4);
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tcg_gen_and_tl(x, x, c);
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tcg_gen_sub_tl(d, d, x);
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tcg_temp_free(x);
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tcg_gen_sub_tl(d, d, c);
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tcg_temp_free(c);
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}
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}
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@ -541,11 +499,9 @@ static void gen_goto_tb(DisasContext *dc, int n, target_ulong dest)
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static inline void cris_clear_x_flag(DisasContext *dc)
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{
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if (dc->flagx_known && dc->flags_x) {
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if (dc->flags_x) {
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dc->flags_uptodate = 0;
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}
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dc->flagx_known = 1;
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dc->flags_x = 0;
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}
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@ -630,12 +586,10 @@ static void cris_evaluate_flags(DisasContext *dc)
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break;
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}
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if (dc->flagx_known) {
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if (dc->flags_x) {
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tcg_gen_ori_tl(cpu_PR[PR_CCS], cpu_PR[PR_CCS], X_FLAG);
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} else if (dc->cc_op == CC_OP_FLAGS) {
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tcg_gen_andi_tl(cpu_PR[PR_CCS], cpu_PR[PR_CCS], ~X_FLAG);
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}
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if (dc->flags_x) {
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tcg_gen_ori_tl(cpu_PR[PR_CCS], cpu_PR[PR_CCS], X_FLAG);
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} else if (dc->cc_op == CC_OP_FLAGS) {
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tcg_gen_andi_tl(cpu_PR[PR_CCS], cpu_PR[PR_CCS], ~X_FLAG);
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}
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dc->flags_uptodate = 1;
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}
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@ -670,16 +624,11 @@ static void cris_update_cc_op(DisasContext *dc, int op, int size)
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static inline void cris_update_cc_x(DisasContext *dc)
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{
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/* Save the x flag state at the time of the cc snapshot. */
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if (dc->flagx_known) {
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if (dc->cc_x_uptodate == (2 | dc->flags_x)) {
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return;
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}
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tcg_gen_movi_tl(cc_x, dc->flags_x);
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dc->cc_x_uptodate = 2 | dc->flags_x;
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} else {
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tcg_gen_andi_tl(cc_x, cpu_PR[PR_CCS], X_FLAG);
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dc->cc_x_uptodate = 1;
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if (dc->cc_x_uptodate == (2 | dc->flags_x)) {
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return;
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}
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tcg_gen_movi_tl(cc_x, dc->flags_x);
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dc->cc_x_uptodate = 2 | dc->flags_x;
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}
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/* Update cc prior to executing ALU op. Needs source operands untouched. */
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@ -1131,7 +1080,7 @@ static void gen_store (DisasContext *dc, TCGv addr, TCGv val,
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/* Conditional writes. We only support the kind were X and P are known
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at translation time. */
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if (dc->flagx_known && dc->flags_x && (dc->tb_flags & P_FLAG)) {
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if (dc->flags_x && (dc->tb_flags & P_FLAG)) {
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dc->postinc = 0;
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cris_evaluate_flags(dc);
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tcg_gen_ori_tl(cpu_PR[PR_CCS], cpu_PR[PR_CCS], C_FLAG);
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@ -1140,7 +1089,7 @@ static void gen_store (DisasContext *dc, TCGv addr, TCGv val,
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tcg_gen_qemu_st_tl(val, addr, mem_index, MO_TE + ctz32(size));
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if (dc->flagx_known && dc->flags_x) {
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if (dc->flags_x) {
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cris_evaluate_flags(dc);
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tcg_gen_andi_tl(cpu_PR[PR_CCS], cpu_PR[PR_CCS], ~C_FLAG);
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}
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@ -1727,8 +1676,8 @@ static int dec_addc_r(CPUCRISState *env, DisasContext *dc)
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LOG_DIS("addc $r%u, $r%u\n",
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dc->op1, dc->op2);
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cris_evaluate_flags(dc);
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/* Set for this insn. */
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dc->flagx_known = 1;
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dc->flags_x = X_FLAG;
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cris_cc_mask(dc, CC_MASK_NZVC);
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@ -2015,7 +1964,6 @@ static int dec_setclrf(CPUCRISState *env, DisasContext *dc)
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}
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if (flags & X_FLAG) {
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dc->flagx_known = 1;
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if (set) {
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dc->flags_x = X_FLAG;
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} else {
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@ -2479,7 +2427,6 @@ static int dec_addc_mr(CPUCRISState *env, DisasContext *dc)
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cris_evaluate_flags(dc);
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/* Set for this insn. */
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dc->flagx_known = 1;
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dc->flags_x = X_FLAG;
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cris_alu_m_alloc_temps(t);
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@ -3141,7 +3088,6 @@ static void cris_tr_init_disas_context(DisasContextBase *dcbase, CPUState *cs)
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dc->ppc = pc_start;
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dc->pc = pc_start;
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dc->flags_uptodate = 1;
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dc->flagx_known = 1;
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dc->flags_x = tb_flags & X_FLAG;
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dc->cc_x_uptodate = 0;
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dc->cc_mask = 0;
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@ -3217,7 +3163,6 @@ static void cris_tr_translate_insn(DisasContextBase *dcbase, CPUState *cs)
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}
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/* Fold unhandled changes to X_FLAG into cpustate_changed. */
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dc->cpustate_changed |= !dc->flagx_known;
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dc->cpustate_changed |= dc->flags_x != (dc->base.tb->flags & X_FLAG);
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/*
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@ -106,9 +106,8 @@ static void gen_store_v10(DisasContext *dc, TCGv addr, TCGv val,
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cris_store_direct_jmp(dc);
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}
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/* Conditional writes. We only support the kind were X is known
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at translation time. */
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if (dc->flagx_known && dc->flags_x) {
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/* Conditional writes. */
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if (dc->flags_x) {
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gen_store_v10_conditional(dc, addr, val, size, mem_index);
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return;
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}
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@ -376,7 +375,6 @@ static unsigned int dec10_setclrf(DisasContext *dc)
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if (flags & X_FLAG) {
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dc->flagx_known = 1;
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if (set)
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dc->flags_x = X_FLAG;
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else
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