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pnv/xive2: Add support for 8bits thread id

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Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
This commit is contained in:
Cédric Le Goater 2022-03-02 06:51:39 +01:00
parent 835806f1f9
commit 09a7e60c64
3 changed files with 8 additions and 1 deletions
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5
hw/intc/pnv_xive2.c
View File

@ -439,6 +439,11 @@ static uint32_t pnv_xive2_get_config(Xive2Router *xrtr)
cfg |= XIVE2_VP_SAVE_RESTORE;
}
if (GETFIELD(CQ_XIVE_CFG_HYP_HARD_RANGE,
xive->cq_regs[CQ_XIVE_CFG >> 3]) == CQ_XIVE_CFG_THREADID_8BITS) {
cfg |= XIVE2_THREADID_8BITS;
}
return cfg;
}

3
hw/intc/xive2.c
View File

@ -459,7 +459,8 @@ static uint32_t xive2_tctx_hw_cam_line(XivePresenter *xptr, XiveTCTX *tctx)
CPUPPCState *env = &POWERPC_CPU(tctx->cs)->env;
uint32_t pir = env->spr_cb[SPR_PIR].default_value;
uint8_t blk = xive2_router_get_block_id(xrtr);
uint8_t tid_shift = 7;
uint8_t tid_shift =
xive2_router_get_config(xrtr) & XIVE2_THREADID_8BITS ? 8 : 7;
uint8_t tid_mask = (1 << tid_shift) - 1;
return xive2_nvp_cam_line(blk, 1 << tid_shift | (pir & tid_mask));

1
include/hw/ppc/xive2.h
View File

@ -31,6 +31,7 @@ OBJECT_DECLARE_TYPE(Xive2Router, Xive2RouterClass, XIVE2_ROUTER);
#define XIVE2_GEN1_TIMA_OS 0x00000001
#define XIVE2_VP_SAVE_RESTORE 0x00000002
#define XIVE2_THREADID_8BITS 0x00000004
typedef struct Xive2RouterClass {
SysBusDeviceClass parent;