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target/arm: Add HCR_EL2 bits up to ARMv8.5
Post v8.3 bits taken from SysReg_v85_xml-00bet8. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20181203203839.757-3-richard.henderson@linaro.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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@ -1249,7 +1249,7 @@ static inline void xpsr_write(CPUARMState *env, uint32_t val, uint32_t mask)
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#define HCR_TIDCP (1ULL << 20)
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#define HCR_TACR (1ULL << 21)
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#define HCR_TSW (1ULL << 22)
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#define HCR_TPC (1ULL << 23)
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#define HCR_TPCP (1ULL << 23)
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#define HCR_TPU (1ULL << 24)
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#define HCR_TTLB (1ULL << 25)
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#define HCR_TVM (1ULL << 26)
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@ -1261,6 +1261,26 @@ static inline void xpsr_write(CPUARMState *env, uint32_t val, uint32_t mask)
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#define HCR_CD (1ULL << 32)
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#define HCR_ID (1ULL << 33)
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#define HCR_E2H (1ULL << 34)
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#define HCR_TLOR (1ULL << 35)
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#define HCR_TERR (1ULL << 36)
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#define HCR_TEA (1ULL << 37)
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#define HCR_MIOCNCE (1ULL << 38)
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#define HCR_APK (1ULL << 40)
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#define HCR_API (1ULL << 41)
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#define HCR_NV (1ULL << 42)
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#define HCR_NV1 (1ULL << 43)
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#define HCR_AT (1ULL << 44)
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#define HCR_NV2 (1ULL << 45)
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#define HCR_FWB (1ULL << 46)
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#define HCR_FIEN (1ULL << 47)
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#define HCR_TID4 (1ULL << 49)
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#define HCR_TICAB (1ULL << 50)
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#define HCR_TOCU (1ULL << 52)
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#define HCR_TTLBIS (1ULL << 54)
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#define HCR_TTLBOS (1ULL << 55)
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#define HCR_ATA (1ULL << 56)
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#define HCR_DCT (1ULL << 57)
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/*
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* When we actually implement ARMv8.1-VHE we should add HCR_E2H to
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* HCR_MASK and then clear it again if the feature bit is not set in
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