2018-02-09 21:00:59 +08:00
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/*
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* RDMA device: Definitions of Resource Manager structures
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*
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* Copyright (C) 2018 Oracle
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* Copyright (C) 2018 Red Hat Inc
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*
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* Authors:
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* Yuval Shaia <yuval.shaia@oracle.com>
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* Marcel Apfelbaum <marcel@redhat.com>
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*
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* This work is licensed under the terms of the GNU GPL, version 2 or later.
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* See the COPYING file in the top-level directory.
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*
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*/
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#ifndef RDMA_RM_DEFS_H
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#define RDMA_RM_DEFS_H
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#include "rdma_backend_defs.h"
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2018-12-21 22:40:32 +08:00
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#define MAX_PORTS 1 /* Do not change - we support only one port */
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2018-12-21 22:40:25 +08:00
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#define MAX_PORT_GIDS 255
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2018-05-01 04:02:20 +08:00
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#define MAX_GIDS MAX_PORT_GIDS
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2018-02-09 21:00:59 +08:00
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#define MAX_PORT_PKEYS 1
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2018-05-01 04:02:19 +08:00
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#define MAX_PKEYS MAX_PORT_PKEYS
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2018-02-09 21:00:59 +08:00
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#define MAX_UCS 512
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#define MAX_MR_SIZE (1UL << 27)
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#define MAX_QP 1024
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#define MAX_SGE 4
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#define MAX_CQ 2048
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#define MAX_MR 1024
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#define MAX_PD 1024
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#define MAX_QP_RD_ATOM 16
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#define MAX_QP_INIT_RD_ATOM 16
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#define MAX_AH 64
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2019-04-03 19:33:41 +08:00
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#define MAX_SRQ 512
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2018-02-09 21:00:59 +08:00
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2019-03-11 18:29:08 +08:00
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#define MAX_RM_TBL_NAME 16
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#define MAX_CONSEQ_EMPTY_POLL_CQ 4096 /* considered as error above this */
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2018-02-09 21:00:59 +08:00
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typedef struct RdmaRmResTbl {
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2018-05-01 04:02:22 +08:00
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char name[MAX_RM_TBL_NAME];
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2018-02-09 21:00:59 +08:00
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QemuMutex lock;
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unsigned long *bitmap;
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size_t tbl_sz;
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size_t res_sz;
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void *tbl;
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2019-03-11 18:29:08 +08:00
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uint32_t used; /* number of used entries in the table */
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2018-02-09 21:00:59 +08:00
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} RdmaRmResTbl;
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typedef struct RdmaRmPD {
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RdmaBackendPD backend_pd;
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uint32_t ctx_handle;
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} RdmaRmPD;
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2018-12-21 22:40:16 +08:00
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typedef enum CQNotificationType {
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CNT_CLEAR,
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CNT_ARM,
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CNT_SET,
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} CQNotificationType;
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2018-02-09 21:00:59 +08:00
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typedef struct RdmaRmCQ {
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RdmaBackendCQ backend_cq;
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void *opaque;
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2018-12-21 22:40:16 +08:00
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CQNotificationType notify;
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2018-02-09 21:00:59 +08:00
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} RdmaRmCQ;
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/* MR (DMA region) */
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typedef struct RdmaRmMR {
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RdmaBackendMR backend_mr;
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2018-08-05 23:35:11 +08:00
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void *virt;
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uint64_t start;
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size_t length;
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2018-02-09 21:00:59 +08:00
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uint32_t pd_handle;
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uint32_t lkey;
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uint32_t rkey;
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} RdmaRmMR;
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typedef struct RdmaRmUC {
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uint64_t uc_handle;
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} RdmaRmUC;
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typedef struct RdmaRmQP {
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RdmaBackendQP backend_qp;
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void *opaque;
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uint32_t qp_type;
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uint32_t qpn;
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uint32_t send_cq_handle;
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uint32_t recv_cq_handle;
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enum ibv_qp_state qp_state;
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2019-04-03 19:33:42 +08:00
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uint8_t is_srq;
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2018-02-09 21:00:59 +08:00
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} RdmaRmQP;
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2019-04-03 19:33:41 +08:00
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typedef struct RdmaRmSRQ {
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RdmaBackendSRQ backend_srq;
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uint32_t recv_cq_handle;
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void *opaque;
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} RdmaRmSRQ;
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2018-12-21 22:40:25 +08:00
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typedef struct RdmaRmGid {
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union ibv_gid gid;
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int backend_gid_index;
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} RdmaRmGid;
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2018-02-09 21:00:59 +08:00
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typedef struct RdmaRmPort {
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2018-12-21 22:40:25 +08:00
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RdmaRmGid gid_tbl[MAX_PORT_GIDS];
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2018-02-09 21:00:59 +08:00
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enum ibv_port_state state;
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} RdmaRmPort;
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2019-03-11 18:29:08 +08:00
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typedef struct RdmaRmStats {
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uint64_t tx;
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uint64_t tx_len;
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uint64_t tx_err;
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uint64_t rx_bufs;
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uint64_t rx_bufs_len;
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uint64_t rx_bufs_err;
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2019-04-03 19:33:40 +08:00
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uint64_t rx_srq;
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2019-03-11 18:29:08 +08:00
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uint64_t completions;
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uint64_t mad_tx;
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uint64_t mad_tx_err;
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uint64_t mad_rx;
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uint64_t mad_rx_err;
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uint64_t mad_rx_bufs;
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uint64_t mad_rx_bufs_err;
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uint64_t poll_cq_from_bk;
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uint64_t poll_cq_from_guest;
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uint64_t poll_cq_from_guest_empty;
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uint64_t poll_cq_ppoll_to;
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uint32_t missing_cqe;
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} RdmaRmStats;
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2019-02-14 23:40:53 +08:00
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struct RdmaDeviceResources {
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2018-12-21 22:40:32 +08:00
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RdmaRmPort port;
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2018-02-09 21:00:59 +08:00
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RdmaRmResTbl pd_tbl;
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RdmaRmResTbl mr_tbl;
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RdmaRmResTbl uc_tbl;
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RdmaRmResTbl qp_tbl;
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RdmaRmResTbl cq_tbl;
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RdmaRmResTbl cqe_ctx_tbl;
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2019-04-03 19:33:41 +08:00
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RdmaRmResTbl srq_tbl;
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2018-02-09 21:00:59 +08:00
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GHashTable *qp_hash; /* Keeps mapping between real and emulated */
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2019-03-11 18:29:07 +08:00
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QemuMutex lock;
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2019-03-11 18:29:08 +08:00
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RdmaRmStats stats;
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2019-02-14 23:40:53 +08:00
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};
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2018-02-09 21:00:59 +08:00
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#endif
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