2008-09-19 02:27:29 +08:00
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/*
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* QEMU Firmware configuration device emulation
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*
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* Copyright (c) 2008 Gleb Natapov
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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2013-02-04 22:40:22 +08:00
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#include "hw/hw.h"
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2012-12-18 01:20:04 +08:00
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#include "sysemu/sysemu.h"
|
2013-02-06 00:06:20 +08:00
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#include "hw/isa/isa.h"
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|
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#include "hw/nvram/fw_cfg.h"
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2013-02-04 22:40:22 +08:00
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#include "hw/sysbus.h"
|
2013-01-16 21:50:22 +08:00
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#include "trace.h"
|
2012-12-18 01:20:00 +08:00
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#include "qemu/error-report.h"
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|
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#include "qemu/config-file.h"
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2008-09-19 02:27:29 +08:00
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#define FW_CFG_SIZE 2
|
2013-05-30 21:07:58 +08:00
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#define FW_CFG_NAME "fw_cfg"
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|
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#define FW_CFG_PATH "/machine/" FW_CFG_NAME
|
2014-12-22 20:11:35 +08:00
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#define TYPE_FW_CFG "fw_cfg"
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|
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#define TYPE_FW_CFG_IO "fw_cfg_io"
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#define TYPE_FW_CFG_MEM "fw_cfg_mem"
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#define FW_CFG(obj) OBJECT_CHECK(FWCfgState, (obj), TYPE_FW_CFG)
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#define FW_CFG_IO(obj) OBJECT_CHECK(FWCfgIoState, (obj), TYPE_FW_CFG_IO)
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#define FW_CFG_MEM(obj) OBJECT_CHECK(FWCfgMemState, (obj), TYPE_FW_CFG_MEM)
|
2008-09-19 02:27:29 +08:00
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2010-02-07 17:15:26 +08:00
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|
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typedef struct FWCfgEntry {
|
2009-11-13 18:59:20 +08:00
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uint32_t len;
|
2008-09-19 02:27:29 +08:00
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uint8_t *data;
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|
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void *callback_opaque;
|
2013-09-01 22:56:20 +08:00
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|
|
FWCfgReadCallback read_callback;
|
2008-09-19 02:27:29 +08:00
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|
|
} FWCfgEntry;
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|
2010-02-07 17:15:26 +08:00
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struct FWCfgState {
|
2013-07-01 18:18:32 +08:00
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|
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/*< private >*/
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|
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SysBusDevice parent_obj;
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|
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/*< public >*/
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|
2008-09-19 02:27:29 +08:00
|
|
|
FWCfgEntry entries[2][FW_CFG_MAX_ENTRY];
|
2009-12-18 19:01:10 +08:00
|
|
|
FWCfgFiles *files;
|
2008-09-19 02:27:29 +08:00
|
|
|
uint16_t cur_entry;
|
2009-11-13 18:59:20 +08:00
|
|
|
uint32_t cur_offset;
|
2010-12-08 19:35:09 +08:00
|
|
|
Notifier machine_ready;
|
2009-12-18 19:01:09 +08:00
|
|
|
};
|
2008-09-19 02:27:29 +08:00
|
|
|
|
2014-12-22 20:11:35 +08:00
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|
|
struct FWCfgIoState {
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|
|
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/*< private >*/
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|
|
FWCfgState parent_obj;
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|
|
|
/*< public >*/
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|
|
MemoryRegion comb_iomem;
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|
|
uint32_t iobase;
|
|
|
|
};
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|
|
struct FWCfgMemState {
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|
|
/*< private >*/
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|
|
FWCfgState parent_obj;
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|
|
|
/*< public >*/
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|
|
MemoryRegion ctl_iomem, data_iomem;
|
2014-12-22 20:11:40 +08:00
|
|
|
uint32_t data_width;
|
|
|
|
MemoryRegionOps wide_data_ops;
|
2014-12-22 20:11:35 +08:00
|
|
|
};
|
|
|
|
|
2011-07-27 18:04:55 +08:00
|
|
|
#define JPG_FILE 0
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|
|
|
#define BMP_FILE 1
|
|
|
|
|
2013-05-22 11:01:43 +08:00
|
|
|
static char *read_splashfile(char *filename, gsize *file_sizep,
|
2013-01-24 01:25:08 +08:00
|
|
|
int *file_typep)
|
2011-07-27 18:04:55 +08:00
|
|
|
{
|
2011-10-24 19:31:30 +08:00
|
|
|
GError *err = NULL;
|
|
|
|
gboolean res;
|
|
|
|
gchar *content;
|
2013-01-24 01:25:09 +08:00
|
|
|
int file_type;
|
|
|
|
unsigned int filehead;
|
2011-07-27 18:04:55 +08:00
|
|
|
int bmp_bpp;
|
|
|
|
|
2013-01-24 01:25:08 +08:00
|
|
|
res = g_file_get_contents(filename, &content, file_sizep, &err);
|
2011-10-24 19:31:30 +08:00
|
|
|
if (res == FALSE) {
|
|
|
|
error_report("failed to read splash file '%s'", filename);
|
|
|
|
g_error_free(err);
|
|
|
|
return NULL;
|
2011-07-27 18:04:55 +08:00
|
|
|
}
|
2011-10-24 19:31:30 +08:00
|
|
|
|
2011-07-27 18:04:55 +08:00
|
|
|
/* check file size */
|
2011-10-24 19:31:30 +08:00
|
|
|
if (*file_sizep < 30) {
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|
goto error;
|
2011-07-27 18:04:55 +08:00
|
|
|
}
|
2011-10-24 19:31:30 +08:00
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|
2011-07-27 18:04:55 +08:00
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/* check magic ID */
|
2011-10-24 19:31:30 +08:00
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filehead = ((content[0] & 0xff) + (content[1] << 8)) & 0xffff;
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|
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if (filehead == 0xd8ff) {
|
2011-07-27 18:04:55 +08:00
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file_type = JPG_FILE;
|
2011-10-24 19:31:30 +08:00
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|
|
} else if (filehead == 0x4d42) {
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file_type = BMP_FILE;
|
2011-07-27 18:04:55 +08:00
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} else {
|
2011-10-24 19:31:30 +08:00
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goto error;
|
2011-07-27 18:04:55 +08:00
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}
|
2011-10-24 19:31:30 +08:00
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|
2011-07-27 18:04:55 +08:00
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/* check BMP bpp */
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if (file_type == BMP_FILE) {
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2011-10-24 19:31:30 +08:00
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bmp_bpp = (content[28] + (content[29] << 8)) & 0xffff;
|
2011-07-27 18:04:55 +08:00
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if (bmp_bpp != 24) {
|
2011-10-24 19:31:30 +08:00
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goto error;
|
2011-07-27 18:04:55 +08:00
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}
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}
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2011-10-24 19:31:30 +08:00
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2011-07-27 18:04:55 +08:00
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/* return values */
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*file_typep = file_type;
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2011-10-24 19:31:30 +08:00
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return content;
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error:
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|
error_report("splash file '%s' format not recognized; must be JPEG "
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|
|
"or 24 bit BMP", filename);
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g_free(content);
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return NULL;
|
2011-07-27 18:04:55 +08:00
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}
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static void fw_cfg_bootsplash(FWCfgState *s)
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|
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{
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|
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int boot_splash_time = -1;
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const char *boot_splash_filename = NULL;
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char *p;
|
2011-10-24 19:31:30 +08:00
|
|
|
char *filename, *file_data;
|
2013-05-22 11:01:43 +08:00
|
|
|
gsize file_size;
|
2013-01-24 01:25:09 +08:00
|
|
|
int file_type;
|
2011-07-27 18:04:55 +08:00
|
|
|
const char *temp;
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|
|
|
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|
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/* get user configuration */
|
|
|
|
QemuOptsList *plist = qemu_find_opts("boot-opts");
|
|
|
|
QemuOpts *opts = QTAILQ_FIRST(&plist->head);
|
|
|
|
if (opts != NULL) {
|
|
|
|
temp = qemu_opt_get(opts, "splash");
|
|
|
|
if (temp != NULL) {
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|
|
|
boot_splash_filename = temp;
|
|
|
|
}
|
|
|
|
temp = qemu_opt_get(opts, "splash-time");
|
|
|
|
if (temp != NULL) {
|
|
|
|
p = (char *)temp;
|
|
|
|
boot_splash_time = strtol(p, (char **)&p, 10);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/* insert splash time if user configurated */
|
|
|
|
if (boot_splash_time >= 0) {
|
|
|
|
/* validate the input */
|
|
|
|
if (boot_splash_time > 0xffff) {
|
|
|
|
error_report("splash time is big than 65535, force it to 65535.");
|
|
|
|
boot_splash_time = 0xffff;
|
|
|
|
}
|
|
|
|
/* use little endian format */
|
|
|
|
qemu_extra_params_fw[0] = (uint8_t)(boot_splash_time & 0xff);
|
|
|
|
qemu_extra_params_fw[1] = (uint8_t)((boot_splash_time >> 8) & 0xff);
|
|
|
|
fw_cfg_add_file(s, "etc/boot-menu-wait", qemu_extra_params_fw, 2);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* insert splash file if user configurated */
|
|
|
|
if (boot_splash_filename != NULL) {
|
|
|
|
filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, boot_splash_filename);
|
|
|
|
if (filename == NULL) {
|
|
|
|
error_report("failed to find file '%s'.", boot_splash_filename);
|
|
|
|
return;
|
|
|
|
}
|
2011-10-24 19:31:30 +08:00
|
|
|
|
|
|
|
/* loading file data */
|
|
|
|
file_data = read_splashfile(filename, &file_size, &file_type);
|
|
|
|
if (file_data == NULL) {
|
2011-08-21 11:09:37 +08:00
|
|
|
g_free(filename);
|
2011-07-27 18:04:55 +08:00
|
|
|
return;
|
|
|
|
}
|
|
|
|
if (boot_splash_filedata != NULL) {
|
2011-08-21 11:09:37 +08:00
|
|
|
g_free(boot_splash_filedata);
|
2011-07-27 18:04:55 +08:00
|
|
|
}
|
2011-10-24 19:31:30 +08:00
|
|
|
boot_splash_filedata = (uint8_t *)file_data;
|
2011-07-27 18:04:55 +08:00
|
|
|
boot_splash_filedata_size = file_size;
|
2011-10-24 19:31:30 +08:00
|
|
|
|
2011-07-27 18:04:55 +08:00
|
|
|
/* insert data */
|
|
|
|
if (file_type == JPG_FILE) {
|
|
|
|
fw_cfg_add_file(s, "bootsplash.jpg",
|
|
|
|
boot_splash_filedata, boot_splash_filedata_size);
|
|
|
|
} else {
|
|
|
|
fw_cfg_add_file(s, "bootsplash.bmp",
|
|
|
|
boot_splash_filedata, boot_splash_filedata_size);
|
|
|
|
}
|
2011-08-21 11:09:37 +08:00
|
|
|
g_free(filename);
|
2011-07-27 18:04:55 +08:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
add a boot parameter to set reboot timeout
Added an option to let qemu transfer a configuration file to bios,
"etc/boot-fail-wait", which could be specified by command
-boot reboot-timeout=T
T have a max value of 0xffff, unit is ms.
With this option, guest will wait for a given time if not find
bootabled device, then reboot. If reboot-timeout is '-1', guest
will not reboot, qemu passes '-1' to bios by default.
This feature need the new seabios's support.
Seabios pulls the value from the fwcfg "file" interface, this
interface is used because SeaBIOS needs a reliable way of
obtaining a name, value size, and value. It in no way requires
that there be a real file on the user's host machine.
Signed-off-by: Amos Kong <akong@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-09-07 11:11:03 +08:00
|
|
|
static void fw_cfg_reboot(FWCfgState *s)
|
|
|
|
{
|
|
|
|
int reboot_timeout = -1;
|
|
|
|
char *p;
|
|
|
|
const char *temp;
|
|
|
|
|
|
|
|
/* get user configuration */
|
|
|
|
QemuOptsList *plist = qemu_find_opts("boot-opts");
|
|
|
|
QemuOpts *opts = QTAILQ_FIRST(&plist->head);
|
|
|
|
if (opts != NULL) {
|
|
|
|
temp = qemu_opt_get(opts, "reboot-timeout");
|
|
|
|
if (temp != NULL) {
|
|
|
|
p = (char *)temp;
|
|
|
|
reboot_timeout = strtol(p, (char **)&p, 10);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
/* validate the input */
|
|
|
|
if (reboot_timeout > 0xffff) {
|
|
|
|
error_report("reboot timeout is larger than 65535, force it to 65535.");
|
|
|
|
reboot_timeout = 0xffff;
|
|
|
|
}
|
|
|
|
fw_cfg_add_file(s, "etc/boot-fail-wait", g_memdup(&reboot_timeout, 4), 4);
|
|
|
|
}
|
|
|
|
|
2008-09-19 02:27:29 +08:00
|
|
|
static void fw_cfg_write(FWCfgState *s, uint8_t value)
|
|
|
|
{
|
2015-04-29 23:21:50 +08:00
|
|
|
/* nothing, write support removed in QEMU v2.4+ */
|
2008-09-19 02:27:29 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
static int fw_cfg_select(FWCfgState *s, uint16_t key)
|
|
|
|
{
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
s->cur_offset = 0;
|
|
|
|
if ((key & FW_CFG_ENTRY_MASK) >= FW_CFG_MAX_ENTRY) {
|
|
|
|
s->cur_entry = FW_CFG_INVALID;
|
|
|
|
ret = 0;
|
|
|
|
} else {
|
|
|
|
s->cur_entry = key;
|
|
|
|
ret = 1;
|
|
|
|
}
|
|
|
|
|
2013-01-16 21:50:22 +08:00
|
|
|
trace_fw_cfg_select(s, key, ret);
|
2008-09-19 02:27:29 +08:00
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
static uint8_t fw_cfg_read(FWCfgState *s)
|
|
|
|
{
|
|
|
|
int arch = !!(s->cur_entry & FW_CFG_ARCH_LOCAL);
|
|
|
|
FWCfgEntry *e = &s->entries[arch][s->cur_entry & FW_CFG_ENTRY_MASK];
|
|
|
|
uint8_t ret;
|
|
|
|
|
|
|
|
if (s->cur_entry == FW_CFG_INVALID || !e->data || s->cur_offset >= e->len)
|
|
|
|
ret = 0;
|
2013-09-01 22:56:20 +08:00
|
|
|
else {
|
|
|
|
if (e->read_callback) {
|
|
|
|
e->read_callback(e->callback_opaque, s->cur_offset);
|
|
|
|
}
|
2008-09-19 02:27:29 +08:00
|
|
|
ret = e->data[s->cur_offset++];
|
2013-09-01 22:56:20 +08:00
|
|
|
}
|
2008-09-19 02:27:29 +08:00
|
|
|
|
2013-01-16 21:50:22 +08:00
|
|
|
trace_fw_cfg_read(s, ret);
|
2008-09-19 02:27:29 +08:00
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2012-10-23 18:30:10 +08:00
|
|
|
static uint64_t fw_cfg_data_mem_read(void *opaque, hwaddr addr,
|
2011-11-13 21:05:28 +08:00
|
|
|
unsigned size)
|
2008-09-19 02:27:29 +08:00
|
|
|
{
|
2014-12-22 20:11:40 +08:00
|
|
|
FWCfgState *s = opaque;
|
fw_cfg: fix endianness in fw_cfg_data_mem_read() / _write()
(1) Let's contemplate what device endianness means, for a memory mapped
device register (independently of QEMU -- that is, on physical hardware).
It determines the byte order that the device will put on the data bus when
the device is producing a *numerical value* for the CPU. This byte order
may differ from the CPU's own byte order, therefore when software wants to
consume the *numerical value*, it may have to swap the byte order first.
For example, suppose we have a device that exposes in a 2-byte register
the number of sheep we have to count before falling asleep. If the value
is decimal 37 (0x0025), then a big endian register will produce [0x00,
0x25], while a little endian register will produce [0x25, 0x00].
If the device register is big endian, but the CPU is little endian, the
numerical value will read as 0x2500 (decimal 9472), which software has to
byte swap before use.
However... if we ask the device about who stole our herd of sheep, and it
answers "XY", then the byte representation coming out of the register must
be [0x58, 0x59], regardless of the device register's endianness for
numeric values. And, software needs to copy these bytes into a string
field regardless of the CPU's own endianness.
(2) QEMU's device register accessor functions work with *numerical values*
exclusively, not strings:
The emulated register's read accessor function returns the numerical value
(eg. 37 decimal, 0x0025) as a *host-encoded* uint64_t. QEMU translates
this value for the guest to the endianness of the emulated device register
(which is recorded in MemoryRegionOps.endianness). Then guest code must
translate the numerical value from device register to guest CPU
endianness, before including it in any computation (see (1)).
(3) However, the data register of the fw_cfg device shall transfer strings
*only* -- that is, opaque blobs. Interpretation of any given blob is
subject to further agreement -- it can be an integer in an independently
determined byte order, or a genuine string, or an array of structs of
integers (in some byte order) and fixed size strings, and so on.
Because register emulation in QEMU is integer-preserving, not
string-preserving (see (2)), we have to jump through a few hoops.
(3a) We defined the memory mapped fw_cfg data register as
DEVICE_BIG_ENDIAN.
The particular choice is not really relevant -- we picked BE only for
consistency with the control register, which *does* transfer integers --
but our choice affects how we must host-encode values from fw_cfg strings.
(3b) Since we want the fw_cfg string "XY" to appear as the [0x58, 0x59]
array on the data register, *and* we picked DEVICE_BIG_ENDIAN, we must
compose the host (== C language) value 0x5859 in the read accessor
function.
(3c) When the guest performs the read access, the immediate uint16_t value
will be 0x5958 (in LE guests) and 0x5859 (in BE guests). However, the
uint16_t value does not matter. The only thing that matters is the byte
pattern [0x58, 0x59], which the guest code must copy into the target
string *without* any byte-swapping.
(4) Now I get to explain where I screwed up. :(
When we decided for big endian *integer* representation in the MMIO data
register -- see (3a) --, I mindlessly added an indiscriminate
byte-swizzling step to the (little endian) guest firmware.
This was a grave error -- it violates (3c) --, but I didn't realize it. I
only saw that the code I otherwise intended for fw_cfg_data_mem_read():
value = 0;
for (i = 0; i < size; ++i) {
value = (value << 8) | fw_cfg_read(s);
}
didn't produce the expected result in the guest.
In true facepalm style, instead of blaming my guest code (which violated
(3c)), I blamed my host code (which was correct). Ultimately, I coded
ldX_he_p() into fw_cfg_data_mem_read(), because that happened to work.
Obviously (...in retrospect) that was wrong. Only because my host happened
to be LE, ldX_he_p() composed the (otherwise incorrect) host value 0x5958
from the fw_cfg string "XY". And that happened to compensate for the bogus
indiscriminate byte-swizzling in my guest code.
Clearly the current code leaks the host endianness through to the guest,
which is wrong. Any device should work the same regardless of host
endianness.
The solution is to compose the host-endian representation (2) of the big
endian interpretation (3a, 3b) of the fw_cfg string, and to drop the wrong
byte-swizzling in the guest (3c).
Brown paper bag time for me.
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Message-id: 1420024880-15416-1-git-send-email-lersek@redhat.com
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-01-16 19:54:30 +08:00
|
|
|
uint64_t value = 0;
|
2014-12-22 20:11:40 +08:00
|
|
|
unsigned i;
|
|
|
|
|
|
|
|
for (i = 0; i < size; ++i) {
|
fw_cfg: fix endianness in fw_cfg_data_mem_read() / _write()
(1) Let's contemplate what device endianness means, for a memory mapped
device register (independently of QEMU -- that is, on physical hardware).
It determines the byte order that the device will put on the data bus when
the device is producing a *numerical value* for the CPU. This byte order
may differ from the CPU's own byte order, therefore when software wants to
consume the *numerical value*, it may have to swap the byte order first.
For example, suppose we have a device that exposes in a 2-byte register
the number of sheep we have to count before falling asleep. If the value
is decimal 37 (0x0025), then a big endian register will produce [0x00,
0x25], while a little endian register will produce [0x25, 0x00].
If the device register is big endian, but the CPU is little endian, the
numerical value will read as 0x2500 (decimal 9472), which software has to
byte swap before use.
However... if we ask the device about who stole our herd of sheep, and it
answers "XY", then the byte representation coming out of the register must
be [0x58, 0x59], regardless of the device register's endianness for
numeric values. And, software needs to copy these bytes into a string
field regardless of the CPU's own endianness.
(2) QEMU's device register accessor functions work with *numerical values*
exclusively, not strings:
The emulated register's read accessor function returns the numerical value
(eg. 37 decimal, 0x0025) as a *host-encoded* uint64_t. QEMU translates
this value for the guest to the endianness of the emulated device register
(which is recorded in MemoryRegionOps.endianness). Then guest code must
translate the numerical value from device register to guest CPU
endianness, before including it in any computation (see (1)).
(3) However, the data register of the fw_cfg device shall transfer strings
*only* -- that is, opaque blobs. Interpretation of any given blob is
subject to further agreement -- it can be an integer in an independently
determined byte order, or a genuine string, or an array of structs of
integers (in some byte order) and fixed size strings, and so on.
Because register emulation in QEMU is integer-preserving, not
string-preserving (see (2)), we have to jump through a few hoops.
(3a) We defined the memory mapped fw_cfg data register as
DEVICE_BIG_ENDIAN.
The particular choice is not really relevant -- we picked BE only for
consistency with the control register, which *does* transfer integers --
but our choice affects how we must host-encode values from fw_cfg strings.
(3b) Since we want the fw_cfg string "XY" to appear as the [0x58, 0x59]
array on the data register, *and* we picked DEVICE_BIG_ENDIAN, we must
compose the host (== C language) value 0x5859 in the read accessor
function.
(3c) When the guest performs the read access, the immediate uint16_t value
will be 0x5958 (in LE guests) and 0x5859 (in BE guests). However, the
uint16_t value does not matter. The only thing that matters is the byte
pattern [0x58, 0x59], which the guest code must copy into the target
string *without* any byte-swapping.
(4) Now I get to explain where I screwed up. :(
When we decided for big endian *integer* representation in the MMIO data
register -- see (3a) --, I mindlessly added an indiscriminate
byte-swizzling step to the (little endian) guest firmware.
This was a grave error -- it violates (3c) --, but I didn't realize it. I
only saw that the code I otherwise intended for fw_cfg_data_mem_read():
value = 0;
for (i = 0; i < size; ++i) {
value = (value << 8) | fw_cfg_read(s);
}
didn't produce the expected result in the guest.
In true facepalm style, instead of blaming my guest code (which violated
(3c)), I blamed my host code (which was correct). Ultimately, I coded
ldX_he_p() into fw_cfg_data_mem_read(), because that happened to work.
Obviously (...in retrospect) that was wrong. Only because my host happened
to be LE, ldX_he_p() composed the (otherwise incorrect) host value 0x5958
from the fw_cfg string "XY". And that happened to compensate for the bogus
indiscriminate byte-swizzling in my guest code.
Clearly the current code leaks the host endianness through to the guest,
which is wrong. Any device should work the same regardless of host
endianness.
The solution is to compose the host-endian representation (2) of the big
endian interpretation (3a, 3b) of the fw_cfg string, and to drop the wrong
byte-swizzling in the guest (3c).
Brown paper bag time for me.
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Message-id: 1420024880-15416-1-git-send-email-lersek@redhat.com
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-01-16 19:54:30 +08:00
|
|
|
value = (value << 8) | fw_cfg_read(s);
|
2014-12-22 20:11:40 +08:00
|
|
|
}
|
fw_cfg: fix endianness in fw_cfg_data_mem_read() / _write()
(1) Let's contemplate what device endianness means, for a memory mapped
device register (independently of QEMU -- that is, on physical hardware).
It determines the byte order that the device will put on the data bus when
the device is producing a *numerical value* for the CPU. This byte order
may differ from the CPU's own byte order, therefore when software wants to
consume the *numerical value*, it may have to swap the byte order first.
For example, suppose we have a device that exposes in a 2-byte register
the number of sheep we have to count before falling asleep. If the value
is decimal 37 (0x0025), then a big endian register will produce [0x00,
0x25], while a little endian register will produce [0x25, 0x00].
If the device register is big endian, but the CPU is little endian, the
numerical value will read as 0x2500 (decimal 9472), which software has to
byte swap before use.
However... if we ask the device about who stole our herd of sheep, and it
answers "XY", then the byte representation coming out of the register must
be [0x58, 0x59], regardless of the device register's endianness for
numeric values. And, software needs to copy these bytes into a string
field regardless of the CPU's own endianness.
(2) QEMU's device register accessor functions work with *numerical values*
exclusively, not strings:
The emulated register's read accessor function returns the numerical value
(eg. 37 decimal, 0x0025) as a *host-encoded* uint64_t. QEMU translates
this value for the guest to the endianness of the emulated device register
(which is recorded in MemoryRegionOps.endianness). Then guest code must
translate the numerical value from device register to guest CPU
endianness, before including it in any computation (see (1)).
(3) However, the data register of the fw_cfg device shall transfer strings
*only* -- that is, opaque blobs. Interpretation of any given blob is
subject to further agreement -- it can be an integer in an independently
determined byte order, or a genuine string, or an array of structs of
integers (in some byte order) and fixed size strings, and so on.
Because register emulation in QEMU is integer-preserving, not
string-preserving (see (2)), we have to jump through a few hoops.
(3a) We defined the memory mapped fw_cfg data register as
DEVICE_BIG_ENDIAN.
The particular choice is not really relevant -- we picked BE only for
consistency with the control register, which *does* transfer integers --
but our choice affects how we must host-encode values from fw_cfg strings.
(3b) Since we want the fw_cfg string "XY" to appear as the [0x58, 0x59]
array on the data register, *and* we picked DEVICE_BIG_ENDIAN, we must
compose the host (== C language) value 0x5859 in the read accessor
function.
(3c) When the guest performs the read access, the immediate uint16_t value
will be 0x5958 (in LE guests) and 0x5859 (in BE guests). However, the
uint16_t value does not matter. The only thing that matters is the byte
pattern [0x58, 0x59], which the guest code must copy into the target
string *without* any byte-swapping.
(4) Now I get to explain where I screwed up. :(
When we decided for big endian *integer* representation in the MMIO data
register -- see (3a) --, I mindlessly added an indiscriminate
byte-swizzling step to the (little endian) guest firmware.
This was a grave error -- it violates (3c) --, but I didn't realize it. I
only saw that the code I otherwise intended for fw_cfg_data_mem_read():
value = 0;
for (i = 0; i < size; ++i) {
value = (value << 8) | fw_cfg_read(s);
}
didn't produce the expected result in the guest.
In true facepalm style, instead of blaming my guest code (which violated
(3c)), I blamed my host code (which was correct). Ultimately, I coded
ldX_he_p() into fw_cfg_data_mem_read(), because that happened to work.
Obviously (...in retrospect) that was wrong. Only because my host happened
to be LE, ldX_he_p() composed the (otherwise incorrect) host value 0x5958
from the fw_cfg string "XY". And that happened to compensate for the bogus
indiscriminate byte-swizzling in my guest code.
Clearly the current code leaks the host endianness through to the guest,
which is wrong. Any device should work the same regardless of host
endianness.
The solution is to compose the host-endian representation (2) of the big
endian interpretation (3a, 3b) of the fw_cfg string, and to drop the wrong
byte-swizzling in the guest (3c).
Brown paper bag time for me.
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Message-id: 1420024880-15416-1-git-send-email-lersek@redhat.com
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-01-16 19:54:30 +08:00
|
|
|
return value;
|
2008-09-19 02:27:29 +08:00
|
|
|
}
|
|
|
|
|
2012-10-23 18:30:10 +08:00
|
|
|
static void fw_cfg_data_mem_write(void *opaque, hwaddr addr,
|
2011-11-13 21:05:28 +08:00
|
|
|
uint64_t value, unsigned size)
|
2008-09-19 02:27:29 +08:00
|
|
|
{
|
2014-12-22 20:11:40 +08:00
|
|
|
FWCfgState *s = opaque;
|
fw_cfg: fix endianness in fw_cfg_data_mem_read() / _write()
(1) Let's contemplate what device endianness means, for a memory mapped
device register (independently of QEMU -- that is, on physical hardware).
It determines the byte order that the device will put on the data bus when
the device is producing a *numerical value* for the CPU. This byte order
may differ from the CPU's own byte order, therefore when software wants to
consume the *numerical value*, it may have to swap the byte order first.
For example, suppose we have a device that exposes in a 2-byte register
the number of sheep we have to count before falling asleep. If the value
is decimal 37 (0x0025), then a big endian register will produce [0x00,
0x25], while a little endian register will produce [0x25, 0x00].
If the device register is big endian, but the CPU is little endian, the
numerical value will read as 0x2500 (decimal 9472), which software has to
byte swap before use.
However... if we ask the device about who stole our herd of sheep, and it
answers "XY", then the byte representation coming out of the register must
be [0x58, 0x59], regardless of the device register's endianness for
numeric values. And, software needs to copy these bytes into a string
field regardless of the CPU's own endianness.
(2) QEMU's device register accessor functions work with *numerical values*
exclusively, not strings:
The emulated register's read accessor function returns the numerical value
(eg. 37 decimal, 0x0025) as a *host-encoded* uint64_t. QEMU translates
this value for the guest to the endianness of the emulated device register
(which is recorded in MemoryRegionOps.endianness). Then guest code must
translate the numerical value from device register to guest CPU
endianness, before including it in any computation (see (1)).
(3) However, the data register of the fw_cfg device shall transfer strings
*only* -- that is, opaque blobs. Interpretation of any given blob is
subject to further agreement -- it can be an integer in an independently
determined byte order, or a genuine string, or an array of structs of
integers (in some byte order) and fixed size strings, and so on.
Because register emulation in QEMU is integer-preserving, not
string-preserving (see (2)), we have to jump through a few hoops.
(3a) We defined the memory mapped fw_cfg data register as
DEVICE_BIG_ENDIAN.
The particular choice is not really relevant -- we picked BE only for
consistency with the control register, which *does* transfer integers --
but our choice affects how we must host-encode values from fw_cfg strings.
(3b) Since we want the fw_cfg string "XY" to appear as the [0x58, 0x59]
array on the data register, *and* we picked DEVICE_BIG_ENDIAN, we must
compose the host (== C language) value 0x5859 in the read accessor
function.
(3c) When the guest performs the read access, the immediate uint16_t value
will be 0x5958 (in LE guests) and 0x5859 (in BE guests). However, the
uint16_t value does not matter. The only thing that matters is the byte
pattern [0x58, 0x59], which the guest code must copy into the target
string *without* any byte-swapping.
(4) Now I get to explain where I screwed up. :(
When we decided for big endian *integer* representation in the MMIO data
register -- see (3a) --, I mindlessly added an indiscriminate
byte-swizzling step to the (little endian) guest firmware.
This was a grave error -- it violates (3c) --, but I didn't realize it. I
only saw that the code I otherwise intended for fw_cfg_data_mem_read():
value = 0;
for (i = 0; i < size; ++i) {
value = (value << 8) | fw_cfg_read(s);
}
didn't produce the expected result in the guest.
In true facepalm style, instead of blaming my guest code (which violated
(3c)), I blamed my host code (which was correct). Ultimately, I coded
ldX_he_p() into fw_cfg_data_mem_read(), because that happened to work.
Obviously (...in retrospect) that was wrong. Only because my host happened
to be LE, ldX_he_p() composed the (otherwise incorrect) host value 0x5958
from the fw_cfg string "XY". And that happened to compensate for the bogus
indiscriminate byte-swizzling in my guest code.
Clearly the current code leaks the host endianness through to the guest,
which is wrong. Any device should work the same regardless of host
endianness.
The solution is to compose the host-endian representation (2) of the big
endian interpretation (3a, 3b) of the fw_cfg string, and to drop the wrong
byte-swizzling in the guest (3c).
Brown paper bag time for me.
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Message-id: 1420024880-15416-1-git-send-email-lersek@redhat.com
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-01-16 19:54:30 +08:00
|
|
|
unsigned i = size;
|
2014-12-22 20:11:40 +08:00
|
|
|
|
fw_cfg: fix endianness in fw_cfg_data_mem_read() / _write()
(1) Let's contemplate what device endianness means, for a memory mapped
device register (independently of QEMU -- that is, on physical hardware).
It determines the byte order that the device will put on the data bus when
the device is producing a *numerical value* for the CPU. This byte order
may differ from the CPU's own byte order, therefore when software wants to
consume the *numerical value*, it may have to swap the byte order first.
For example, suppose we have a device that exposes in a 2-byte register
the number of sheep we have to count before falling asleep. If the value
is decimal 37 (0x0025), then a big endian register will produce [0x00,
0x25], while a little endian register will produce [0x25, 0x00].
If the device register is big endian, but the CPU is little endian, the
numerical value will read as 0x2500 (decimal 9472), which software has to
byte swap before use.
However... if we ask the device about who stole our herd of sheep, and it
answers "XY", then the byte representation coming out of the register must
be [0x58, 0x59], regardless of the device register's endianness for
numeric values. And, software needs to copy these bytes into a string
field regardless of the CPU's own endianness.
(2) QEMU's device register accessor functions work with *numerical values*
exclusively, not strings:
The emulated register's read accessor function returns the numerical value
(eg. 37 decimal, 0x0025) as a *host-encoded* uint64_t. QEMU translates
this value for the guest to the endianness of the emulated device register
(which is recorded in MemoryRegionOps.endianness). Then guest code must
translate the numerical value from device register to guest CPU
endianness, before including it in any computation (see (1)).
(3) However, the data register of the fw_cfg device shall transfer strings
*only* -- that is, opaque blobs. Interpretation of any given blob is
subject to further agreement -- it can be an integer in an independently
determined byte order, or a genuine string, or an array of structs of
integers (in some byte order) and fixed size strings, and so on.
Because register emulation in QEMU is integer-preserving, not
string-preserving (see (2)), we have to jump through a few hoops.
(3a) We defined the memory mapped fw_cfg data register as
DEVICE_BIG_ENDIAN.
The particular choice is not really relevant -- we picked BE only for
consistency with the control register, which *does* transfer integers --
but our choice affects how we must host-encode values from fw_cfg strings.
(3b) Since we want the fw_cfg string "XY" to appear as the [0x58, 0x59]
array on the data register, *and* we picked DEVICE_BIG_ENDIAN, we must
compose the host (== C language) value 0x5859 in the read accessor
function.
(3c) When the guest performs the read access, the immediate uint16_t value
will be 0x5958 (in LE guests) and 0x5859 (in BE guests). However, the
uint16_t value does not matter. The only thing that matters is the byte
pattern [0x58, 0x59], which the guest code must copy into the target
string *without* any byte-swapping.
(4) Now I get to explain where I screwed up. :(
When we decided for big endian *integer* representation in the MMIO data
register -- see (3a) --, I mindlessly added an indiscriminate
byte-swizzling step to the (little endian) guest firmware.
This was a grave error -- it violates (3c) --, but I didn't realize it. I
only saw that the code I otherwise intended for fw_cfg_data_mem_read():
value = 0;
for (i = 0; i < size; ++i) {
value = (value << 8) | fw_cfg_read(s);
}
didn't produce the expected result in the guest.
In true facepalm style, instead of blaming my guest code (which violated
(3c)), I blamed my host code (which was correct). Ultimately, I coded
ldX_he_p() into fw_cfg_data_mem_read(), because that happened to work.
Obviously (...in retrospect) that was wrong. Only because my host happened
to be LE, ldX_he_p() composed the (otherwise incorrect) host value 0x5958
from the fw_cfg string "XY". And that happened to compensate for the bogus
indiscriminate byte-swizzling in my guest code.
Clearly the current code leaks the host endianness through to the guest,
which is wrong. Any device should work the same regardless of host
endianness.
The solution is to compose the host-endian representation (2) of the big
endian interpretation (3a, 3b) of the fw_cfg string, and to drop the wrong
byte-swizzling in the guest (3c).
Brown paper bag time for me.
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Message-id: 1420024880-15416-1-git-send-email-lersek@redhat.com
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-01-16 19:54:30 +08:00
|
|
|
do {
|
|
|
|
fw_cfg_write(s, value >> (8 * --i));
|
|
|
|
} while (i);
|
2014-12-22 20:11:40 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
static bool fw_cfg_data_mem_valid(void *opaque, hwaddr addr,
|
|
|
|
unsigned size, bool is_write)
|
|
|
|
{
|
|
|
|
return addr == 0;
|
2008-09-19 02:27:29 +08:00
|
|
|
}
|
|
|
|
|
2012-10-23 18:30:10 +08:00
|
|
|
static void fw_cfg_ctl_mem_write(void *opaque, hwaddr addr,
|
2011-11-13 21:05:28 +08:00
|
|
|
uint64_t value, unsigned size)
|
2008-09-19 02:27:29 +08:00
|
|
|
{
|
|
|
|
fw_cfg_select(opaque, (uint16_t)value);
|
|
|
|
}
|
|
|
|
|
2012-10-23 18:30:10 +08:00
|
|
|
static bool fw_cfg_ctl_mem_valid(void *opaque, hwaddr addr,
|
2011-11-13 21:05:28 +08:00
|
|
|
unsigned size, bool is_write)
|
2008-09-19 02:27:29 +08:00
|
|
|
{
|
2011-11-13 21:05:28 +08:00
|
|
|
return is_write && size == 2;
|
2008-09-19 02:27:29 +08:00
|
|
|
}
|
|
|
|
|
2012-10-23 18:30:10 +08:00
|
|
|
static uint64_t fw_cfg_comb_read(void *opaque, hwaddr addr,
|
2011-11-13 21:05:28 +08:00
|
|
|
unsigned size)
|
2008-09-19 02:27:29 +08:00
|
|
|
{
|
2011-11-13 21:05:28 +08:00
|
|
|
return fw_cfg_read(opaque);
|
2008-09-19 02:27:29 +08:00
|
|
|
}
|
|
|
|
|
2012-10-23 18:30:10 +08:00
|
|
|
static void fw_cfg_comb_write(void *opaque, hwaddr addr,
|
2011-11-13 21:05:28 +08:00
|
|
|
uint64_t value, unsigned size)
|
2008-09-19 02:27:29 +08:00
|
|
|
{
|
2011-11-13 21:05:28 +08:00
|
|
|
switch (size) {
|
|
|
|
case 1:
|
|
|
|
fw_cfg_write(opaque, (uint8_t)value);
|
|
|
|
break;
|
|
|
|
case 2:
|
|
|
|
fw_cfg_select(opaque, (uint16_t)value);
|
|
|
|
break;
|
|
|
|
}
|
2008-09-19 02:27:29 +08:00
|
|
|
}
|
|
|
|
|
2012-10-23 18:30:10 +08:00
|
|
|
static bool fw_cfg_comb_valid(void *opaque, hwaddr addr,
|
2011-11-13 21:05:28 +08:00
|
|
|
unsigned size, bool is_write)
|
|
|
|
{
|
|
|
|
return (size == 1) || (is_write && size == 2);
|
|
|
|
}
|
2008-09-19 02:27:29 +08:00
|
|
|
|
2011-11-13 21:05:28 +08:00
|
|
|
static const MemoryRegionOps fw_cfg_ctl_mem_ops = {
|
|
|
|
.write = fw_cfg_ctl_mem_write,
|
2014-12-22 20:11:38 +08:00
|
|
|
.endianness = DEVICE_BIG_ENDIAN,
|
2011-11-13 21:05:28 +08:00
|
|
|
.valid.accepts = fw_cfg_ctl_mem_valid,
|
2008-09-19 02:27:29 +08:00
|
|
|
};
|
|
|
|
|
2011-11-13 21:05:28 +08:00
|
|
|
static const MemoryRegionOps fw_cfg_data_mem_ops = {
|
|
|
|
.read = fw_cfg_data_mem_read,
|
|
|
|
.write = fw_cfg_data_mem_write,
|
2014-12-22 20:11:38 +08:00
|
|
|
.endianness = DEVICE_BIG_ENDIAN,
|
2011-11-13 21:05:28 +08:00
|
|
|
.valid = {
|
|
|
|
.min_access_size = 1,
|
|
|
|
.max_access_size = 1,
|
2014-12-22 20:11:40 +08:00
|
|
|
.accepts = fw_cfg_data_mem_valid,
|
2011-11-13 21:05:28 +08:00
|
|
|
},
|
2008-09-19 02:27:29 +08:00
|
|
|
};
|
|
|
|
|
2011-11-13 21:05:28 +08:00
|
|
|
static const MemoryRegionOps fw_cfg_comb_mem_ops = {
|
|
|
|
.read = fw_cfg_comb_read,
|
|
|
|
.write = fw_cfg_comb_write,
|
2013-07-28 20:35:54 +08:00
|
|
|
.endianness = DEVICE_LITTLE_ENDIAN,
|
2011-11-13 21:05:28 +08:00
|
|
|
.valid.accepts = fw_cfg_comb_valid,
|
2008-09-19 02:27:29 +08:00
|
|
|
};
|
|
|
|
|
2010-06-28 00:04:55 +08:00
|
|
|
static void fw_cfg_reset(DeviceState *d)
|
2008-09-19 02:27:29 +08:00
|
|
|
{
|
2013-07-01 18:18:32 +08:00
|
|
|
FWCfgState *s = FW_CFG(d);
|
2008-09-19 02:27:29 +08:00
|
|
|
|
|
|
|
fw_cfg_select(s, 0);
|
|
|
|
}
|
|
|
|
|
2009-11-13 18:59:20 +08:00
|
|
|
/* Save restore 32 bit int as uint16_t
|
|
|
|
This is a Big hack, but it is how the old state did it.
|
|
|
|
Or we broke compatibility in the state, or we can't use struct tm
|
|
|
|
*/
|
|
|
|
|
|
|
|
static int get_uint32_as_uint16(QEMUFile *f, void *pv, size_t size)
|
|
|
|
{
|
|
|
|
uint32_t *v = pv;
|
|
|
|
*v = qemu_get_be16(f);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void put_unused(QEMUFile *f, void *pv, size_t size)
|
|
|
|
{
|
2010-03-14 16:51:53 +08:00
|
|
|
fprintf(stderr, "uint32_as_uint16 is only used for backward compatibility.\n");
|
2009-11-13 18:59:20 +08:00
|
|
|
fprintf(stderr, "This functions shouldn't be called.\n");
|
|
|
|
}
|
|
|
|
|
2009-12-05 04:44:44 +08:00
|
|
|
static const VMStateInfo vmstate_hack_uint32_as_uint16 = {
|
2009-11-13 18:59:20 +08:00
|
|
|
.name = "int32_as_uint16",
|
|
|
|
.get = get_uint32_as_uint16,
|
|
|
|
.put = put_unused,
|
|
|
|
};
|
|
|
|
|
|
|
|
#define VMSTATE_UINT16_HACK(_f, _s, _t) \
|
|
|
|
VMSTATE_SINGLE_TEST(_f, _s, _t, 0, vmstate_hack_uint32_as_uint16, uint32_t)
|
|
|
|
|
|
|
|
|
|
|
|
static bool is_version_1(void *opaque, int version_id)
|
|
|
|
{
|
|
|
|
return version_id == 1;
|
|
|
|
}
|
|
|
|
|
2009-09-10 09:04:34 +08:00
|
|
|
static const VMStateDescription vmstate_fw_cfg = {
|
|
|
|
.name = "fw_cfg",
|
2009-11-13 18:59:20 +08:00
|
|
|
.version_id = 2,
|
2009-09-10 09:04:34 +08:00
|
|
|
.minimum_version_id = 1,
|
2014-04-16 21:32:32 +08:00
|
|
|
.fields = (VMStateField[]) {
|
2009-09-10 09:04:34 +08:00
|
|
|
VMSTATE_UINT16(cur_entry, FWCfgState),
|
2009-11-13 18:59:20 +08:00
|
|
|
VMSTATE_UINT16_HACK(cur_offset, FWCfgState, is_version_1),
|
|
|
|
VMSTATE_UINT32_V(cur_offset, FWCfgState, 2),
|
2009-09-10 09:04:34 +08:00
|
|
|
VMSTATE_END_OF_LIST()
|
|
|
|
}
|
|
|
|
};
|
2008-09-19 02:27:29 +08:00
|
|
|
|
2013-09-01 22:56:20 +08:00
|
|
|
static void fw_cfg_add_bytes_read_callback(FWCfgState *s, uint16_t key,
|
|
|
|
FWCfgReadCallback callback,
|
|
|
|
void *callback_opaque,
|
|
|
|
void *data, size_t len)
|
2008-09-19 02:27:29 +08:00
|
|
|
{
|
|
|
|
int arch = !!(key & FW_CFG_ARCH_LOCAL);
|
|
|
|
|
|
|
|
key &= FW_CFG_ENTRY_MASK;
|
|
|
|
|
2013-01-16 21:50:28 +08:00
|
|
|
assert(key < FW_CFG_MAX_ENTRY && len < UINT32_MAX);
|
2015-04-29 23:21:51 +08:00
|
|
|
assert(s->entries[arch][key].data == NULL); /* avoid key conflict */
|
2008-09-19 02:27:29 +08:00
|
|
|
|
|
|
|
s->entries[arch][key].data = data;
|
2013-01-16 21:50:28 +08:00
|
|
|
s->entries[arch][key].len = (uint32_t)len;
|
2013-09-01 22:56:20 +08:00
|
|
|
s->entries[arch][key].read_callback = callback;
|
|
|
|
s->entries[arch][key].callback_opaque = callback_opaque;
|
|
|
|
}
|
|
|
|
|
2014-10-07 16:00:08 +08:00
|
|
|
static void *fw_cfg_modify_bytes_read(FWCfgState *s, uint16_t key,
|
|
|
|
void *data, size_t len)
|
|
|
|
{
|
|
|
|
void *ptr;
|
|
|
|
int arch = !!(key & FW_CFG_ARCH_LOCAL);
|
|
|
|
|
|
|
|
key &= FW_CFG_ENTRY_MASK;
|
|
|
|
|
|
|
|
assert(key < FW_CFG_MAX_ENTRY && len < UINT32_MAX);
|
|
|
|
|
|
|
|
/* return the old data to the function caller, avoid memory leak */
|
|
|
|
ptr = s->entries[arch][key].data;
|
|
|
|
s->entries[arch][key].data = data;
|
|
|
|
s->entries[arch][key].len = len;
|
|
|
|
s->entries[arch][key].callback_opaque = NULL;
|
|
|
|
|
|
|
|
return ptr;
|
|
|
|
}
|
|
|
|
|
2013-09-01 22:56:20 +08:00
|
|
|
void fw_cfg_add_bytes(FWCfgState *s, uint16_t key, void *data, size_t len)
|
|
|
|
{
|
|
|
|
fw_cfg_add_bytes_read_callback(s, key, NULL, NULL, data, len);
|
2008-09-19 02:27:29 +08:00
|
|
|
}
|
|
|
|
|
2013-01-16 21:50:24 +08:00
|
|
|
void fw_cfg_add_string(FWCfgState *s, uint16_t key, const char *value)
|
|
|
|
{
|
|
|
|
size_t sz = strlen(value) + 1;
|
|
|
|
|
2015-03-09 02:30:01 +08:00
|
|
|
fw_cfg_add_bytes(s, key, g_memdup(value, sz), sz);
|
2013-01-16 21:50:24 +08:00
|
|
|
}
|
|
|
|
|
2013-01-16 21:50:23 +08:00
|
|
|
void fw_cfg_add_i16(FWCfgState *s, uint16_t key, uint16_t value)
|
2008-09-19 02:27:29 +08:00
|
|
|
{
|
|
|
|
uint16_t *copy;
|
|
|
|
|
2011-08-21 11:09:37 +08:00
|
|
|
copy = g_malloc(sizeof(value));
|
2008-09-19 02:27:29 +08:00
|
|
|
*copy = cpu_to_le16(value);
|
2013-01-16 21:50:28 +08:00
|
|
|
fw_cfg_add_bytes(s, key, copy, sizeof(value));
|
2008-09-19 02:27:29 +08:00
|
|
|
}
|
|
|
|
|
2015-06-09 02:10:44 +08:00
|
|
|
void fw_cfg_modify_i16(FWCfgState *s, uint16_t key, uint16_t value)
|
|
|
|
{
|
|
|
|
uint16_t *copy, *old;
|
|
|
|
|
|
|
|
copy = g_malloc(sizeof(value));
|
|
|
|
*copy = cpu_to_le16(value);
|
|
|
|
old = fw_cfg_modify_bytes_read(s, key, copy, sizeof(value));
|
|
|
|
g_free(old);
|
|
|
|
}
|
|
|
|
|
2013-01-16 21:50:23 +08:00
|
|
|
void fw_cfg_add_i32(FWCfgState *s, uint16_t key, uint32_t value)
|
2008-09-19 02:27:29 +08:00
|
|
|
{
|
|
|
|
uint32_t *copy;
|
|
|
|
|
2011-08-21 11:09:37 +08:00
|
|
|
copy = g_malloc(sizeof(value));
|
2008-09-19 02:27:29 +08:00
|
|
|
*copy = cpu_to_le32(value);
|
2013-01-16 21:50:28 +08:00
|
|
|
fw_cfg_add_bytes(s, key, copy, sizeof(value));
|
2008-09-19 02:27:29 +08:00
|
|
|
}
|
|
|
|
|
2013-01-16 21:50:23 +08:00
|
|
|
void fw_cfg_add_i64(FWCfgState *s, uint16_t key, uint64_t value)
|
2008-09-19 02:27:29 +08:00
|
|
|
{
|
|
|
|
uint64_t *copy;
|
|
|
|
|
2011-08-21 11:09:37 +08:00
|
|
|
copy = g_malloc(sizeof(value));
|
2008-09-19 02:27:29 +08:00
|
|
|
*copy = cpu_to_le64(value);
|
2013-01-16 21:50:28 +08:00
|
|
|
fw_cfg_add_bytes(s, key, copy, sizeof(value));
|
2008-09-19 02:27:29 +08:00
|
|
|
}
|
|
|
|
|
2013-09-01 22:56:20 +08:00
|
|
|
void fw_cfg_add_file_callback(FWCfgState *s, const char *filename,
|
|
|
|
FWCfgReadCallback callback, void *callback_opaque,
|
|
|
|
void *data, size_t len)
|
2009-12-18 19:01:10 +08:00
|
|
|
{
|
2010-01-08 22:25:39 +08:00
|
|
|
int i, index;
|
2013-01-16 21:50:28 +08:00
|
|
|
size_t dsize;
|
2009-12-18 19:01:10 +08:00
|
|
|
|
|
|
|
if (!s->files) {
|
2013-01-16 21:50:28 +08:00
|
|
|
dsize = sizeof(uint32_t) + sizeof(FWCfgFile) * FW_CFG_FILE_SLOTS;
|
2011-08-21 11:09:37 +08:00
|
|
|
s->files = g_malloc0(dsize);
|
2013-01-16 21:50:28 +08:00
|
|
|
fw_cfg_add_bytes(s, FW_CFG_FILE_DIR, s->files, dsize);
|
2009-12-18 19:01:10 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
index = be32_to_cpu(s->files->count);
|
2013-01-16 21:50:23 +08:00
|
|
|
assert(index < FW_CFG_FILE_SLOTS);
|
2009-12-18 19:01:10 +08:00
|
|
|
|
2010-12-08 19:35:06 +08:00
|
|
|
pstrcpy(s->files->f[index].name, sizeof(s->files->f[index].name),
|
|
|
|
filename);
|
2010-01-08 22:25:39 +08:00
|
|
|
for (i = 0; i < index; i++) {
|
|
|
|
if (strcmp(s->files->f[index].name, s->files->f[i].name) == 0) {
|
2015-04-29 23:21:52 +08:00
|
|
|
error_report("duplicate fw_cfg file name: %s",
|
|
|
|
s->files->f[index].name);
|
|
|
|
exit(1);
|
2010-01-08 22:25:39 +08:00
|
|
|
}
|
2009-12-18 19:01:10 +08:00
|
|
|
}
|
2010-01-08 22:25:39 +08:00
|
|
|
|
2015-04-29 23:21:52 +08:00
|
|
|
fw_cfg_add_bytes_read_callback(s, FW_CFG_FILE_FIRST + index,
|
|
|
|
callback, callback_opaque, data, len);
|
|
|
|
|
2009-12-18 19:01:10 +08:00
|
|
|
s->files->f[index].size = cpu_to_be32(len);
|
|
|
|
s->files->f[index].select = cpu_to_be16(FW_CFG_FILE_FIRST + index);
|
2013-01-16 21:50:22 +08:00
|
|
|
trace_fw_cfg_add_file(s, index, s->files->f[index].name, len);
|
2009-12-18 19:01:10 +08:00
|
|
|
|
|
|
|
s->files->count = cpu_to_be32(index+1);
|
|
|
|
}
|
|
|
|
|
2013-09-01 22:56:20 +08:00
|
|
|
void fw_cfg_add_file(FWCfgState *s, const char *filename,
|
|
|
|
void *data, size_t len)
|
|
|
|
{
|
|
|
|
fw_cfg_add_file_callback(s, filename, NULL, NULL, data, len);
|
|
|
|
}
|
|
|
|
|
2014-10-07 16:00:08 +08:00
|
|
|
void *fw_cfg_modify_file(FWCfgState *s, const char *filename,
|
|
|
|
void *data, size_t len)
|
|
|
|
{
|
|
|
|
int i, index;
|
2014-11-25 12:38:19 +08:00
|
|
|
void *ptr = NULL;
|
2014-10-07 16:00:08 +08:00
|
|
|
|
|
|
|
assert(s->files);
|
|
|
|
|
|
|
|
index = be32_to_cpu(s->files->count);
|
|
|
|
assert(index < FW_CFG_FILE_SLOTS);
|
|
|
|
|
|
|
|
for (i = 0; i < index; i++) {
|
|
|
|
if (strcmp(filename, s->files->f[i].name) == 0) {
|
2014-11-25 12:38:19 +08:00
|
|
|
ptr = fw_cfg_modify_bytes_read(s, FW_CFG_FILE_FIRST + i,
|
|
|
|
data, len);
|
|
|
|
s->files->f[i].size = cpu_to_be32(len);
|
|
|
|
return ptr;
|
2014-10-07 16:00:08 +08:00
|
|
|
}
|
|
|
|
}
|
|
|
|
/* add new one */
|
|
|
|
fw_cfg_add_file_callback(s, filename, NULL, NULL, data, len);
|
|
|
|
return NULL;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void fw_cfg_machine_reset(void *opaque)
|
2010-12-08 19:35:09 +08:00
|
|
|
{
|
2014-10-07 16:00:08 +08:00
|
|
|
void *ptr;
|
2013-01-16 21:50:29 +08:00
|
|
|
size_t len;
|
2014-10-07 16:00:08 +08:00
|
|
|
FWCfgState *s = opaque;
|
2014-03-17 10:40:22 +08:00
|
|
|
char *bootindex = get_boot_devices_list(&len, false);
|
2010-12-08 19:35:09 +08:00
|
|
|
|
2014-10-07 16:00:08 +08:00
|
|
|
ptr = fw_cfg_modify_file(s, "bootorder", (uint8_t *)bootindex, len);
|
|
|
|
g_free(ptr);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void fw_cfg_machine_ready(struct Notifier *n, void *data)
|
|
|
|
{
|
|
|
|
FWCfgState *s = container_of(n, FWCfgState, machine_ready);
|
|
|
|
qemu_register_reset(fw_cfg_machine_reset, s);
|
2010-12-08 19:35:09 +08:00
|
|
|
}
|
|
|
|
|
2008-09-19 02:27:29 +08:00
|
|
|
|
2010-06-28 00:04:55 +08:00
|
|
|
|
2014-12-22 20:11:35 +08:00
|
|
|
static void fw_cfg_init1(DeviceState *dev)
|
|
|
|
{
|
|
|
|
FWCfgState *s = FW_CFG(dev);
|
2008-09-19 02:27:29 +08:00
|
|
|
|
2013-05-30 21:21:24 +08:00
|
|
|
assert(!object_resolve_path(FW_CFG_PATH, NULL));
|
|
|
|
|
|
|
|
object_property_add_child(qdev_get_machine(), FW_CFG_NAME, OBJECT(s), NULL);
|
2013-04-26 11:24:44 +08:00
|
|
|
|
|
|
|
qdev_init_nofail(dev);
|
|
|
|
|
2013-01-16 21:50:28 +08:00
|
|
|
fw_cfg_add_bytes(s, FW_CFG_SIGNATURE, (char *)"QEMU", 4);
|
fw_cfg: factor out initialization of FW_CFG_ID (rev. number)
The fw_cfg documentation says this of the revision key (0x0001, FW_CFG_ID):
> A 32-bit little-endian unsigned int, this item is used as an interface
> revision number, and is currently set to 1 by all QEMU architectures
> which expose a fw_cfg device.
arm/virt doesn't. It could be argued that that's an error in
"hw/arm/virt.c"; on the other hand, all of the other fw_cfg providing
boards set the interface version to 1 manually, despite the device
coming from the same, shared implementation. Therefore, instead of
adding
fw_cfg_add_i32(fw_cfg, FW_CFG_ID, 1);
to arm/virt, consolidate all such existing calls in the fw_cfg
initialization code.
Signed-off-by: Gabriel Somlo <somlo@cmu.edu>
Message-Id: <1426789244-26318-1-git-send-email-somlo@cmu.edu>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2015-03-20 02:20:44 +08:00
|
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fw_cfg_add_i32(s, FW_CFG_ID, 1);
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2008-09-19 02:31:52 +08:00
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fw_cfg_add_bytes(s, FW_CFG_UUID, qemu_uuid, 16);
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2009-05-22 05:54:00 +08:00
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fw_cfg_add_i16(s, FW_CFG_NOGRAPHIC, (uint16_t)(display_type == DT_NOGRAPHIC));
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2008-09-19 02:33:18 +08:00
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fw_cfg_add_i16(s, FW_CFG_NB_CPUS, (uint16_t)smp_cpus);
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2009-07-02 06:19:02 +08:00
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fw_cfg_add_i16(s, FW_CFG_BOOT_MENU, (uint16_t)boot_menu);
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2011-07-27 18:04:55 +08:00
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fw_cfg_bootsplash(s);
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add a boot parameter to set reboot timeout
Added an option to let qemu transfer a configuration file to bios,
"etc/boot-fail-wait", which could be specified by command
-boot reboot-timeout=T
T have a max value of 0xffff, unit is ms.
With this option, guest will wait for a given time if not find
bootabled device, then reboot. If reboot-timeout is '-1', guest
will not reboot, qemu passes '-1' to bios by default.
This feature need the new seabios's support.
Seabios pulls the value from the fwcfg "file" interface, this
interface is used because SeaBIOS needs a reliable way of
obtaining a name, value size, and value. It in no way requires
that there be a real file on the user's host machine.
Signed-off-by: Amos Kong <akong@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-09-07 11:11:03 +08:00
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fw_cfg_reboot(s);
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2010-12-08 19:35:09 +08:00
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s->machine_ready.notify = fw_cfg_machine_ready;
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qemu_add_machine_init_done_notifier(&s->machine_ready);
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2008-09-19 02:27:29 +08:00
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}
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2010-06-28 00:04:55 +08:00
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2014-12-22 20:11:35 +08:00
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FWCfgState *fw_cfg_init_io(uint32_t iobase)
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2010-06-28 00:04:55 +08:00
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{
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2014-12-22 20:11:35 +08:00
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DeviceState *dev;
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2010-06-28 00:04:55 +08:00
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2014-12-22 20:11:35 +08:00
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dev = qdev_create(NULL, TYPE_FW_CFG_IO);
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qdev_prop_set_uint32(dev, "iobase", iobase);
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fw_cfg_init1(dev);
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return FW_CFG(dev);
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2013-07-01 18:18:33 +08:00
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}
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2014-12-22 20:11:41 +08:00
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FWCfgState *fw_cfg_init_mem_wide(hwaddr ctl_addr, hwaddr data_addr,
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uint32_t data_width)
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2013-07-01 18:18:33 +08:00
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{
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2014-12-22 20:11:35 +08:00
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DeviceState *dev;
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SysBusDevice *sbd;
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2013-07-01 18:18:33 +08:00
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2014-12-22 20:11:35 +08:00
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dev = qdev_create(NULL, TYPE_FW_CFG_MEM);
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2014-12-22 20:11:41 +08:00
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qdev_prop_set_uint32(dev, "data_width", data_width);
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2014-12-22 20:11:40 +08:00
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2014-12-22 20:11:35 +08:00
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fw_cfg_init1(dev);
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sbd = SYS_BUS_DEVICE(dev);
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sysbus_mmio_map(sbd, 0, ctl_addr);
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sysbus_mmio_map(sbd, 1, data_addr);
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return FW_CFG(dev);
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}
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2014-12-22 20:11:41 +08:00
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FWCfgState *fw_cfg_init_mem(hwaddr ctl_addr, hwaddr data_addr)
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{
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return fw_cfg_init_mem_wide(ctl_addr, data_addr,
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fw_cfg_data_mem_ops.valid.max_access_size);
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}
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2014-12-22 20:11:35 +08:00
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2013-05-30 21:07:58 +08:00
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FWCfgState *fw_cfg_find(void)
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{
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2013-07-01 18:18:32 +08:00
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return FW_CFG(object_resolve_path(FW_CFG_PATH, NULL));
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2013-05-30 21:07:58 +08:00
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}
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2012-01-25 03:12:29 +08:00
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static void fw_cfg_class_init(ObjectClass *klass, void *data)
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{
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2011-12-08 11:34:16 +08:00
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DeviceClass *dc = DEVICE_CLASS(klass);
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2012-01-25 03:12:29 +08:00
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2011-12-08 11:34:16 +08:00
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dc->reset = fw_cfg_reset;
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dc->vmsd = &vmstate_fw_cfg;
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2012-01-25 03:12:29 +08:00
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}
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2013-01-10 23:19:07 +08:00
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static const TypeInfo fw_cfg_info = {
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2013-05-30 21:07:58 +08:00
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.name = TYPE_FW_CFG,
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2011-12-08 11:34:16 +08:00
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.parent = TYPE_SYS_BUS_DEVICE,
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.instance_size = sizeof(FWCfgState),
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.class_init = fw_cfg_class_init,
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2010-06-28 00:04:55 +08:00
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};
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2014-12-22 20:11:35 +08:00
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static Property fw_cfg_io_properties[] = {
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DEFINE_PROP_UINT32("iobase", FWCfgIoState, iobase, -1),
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DEFINE_PROP_END_OF_LIST(),
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};
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static void fw_cfg_io_realize(DeviceState *dev, Error **errp)
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{
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FWCfgIoState *s = FW_CFG_IO(dev);
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SysBusDevice *sbd = SYS_BUS_DEVICE(dev);
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memory_region_init_io(&s->comb_iomem, OBJECT(s), &fw_cfg_comb_mem_ops,
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FW_CFG(s), "fwcfg", FW_CFG_SIZE);
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sysbus_add_io(sbd, s->iobase, &s->comb_iomem);
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}
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|
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|
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static void fw_cfg_io_class_init(ObjectClass *klass, void *data)
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|
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{
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|
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DeviceClass *dc = DEVICE_CLASS(klass);
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|
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dc->realize = fw_cfg_io_realize;
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dc->props = fw_cfg_io_properties;
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|
|
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}
|
|
|
|
|
|
|
|
static const TypeInfo fw_cfg_io_info = {
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|
|
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.name = TYPE_FW_CFG_IO,
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|
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.parent = TYPE_FW_CFG,
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|
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.instance_size = sizeof(FWCfgIoState),
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|
|
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.class_init = fw_cfg_io_class_init,
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|
|
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};
|
|
|
|
|
|
|
|
|
2014-12-22 20:11:40 +08:00
|
|
|
static Property fw_cfg_mem_properties[] = {
|
|
|
|
DEFINE_PROP_UINT32("data_width", FWCfgMemState, data_width, -1),
|
|
|
|
DEFINE_PROP_END_OF_LIST(),
|
|
|
|
};
|
|
|
|
|
2014-12-22 20:11:35 +08:00
|
|
|
static void fw_cfg_mem_realize(DeviceState *dev, Error **errp)
|
|
|
|
{
|
|
|
|
FWCfgMemState *s = FW_CFG_MEM(dev);
|
|
|
|
SysBusDevice *sbd = SYS_BUS_DEVICE(dev);
|
2014-12-22 20:11:40 +08:00
|
|
|
const MemoryRegionOps *data_ops = &fw_cfg_data_mem_ops;
|
2014-12-22 20:11:35 +08:00
|
|
|
|
|
|
|
memory_region_init_io(&s->ctl_iomem, OBJECT(s), &fw_cfg_ctl_mem_ops,
|
|
|
|
FW_CFG(s), "fwcfg.ctl", FW_CFG_SIZE);
|
|
|
|
sysbus_init_mmio(sbd, &s->ctl_iomem);
|
|
|
|
|
2014-12-22 20:11:40 +08:00
|
|
|
if (s->data_width > data_ops->valid.max_access_size) {
|
|
|
|
/* memberwise copy because the "old_mmio" member is const */
|
|
|
|
s->wide_data_ops.read = data_ops->read;
|
|
|
|
s->wide_data_ops.write = data_ops->write;
|
|
|
|
s->wide_data_ops.endianness = data_ops->endianness;
|
|
|
|
s->wide_data_ops.valid = data_ops->valid;
|
|
|
|
s->wide_data_ops.impl = data_ops->impl;
|
|
|
|
|
|
|
|
s->wide_data_ops.valid.max_access_size = s->data_width;
|
|
|
|
s->wide_data_ops.impl.max_access_size = s->data_width;
|
|
|
|
data_ops = &s->wide_data_ops;
|
|
|
|
}
|
|
|
|
memory_region_init_io(&s->data_iomem, OBJECT(s), data_ops, FW_CFG(s),
|
|
|
|
"fwcfg.data", data_ops->valid.max_access_size);
|
2014-12-22 20:11:35 +08:00
|
|
|
sysbus_init_mmio(sbd, &s->data_iomem);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void fw_cfg_mem_class_init(ObjectClass *klass, void *data)
|
|
|
|
{
|
|
|
|
DeviceClass *dc = DEVICE_CLASS(klass);
|
|
|
|
|
|
|
|
dc->realize = fw_cfg_mem_realize;
|
2014-12-22 20:11:40 +08:00
|
|
|
dc->props = fw_cfg_mem_properties;
|
2014-12-22 20:11:35 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
static const TypeInfo fw_cfg_mem_info = {
|
|
|
|
.name = TYPE_FW_CFG_MEM,
|
|
|
|
.parent = TYPE_FW_CFG,
|
|
|
|
.instance_size = sizeof(FWCfgMemState),
|
|
|
|
.class_init = fw_cfg_mem_class_init,
|
|
|
|
};
|
|
|
|
|
|
|
|
|
2012-02-09 22:20:55 +08:00
|
|
|
static void fw_cfg_register_types(void)
|
2010-06-28 00:04:55 +08:00
|
|
|
{
|
2011-12-08 11:34:16 +08:00
|
|
|
type_register_static(&fw_cfg_info);
|
2014-12-22 20:11:35 +08:00
|
|
|
type_register_static(&fw_cfg_io_info);
|
|
|
|
type_register_static(&fw_cfg_mem_info);
|
2010-06-28 00:04:55 +08:00
|
|
|
}
|
|
|
|
|
2012-02-09 22:20:55 +08:00
|
|
|
type_init(fw_cfg_register_types)
|