2006-10-22 08:18:54 +08:00
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/*
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* m68k op helpers
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2007-09-17 05:08:06 +08:00
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*
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2007-05-24 03:58:11 +08:00
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* Copyright (c) 2006-2007 CodeSourcery
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2006-10-22 08:18:54 +08:00
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* Written by Paul Brook
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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2009-07-17 04:47:01 +08:00
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* License along with this library; if not, see <http://www.gnu.org/licenses/>.
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2006-10-22 08:18:54 +08:00
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*/
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#include "cpu.h"
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2012-12-18 01:19:49 +08:00
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#include "exec/gdbstub.h"
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2006-10-22 08:18:54 +08:00
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2014-04-08 13:31:41 +08:00
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#include "exec/helper-proto.h"
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2008-05-25 06:29:16 +08:00
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#define SIGNBIT (1u << 31)
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2012-04-15 09:30:10 +08:00
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/* Sort alphabetically, except for "any". */
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static gint m68k_cpu_list_compare(gconstpointer a, gconstpointer b)
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2009-05-10 04:21:39 +08:00
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{
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2012-04-15 09:30:10 +08:00
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ObjectClass *class_a = (ObjectClass *)a;
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ObjectClass *class_b = (ObjectClass *)b;
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const char *name_a, *name_b;
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name_a = object_class_get_name(class_a);
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name_b = object_class_get_name(class_b);
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2013-01-28 03:16:17 +08:00
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if (strcmp(name_a, "any-" TYPE_M68K_CPU) == 0) {
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2012-04-15 09:30:10 +08:00
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return 1;
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2013-01-28 03:16:17 +08:00
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} else if (strcmp(name_b, "any-" TYPE_M68K_CPU) == 0) {
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2012-04-15 09:30:10 +08:00
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return -1;
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} else {
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return strcasecmp(name_a, name_b);
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2009-05-10 04:21:39 +08:00
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}
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}
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2012-04-15 09:30:10 +08:00
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static void m68k_cpu_list_entry(gpointer data, gpointer user_data)
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{
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ObjectClass *c = data;
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2012-12-16 09:17:02 +08:00
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CPUListState *s = user_data;
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2013-01-28 03:16:17 +08:00
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const char *typename;
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char *name;
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2012-04-15 09:30:10 +08:00
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2013-01-28 03:16:17 +08:00
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typename = object_class_get_name(c);
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name = g_strndup(typename, strlen(typename) - strlen("-" TYPE_M68K_CPU));
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2012-04-15 09:30:10 +08:00
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(*s->cpu_fprintf)(s->file, "%s\n",
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2013-01-28 03:16:17 +08:00
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name);
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g_free(name);
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2012-04-15 09:30:10 +08:00
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}
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void m68k_cpu_list(FILE *f, fprintf_function cpu_fprintf)
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{
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2012-12-16 09:17:02 +08:00
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CPUListState s = {
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2012-04-15 09:30:10 +08:00
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.file = f,
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.cpu_fprintf = cpu_fprintf,
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};
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GSList *list;
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list = object_class_get_list(TYPE_M68K_CPU, false);
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list = g_slist_sort(list, m68k_cpu_list_compare);
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g_slist_foreach(list, m68k_cpu_list_entry, &s);
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g_slist_free(list);
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}
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2012-03-14 08:38:22 +08:00
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static int fpu_gdb_get_reg(CPUM68KState *env, uint8_t *mem_buf, int n)
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2008-10-12 01:55:29 +08:00
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{
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if (n < 8) {
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stfq_p(mem_buf, env->fregs[n]);
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return 8;
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}
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if (n < 11) {
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/* FP control registers (not implemented) */
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memset(mem_buf, 0, 4);
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return 4;
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}
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return 0;
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}
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2012-03-14 08:38:22 +08:00
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static int fpu_gdb_set_reg(CPUM68KState *env, uint8_t *mem_buf, int n)
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2008-10-12 01:55:29 +08:00
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{
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if (n < 8) {
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env->fregs[n] = ldfq_p(mem_buf);
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return 8;
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}
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if (n < 11) {
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/* FP control registers (not implemented) */
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return 4;
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}
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return 0;
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}
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2013-01-18 21:03:58 +08:00
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M68kCPU *cpu_m68k_init(const char *cpu_model)
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2007-11-10 23:15:54 +08:00
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{
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2012-04-15 06:35:50 +08:00
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M68kCPU *cpu;
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2007-11-10 23:15:54 +08:00
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CPUM68KState *env;
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2013-01-22 00:50:15 +08:00
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ObjectClass *oc;
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2007-11-10 23:15:54 +08:00
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2013-01-22 00:50:15 +08:00
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oc = cpu_class_by_name(TYPE_M68K_CPU, cpu_model);
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if (oc == NULL) {
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2012-04-15 09:30:10 +08:00
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return NULL;
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}
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2013-01-22 00:50:15 +08:00
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cpu = M68K_CPU(object_new(object_class_get_name(oc)));
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2012-04-15 06:35:50 +08:00
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env = &cpu->env;
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2007-12-09 10:22:57 +08:00
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2012-04-15 09:30:10 +08:00
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register_m68k_insns(env);
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2013-01-05 22:15:30 +08:00
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object_property_set_bool(OBJECT(cpu), true, "realized", NULL);
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2013-01-18 21:03:58 +08:00
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return cpu;
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2013-01-05 22:15:30 +08:00
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}
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void m68k_cpu_init_gdb(M68kCPU *cpu)
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{
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2013-06-29 03:27:39 +08:00
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CPUState *cs = CPU(cpu);
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2013-01-05 22:15:30 +08:00
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CPUM68KState *env = &cpu->env;
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2012-04-15 09:30:10 +08:00
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if (m68k_feature(env, M68K_FEATURE_CF_FPU)) {
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2013-06-29 03:27:39 +08:00
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gdb_register_coprocessor(cs, fpu_gdb_get_reg, fpu_gdb_set_reg,
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2012-04-15 09:30:10 +08:00
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11, "cf-fp.xml", 18);
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2007-11-10 23:15:54 +08:00
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}
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2012-04-15 09:30:10 +08:00
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/* TODO: Add [E]MAC registers. */
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2007-11-10 23:15:54 +08:00
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}
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2007-05-27 00:52:21 +08:00
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2006-10-22 08:18:54 +08:00
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void cpu_m68k_flush_flags(CPUM68KState *env, int cc_op)
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{
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2013-09-03 23:38:47 +08:00
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M68kCPU *cpu = m68k_env_get_cpu(env);
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2006-10-22 08:18:54 +08:00
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int flags;
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uint32_t src;
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uint32_t dest;
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uint32_t tmp;
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#define HIGHBIT 0x80000000u
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#define SET_NZ(x) do { \
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if ((x) == 0) \
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flags |= CCF_Z; \
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else if ((int32_t)(x) < 0) \
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flags |= CCF_N; \
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} while (0)
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#define SET_FLAGS_SUB(type, utype) do { \
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SET_NZ((type)dest); \
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tmp = dest + src; \
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if ((utype) tmp < (utype) src) \
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flags |= CCF_C; \
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if ((1u << (sizeof(type) * 8 - 1)) & (tmp ^ dest) & (tmp ^ src)) \
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flags |= CCF_V; \
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} while (0)
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flags = 0;
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src = env->cc_src;
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dest = env->cc_dest;
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switch (cc_op) {
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case CC_OP_FLAGS:
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flags = dest;
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break;
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case CC_OP_LOGIC:
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SET_NZ(dest);
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break;
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case CC_OP_ADD:
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SET_NZ(dest);
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if (dest < src)
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flags |= CCF_C;
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tmp = dest - src;
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if (HIGHBIT & (src ^ dest) & ~(tmp ^ src))
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flags |= CCF_V;
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break;
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case CC_OP_SUB:
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SET_FLAGS_SUB(int32_t, uint32_t);
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break;
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case CC_OP_CMPB:
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SET_FLAGS_SUB(int8_t, uint8_t);
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break;
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case CC_OP_CMPW:
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SET_FLAGS_SUB(int16_t, uint16_t);
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break;
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case CC_OP_ADDX:
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SET_NZ(dest);
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if (dest <= src)
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flags |= CCF_C;
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tmp = dest - src - 1;
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if (HIGHBIT & (src ^ dest) & ~(tmp ^ src))
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flags |= CCF_V;
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break;
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case CC_OP_SUBX:
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SET_NZ(dest);
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tmp = dest + src + 1;
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if (tmp <= src)
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flags |= CCF_C;
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if (HIGHBIT & (tmp ^ dest) & (tmp ^ src))
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flags |= CCF_V;
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break;
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2008-05-25 06:29:16 +08:00
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case CC_OP_SHIFT:
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SET_NZ(dest);
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if (src)
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2006-10-22 08:18:54 +08:00
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flags |= CCF_C;
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break;
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default:
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2013-09-03 23:38:47 +08:00
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cpu_abort(CPU(cpu), "Bad CC_OP %d", cc_op);
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2006-10-22 08:18:54 +08:00
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}
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env->cc_op = CC_OP_FLAGS;
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env->cc_dest = flags;
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}
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2008-05-25 06:29:16 +08:00
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void HELPER(movec)(CPUM68KState *env, uint32_t reg, uint32_t val)
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2007-05-24 03:58:11 +08:00
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{
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2013-09-03 23:38:47 +08:00
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M68kCPU *cpu = m68k_env_get_cpu(env);
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2007-05-24 03:58:11 +08:00
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switch (reg) {
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case 0x02: /* CACR */
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2007-06-03 19:13:39 +08:00
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env->cacr = val;
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m68k_switch_sp(env);
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break;
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case 0x04: case 0x05: case 0x06: case 0x07: /* ACR[0-3] */
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/* TODO: Implement Access Control Registers. */
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2007-05-24 03:58:11 +08:00
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break;
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case 0x801: /* VBR */
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env->vbr = val;
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break;
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/* TODO: Implement control registers. */
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default:
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2013-09-03 23:38:47 +08:00
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cpu_abort(CPU(cpu), "Unimplemented control register write 0x%x = 0x%x\n",
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2007-05-24 03:58:11 +08:00
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reg, val);
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}
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}
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2008-05-25 06:29:16 +08:00
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void HELPER(set_macsr)(CPUM68KState *env, uint32_t val)
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2007-05-29 22:57:59 +08:00
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{
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uint32_t acc;
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int8_t exthigh;
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uint8_t extlow;
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uint64_t regval;
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int i;
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if ((env->macsr ^ val) & (MACSR_FI | MACSR_SU)) {
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for (i = 0; i < 4; i++) {
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regval = env->macc[i];
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exthigh = regval >> 40;
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if (env->macsr & MACSR_FI) {
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acc = regval >> 8;
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extlow = regval;
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} else {
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acc = regval;
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extlow = regval >> 32;
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}
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if (env->macsr & MACSR_FI) {
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regval = (((uint64_t)acc) << 8) | extlow;
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regval |= ((int64_t)exthigh) << 40;
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} else if (env->macsr & MACSR_SU) {
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regval = acc | (((int64_t)extlow) << 32);
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regval |= ((int64_t)exthigh) << 40;
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} else {
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regval = acc | (((uint64_t)extlow) << 32);
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regval |= ((uint64_t)(uint8_t)exthigh) << 40;
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}
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env->macc[i] = regval;
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}
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}
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env->macsr = val;
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}
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2007-06-03 19:13:39 +08:00
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void m68k_switch_sp(CPUM68KState *env)
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{
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int new_sp;
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env->sp[env->current_sp] = env->aregs[7];
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new_sp = (env->sr & SR_S && env->cacr & M68K_CACR_EUSP)
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? M68K_SSP : M68K_USP;
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env->aregs[7] = env->sp[new_sp];
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env->current_sp = new_sp;
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}
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2007-09-17 05:08:06 +08:00
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#if defined(CONFIG_USER_ONLY)
|
2007-05-24 03:58:11 +08:00
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2013-08-26 09:01:33 +08:00
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int m68k_cpu_handle_mmu_fault(CPUState *cs, vaddr address, int rw,
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int mmu_idx)
|
2007-05-24 03:58:11 +08:00
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{
|
2013-08-26 09:01:33 +08:00
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M68kCPU *cpu = M68K_CPU(cs);
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|
2013-08-26 14:31:06 +08:00
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cs->exception_index = EXCP_ACCESS;
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2013-08-26 09:01:33 +08:00
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cpu->env.mmu.ar = address;
|
2007-05-24 03:58:11 +08:00
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return 1;
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}
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#else
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2010-03-01 11:46:18 +08:00
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/* MMU */
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/* TODO: This will need fixing once the MMU is implemented. */
|
2013-06-30 00:55:54 +08:00
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hwaddr m68k_cpu_get_phys_page_debug(CPUState *cs, vaddr addr)
|
2010-03-01 11:46:18 +08:00
|
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{
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return addr;
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}
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|
2013-08-26 09:01:33 +08:00
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int m68k_cpu_handle_mmu_fault(CPUState *cs, vaddr address, int rw,
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int mmu_idx)
|
2007-05-24 03:58:11 +08:00
|
|
|
{
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int prot;
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address &= TARGET_PAGE_MASK;
|
2010-03-17 10:14:28 +08:00
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|
|
prot = PAGE_READ | PAGE_WRITE | PAGE_EXEC;
|
2013-09-03 19:59:37 +08:00
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|
|
tlb_set_page(cs, address, address, prot, mmu_idx, TARGET_PAGE_SIZE);
|
2010-03-17 10:14:28 +08:00
|
|
|
return 0;
|
2007-05-24 03:58:11 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
/* Notify CPU of a pending interrupt. Prioritization and vectoring should
|
|
|
|
be handled by the interrupt controller. Real hardware only requests
|
|
|
|
the vector when the interrupt is acknowledged by the CPU. For
|
|
|
|
simplicitly we calculate it when the interrupt is signalled. */
|
2013-01-18 21:20:52 +08:00
|
|
|
void m68k_set_irq_level(M68kCPU *cpu, int level, uint8_t vector)
|
2007-05-24 03:58:11 +08:00
|
|
|
{
|
2013-01-18 05:30:20 +08:00
|
|
|
CPUState *cs = CPU(cpu);
|
2013-01-18 21:20:52 +08:00
|
|
|
CPUM68KState *env = &cpu->env;
|
|
|
|
|
2007-05-24 03:58:11 +08:00
|
|
|
env->pending_level = level;
|
|
|
|
env->pending_vector = vector;
|
2013-01-18 05:30:20 +08:00
|
|
|
if (level) {
|
2013-01-18 22:03:43 +08:00
|
|
|
cpu_interrupt(cs, CPU_INTERRUPT_HARD);
|
2013-01-18 05:30:20 +08:00
|
|
|
} else {
|
|
|
|
cpu_reset_interrupt(cs, CPU_INTERRUPT_HARD);
|
|
|
|
}
|
2007-05-24 03:58:11 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
#endif
|
2008-05-25 06:29:16 +08:00
|
|
|
|
|
|
|
uint32_t HELPER(bitrev)(uint32_t x)
|
|
|
|
{
|
|
|
|
x = ((x >> 1) & 0x55555555u) | ((x << 1) & 0xaaaaaaaau);
|
|
|
|
x = ((x >> 2) & 0x33333333u) | ((x << 2) & 0xccccccccu);
|
|
|
|
x = ((x >> 4) & 0x0f0f0f0fu) | ((x << 4) & 0xf0f0f0f0u);
|
|
|
|
return bswap32(x);
|
|
|
|
}
|
|
|
|
|
|
|
|
uint32_t HELPER(ff1)(uint32_t x)
|
|
|
|
{
|
|
|
|
int n;
|
|
|
|
for (n = 32; x; n--)
|
|
|
|
x >>= 1;
|
|
|
|
return n;
|
|
|
|
}
|
|
|
|
|
|
|
|
uint32_t HELPER(sats)(uint32_t val, uint32_t ccr)
|
|
|
|
{
|
|
|
|
/* The result has the opposite sign to the original value. */
|
|
|
|
if (ccr & CCF_V)
|
|
|
|
val = (((int32_t)val) >> 31) ^ SIGNBIT;
|
|
|
|
return val;
|
|
|
|
}
|
|
|
|
|
2012-03-14 08:38:22 +08:00
|
|
|
uint32_t HELPER(subx_cc)(CPUM68KState *env, uint32_t op1, uint32_t op2)
|
2008-05-25 06:29:16 +08:00
|
|
|
{
|
|
|
|
uint32_t res;
|
|
|
|
uint32_t old_flags;
|
|
|
|
|
|
|
|
old_flags = env->cc_dest;
|
|
|
|
if (env->cc_x) {
|
|
|
|
env->cc_x = (op1 <= op2);
|
|
|
|
env->cc_op = CC_OP_SUBX;
|
|
|
|
res = op1 - (op2 + 1);
|
|
|
|
} else {
|
|
|
|
env->cc_x = (op1 < op2);
|
|
|
|
env->cc_op = CC_OP_SUB;
|
|
|
|
res = op1 - op2;
|
|
|
|
}
|
|
|
|
env->cc_dest = res;
|
|
|
|
env->cc_src = op2;
|
|
|
|
cpu_m68k_flush_flags(env, env->cc_op);
|
|
|
|
/* !Z is sticky. */
|
|
|
|
env->cc_dest &= (old_flags | ~CCF_Z);
|
|
|
|
return res;
|
|
|
|
}
|
|
|
|
|
2012-03-14 08:38:22 +08:00
|
|
|
uint32_t HELPER(addx_cc)(CPUM68KState *env, uint32_t op1, uint32_t op2)
|
2008-05-25 06:29:16 +08:00
|
|
|
{
|
|
|
|
uint32_t res;
|
|
|
|
uint32_t old_flags;
|
|
|
|
|
|
|
|
old_flags = env->cc_dest;
|
|
|
|
if (env->cc_x) {
|
|
|
|
res = op1 + op2 + 1;
|
|
|
|
env->cc_x = (res <= op2);
|
|
|
|
env->cc_op = CC_OP_ADDX;
|
|
|
|
} else {
|
|
|
|
res = op1 + op2;
|
|
|
|
env->cc_x = (res < op2);
|
|
|
|
env->cc_op = CC_OP_ADD;
|
|
|
|
}
|
|
|
|
env->cc_dest = res;
|
|
|
|
env->cc_src = op2;
|
|
|
|
cpu_m68k_flush_flags(env, env->cc_op);
|
|
|
|
/* !Z is sticky. */
|
|
|
|
env->cc_dest &= (old_flags | ~CCF_Z);
|
|
|
|
return res;
|
|
|
|
}
|
|
|
|
|
|
|
|
uint32_t HELPER(xflag_lt)(uint32_t a, uint32_t b)
|
|
|
|
{
|
|
|
|
return a < b;
|
|
|
|
}
|
|
|
|
|
2012-03-14 08:38:22 +08:00
|
|
|
void HELPER(set_sr)(CPUM68KState *env, uint32_t val)
|
2008-05-25 06:29:16 +08:00
|
|
|
{
|
|
|
|
env->sr = val & 0xffff;
|
|
|
|
m68k_switch_sp(env);
|
|
|
|
}
|
|
|
|
|
2012-03-14 08:38:22 +08:00
|
|
|
uint32_t HELPER(shl_cc)(CPUM68KState *env, uint32_t val, uint32_t shift)
|
2008-05-25 06:29:16 +08:00
|
|
|
{
|
|
|
|
uint32_t result;
|
|
|
|
uint32_t cf;
|
|
|
|
|
|
|
|
shift &= 63;
|
|
|
|
if (shift == 0) {
|
|
|
|
result = val;
|
|
|
|
cf = env->cc_src & CCF_C;
|
|
|
|
} else if (shift < 32) {
|
|
|
|
result = val << shift;
|
|
|
|
cf = (val >> (32 - shift)) & 1;
|
|
|
|
} else if (shift == 32) {
|
|
|
|
result = 0;
|
|
|
|
cf = val & 1;
|
|
|
|
} else /* shift > 32 */ {
|
|
|
|
result = 0;
|
|
|
|
cf = 0;
|
|
|
|
}
|
|
|
|
env->cc_src = cf;
|
|
|
|
env->cc_x = (cf != 0);
|
|
|
|
env->cc_dest = result;
|
|
|
|
return result;
|
|
|
|
}
|
|
|
|
|
2012-03-14 08:38:22 +08:00
|
|
|
uint32_t HELPER(shr_cc)(CPUM68KState *env, uint32_t val, uint32_t shift)
|
2008-05-25 06:29:16 +08:00
|
|
|
{
|
|
|
|
uint32_t result;
|
|
|
|
uint32_t cf;
|
|
|
|
|
|
|
|
shift &= 63;
|
|
|
|
if (shift == 0) {
|
|
|
|
result = val;
|
|
|
|
cf = env->cc_src & CCF_C;
|
|
|
|
} else if (shift < 32) {
|
|
|
|
result = val >> shift;
|
|
|
|
cf = (val >> (shift - 1)) & 1;
|
|
|
|
} else if (shift == 32) {
|
|
|
|
result = 0;
|
|
|
|
cf = val >> 31;
|
|
|
|
} else /* shift > 32 */ {
|
|
|
|
result = 0;
|
|
|
|
cf = 0;
|
|
|
|
}
|
|
|
|
env->cc_src = cf;
|
|
|
|
env->cc_x = (cf != 0);
|
|
|
|
env->cc_dest = result;
|
|
|
|
return result;
|
|
|
|
}
|
|
|
|
|
2012-03-14 08:38:22 +08:00
|
|
|
uint32_t HELPER(sar_cc)(CPUM68KState *env, uint32_t val, uint32_t shift)
|
2008-05-25 06:29:16 +08:00
|
|
|
{
|
|
|
|
uint32_t result;
|
|
|
|
uint32_t cf;
|
|
|
|
|
|
|
|
shift &= 63;
|
|
|
|
if (shift == 0) {
|
|
|
|
result = val;
|
|
|
|
cf = (env->cc_src & CCF_C) != 0;
|
|
|
|
} else if (shift < 32) {
|
|
|
|
result = (int32_t)val >> shift;
|
|
|
|
cf = (val >> (shift - 1)) & 1;
|
|
|
|
} else /* shift >= 32 */ {
|
|
|
|
result = (int32_t)val >> 31;
|
|
|
|
cf = val >> 31;
|
|
|
|
}
|
|
|
|
env->cc_src = cf;
|
|
|
|
env->cc_x = cf;
|
|
|
|
env->cc_dest = result;
|
|
|
|
return result;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* FPU helpers. */
|
2012-03-14 08:38:22 +08:00
|
|
|
uint32_t HELPER(f64_to_i32)(CPUM68KState *env, float64 val)
|
2008-05-25 06:29:16 +08:00
|
|
|
{
|
|
|
|
return float64_to_int32(val, &env->fp_status);
|
|
|
|
}
|
|
|
|
|
2012-03-14 08:38:22 +08:00
|
|
|
float32 HELPER(f64_to_f32)(CPUM68KState *env, float64 val)
|
2008-05-25 06:29:16 +08:00
|
|
|
{
|
|
|
|
return float64_to_float32(val, &env->fp_status);
|
|
|
|
}
|
|
|
|
|
2012-03-14 08:38:22 +08:00
|
|
|
float64 HELPER(i32_to_f64)(CPUM68KState *env, uint32_t val)
|
2008-05-25 06:29:16 +08:00
|
|
|
{
|
|
|
|
return int32_to_float64(val, &env->fp_status);
|
|
|
|
}
|
|
|
|
|
2012-03-14 08:38:22 +08:00
|
|
|
float64 HELPER(f32_to_f64)(CPUM68KState *env, float32 val)
|
2008-05-25 06:29:16 +08:00
|
|
|
{
|
|
|
|
return float32_to_float64(val, &env->fp_status);
|
|
|
|
}
|
|
|
|
|
2012-03-14 08:38:22 +08:00
|
|
|
float64 HELPER(iround_f64)(CPUM68KState *env, float64 val)
|
2008-05-25 06:29:16 +08:00
|
|
|
{
|
|
|
|
return float64_round_to_int(val, &env->fp_status);
|
|
|
|
}
|
|
|
|
|
2012-03-14 08:38:22 +08:00
|
|
|
float64 HELPER(itrunc_f64)(CPUM68KState *env, float64 val)
|
2008-05-25 06:29:16 +08:00
|
|
|
{
|
|
|
|
return float64_trunc_to_int(val, &env->fp_status);
|
|
|
|
}
|
|
|
|
|
2012-03-14 08:38:22 +08:00
|
|
|
float64 HELPER(sqrt_f64)(CPUM68KState *env, float64 val)
|
2008-05-25 06:29:16 +08:00
|
|
|
{
|
|
|
|
return float64_sqrt(val, &env->fp_status);
|
|
|
|
}
|
|
|
|
|
|
|
|
float64 HELPER(abs_f64)(float64 val)
|
|
|
|
{
|
|
|
|
return float64_abs(val);
|
|
|
|
}
|
|
|
|
|
|
|
|
float64 HELPER(chs_f64)(float64 val)
|
|
|
|
{
|
|
|
|
return float64_chs(val);
|
|
|
|
}
|
|
|
|
|
2012-03-14 08:38:22 +08:00
|
|
|
float64 HELPER(add_f64)(CPUM68KState *env, float64 a, float64 b)
|
2008-05-25 06:29:16 +08:00
|
|
|
{
|
|
|
|
return float64_add(a, b, &env->fp_status);
|
|
|
|
}
|
|
|
|
|
2012-03-14 08:38:22 +08:00
|
|
|
float64 HELPER(sub_f64)(CPUM68KState *env, float64 a, float64 b)
|
2008-05-25 06:29:16 +08:00
|
|
|
{
|
|
|
|
return float64_sub(a, b, &env->fp_status);
|
|
|
|
}
|
|
|
|
|
2012-03-14 08:38:22 +08:00
|
|
|
float64 HELPER(mul_f64)(CPUM68KState *env, float64 a, float64 b)
|
2008-05-25 06:29:16 +08:00
|
|
|
{
|
|
|
|
return float64_mul(a, b, &env->fp_status);
|
|
|
|
}
|
|
|
|
|
2012-03-14 08:38:22 +08:00
|
|
|
float64 HELPER(div_f64)(CPUM68KState *env, float64 a, float64 b)
|
2008-05-25 06:29:16 +08:00
|
|
|
{
|
|
|
|
return float64_div(a, b, &env->fp_status);
|
|
|
|
}
|
|
|
|
|
2012-03-14 08:38:22 +08:00
|
|
|
float64 HELPER(sub_cmp_f64)(CPUM68KState *env, float64 a, float64 b)
|
2008-05-25 06:29:16 +08:00
|
|
|
{
|
|
|
|
/* ??? This may incorrectly raise exceptions. */
|
|
|
|
/* ??? Should flush denormals to zero. */
|
|
|
|
float64 res;
|
|
|
|
res = float64_sub(a, b, &env->fp_status);
|
2010-12-17 23:56:06 +08:00
|
|
|
if (float64_is_quiet_nan(res)) {
|
2008-05-25 06:29:16 +08:00
|
|
|
/* +/-inf compares equal against itself, but sub returns nan. */
|
2010-12-17 23:56:06 +08:00
|
|
|
if (!float64_is_quiet_nan(a)
|
|
|
|
&& !float64_is_quiet_nan(b)) {
|
2008-05-25 06:29:16 +08:00
|
|
|
res = float64_zero;
|
|
|
|
if (float64_lt_quiet(a, res, &env->fp_status))
|
|
|
|
res = float64_chs(res);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
return res;
|
|
|
|
}
|
|
|
|
|
2012-03-14 08:38:22 +08:00
|
|
|
uint32_t HELPER(compare_f64)(CPUM68KState *env, float64 val)
|
2008-05-25 06:29:16 +08:00
|
|
|
{
|
|
|
|
return float64_compare_quiet(val, float64_zero, &env->fp_status);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* MAC unit. */
|
|
|
|
/* FIXME: The MAC unit implementation is a bit of a mess. Some helpers
|
|
|
|
take values, others take register numbers and manipulate the contents
|
|
|
|
in-place. */
|
2012-03-14 08:38:22 +08:00
|
|
|
void HELPER(mac_move)(CPUM68KState *env, uint32_t dest, uint32_t src)
|
2008-05-25 06:29:16 +08:00
|
|
|
{
|
|
|
|
uint32_t mask;
|
|
|
|
env->macc[dest] = env->macc[src];
|
|
|
|
mask = MACSR_PAV0 << dest;
|
|
|
|
if (env->macsr & (MACSR_PAV0 << src))
|
|
|
|
env->macsr |= mask;
|
|
|
|
else
|
|
|
|
env->macsr &= ~mask;
|
|
|
|
}
|
|
|
|
|
2012-03-14 08:38:22 +08:00
|
|
|
uint64_t HELPER(macmuls)(CPUM68KState *env, uint32_t op1, uint32_t op2)
|
2008-05-25 06:29:16 +08:00
|
|
|
{
|
|
|
|
int64_t product;
|
|
|
|
int64_t res;
|
|
|
|
|
|
|
|
product = (uint64_t)op1 * op2;
|
|
|
|
res = (product << 24) >> 24;
|
|
|
|
if (res != product) {
|
|
|
|
env->macsr |= MACSR_V;
|
|
|
|
if (env->macsr & MACSR_OMC) {
|
|
|
|
/* Make sure the accumulate operation overflows. */
|
|
|
|
if (product < 0)
|
|
|
|
res = ~(1ll << 50);
|
|
|
|
else
|
|
|
|
res = 1ll << 50;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
return res;
|
|
|
|
}
|
|
|
|
|
2012-03-14 08:38:22 +08:00
|
|
|
uint64_t HELPER(macmulu)(CPUM68KState *env, uint32_t op1, uint32_t op2)
|
2008-05-25 06:29:16 +08:00
|
|
|
{
|
|
|
|
uint64_t product;
|
|
|
|
|
|
|
|
product = (uint64_t)op1 * op2;
|
|
|
|
if (product & (0xffffffull << 40)) {
|
|
|
|
env->macsr |= MACSR_V;
|
|
|
|
if (env->macsr & MACSR_OMC) {
|
|
|
|
/* Make sure the accumulate operation overflows. */
|
|
|
|
product = 1ll << 50;
|
|
|
|
} else {
|
|
|
|
product &= ((1ull << 40) - 1);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
return product;
|
|
|
|
}
|
|
|
|
|
2012-03-14 08:38:22 +08:00
|
|
|
uint64_t HELPER(macmulf)(CPUM68KState *env, uint32_t op1, uint32_t op2)
|
2008-05-25 06:29:16 +08:00
|
|
|
{
|
|
|
|
uint64_t product;
|
|
|
|
uint32_t remainder;
|
|
|
|
|
|
|
|
product = (uint64_t)op1 * op2;
|
|
|
|
if (env->macsr & MACSR_RT) {
|
|
|
|
remainder = product & 0xffffff;
|
|
|
|
product >>= 24;
|
|
|
|
if (remainder > 0x800000)
|
|
|
|
product++;
|
|
|
|
else if (remainder == 0x800000)
|
|
|
|
product += (product & 1);
|
|
|
|
} else {
|
|
|
|
product >>= 24;
|
|
|
|
}
|
|
|
|
return product;
|
|
|
|
}
|
|
|
|
|
2012-03-14 08:38:22 +08:00
|
|
|
void HELPER(macsats)(CPUM68KState *env, uint32_t acc)
|
2008-05-25 06:29:16 +08:00
|
|
|
{
|
|
|
|
int64_t tmp;
|
|
|
|
int64_t result;
|
|
|
|
tmp = env->macc[acc];
|
|
|
|
result = ((tmp << 16) >> 16);
|
|
|
|
if (result != tmp) {
|
|
|
|
env->macsr |= MACSR_V;
|
|
|
|
}
|
|
|
|
if (env->macsr & MACSR_V) {
|
|
|
|
env->macsr |= MACSR_PAV0 << acc;
|
|
|
|
if (env->macsr & MACSR_OMC) {
|
2011-04-28 23:20:38 +08:00
|
|
|
/* The result is saturated to 32 bits, despite overflow occurring
|
2008-05-25 06:29:16 +08:00
|
|
|
at 48 bits. Seems weird, but that's what the hardware docs
|
|
|
|
say. */
|
|
|
|
result = (result >> 63) ^ 0x7fffffff;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
env->macc[acc] = result;
|
|
|
|
}
|
|
|
|
|
2012-03-14 08:38:22 +08:00
|
|
|
void HELPER(macsatu)(CPUM68KState *env, uint32_t acc)
|
2008-05-25 06:29:16 +08:00
|
|
|
{
|
|
|
|
uint64_t val;
|
|
|
|
|
|
|
|
val = env->macc[acc];
|
|
|
|
if (val & (0xffffull << 48)) {
|
|
|
|
env->macsr |= MACSR_V;
|
|
|
|
}
|
|
|
|
if (env->macsr & MACSR_V) {
|
|
|
|
env->macsr |= MACSR_PAV0 << acc;
|
|
|
|
if (env->macsr & MACSR_OMC) {
|
|
|
|
if (val > (1ull << 53))
|
|
|
|
val = 0;
|
|
|
|
else
|
|
|
|
val = (1ull << 48) - 1;
|
|
|
|
} else {
|
|
|
|
val &= ((1ull << 48) - 1);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
env->macc[acc] = val;
|
|
|
|
}
|
|
|
|
|
2012-03-14 08:38:22 +08:00
|
|
|
void HELPER(macsatf)(CPUM68KState *env, uint32_t acc)
|
2008-05-25 06:29:16 +08:00
|
|
|
{
|
|
|
|
int64_t sum;
|
|
|
|
int64_t result;
|
|
|
|
|
|
|
|
sum = env->macc[acc];
|
|
|
|
result = (sum << 16) >> 16;
|
|
|
|
if (result != sum) {
|
|
|
|
env->macsr |= MACSR_V;
|
|
|
|
}
|
|
|
|
if (env->macsr & MACSR_V) {
|
|
|
|
env->macsr |= MACSR_PAV0 << acc;
|
|
|
|
if (env->macsr & MACSR_OMC) {
|
|
|
|
result = (result >> 63) ^ 0x7fffffffffffll;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
env->macc[acc] = result;
|
|
|
|
}
|
|
|
|
|
2012-03-14 08:38:22 +08:00
|
|
|
void HELPER(mac_set_flags)(CPUM68KState *env, uint32_t acc)
|
2008-05-25 06:29:16 +08:00
|
|
|
{
|
|
|
|
uint64_t val;
|
|
|
|
val = env->macc[acc];
|
2010-04-24 03:22:22 +08:00
|
|
|
if (val == 0) {
|
2008-05-25 06:29:16 +08:00
|
|
|
env->macsr |= MACSR_Z;
|
2010-04-24 03:22:22 +08:00
|
|
|
} else if (val & (1ull << 47)) {
|
2008-05-25 06:29:16 +08:00
|
|
|
env->macsr |= MACSR_N;
|
2010-04-24 03:22:22 +08:00
|
|
|
}
|
2008-05-25 06:29:16 +08:00
|
|
|
if (env->macsr & (MACSR_PAV0 << acc)) {
|
|
|
|
env->macsr |= MACSR_V;
|
|
|
|
}
|
|
|
|
if (env->macsr & MACSR_FI) {
|
|
|
|
val = ((int64_t)val) >> 40;
|
|
|
|
if (val != 0 && val != -1)
|
|
|
|
env->macsr |= MACSR_EV;
|
|
|
|
} else if (env->macsr & MACSR_SU) {
|
|
|
|
val = ((int64_t)val) >> 32;
|
|
|
|
if (val != 0 && val != -1)
|
|
|
|
env->macsr |= MACSR_EV;
|
|
|
|
} else {
|
|
|
|
if ((val >> 32) != 0)
|
|
|
|
env->macsr |= MACSR_EV;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2012-03-14 08:38:22 +08:00
|
|
|
void HELPER(flush_flags)(CPUM68KState *env, uint32_t cc_op)
|
2008-05-25 06:29:16 +08:00
|
|
|
{
|
|
|
|
cpu_m68k_flush_flags(env, cc_op);
|
|
|
|
}
|
|
|
|
|
2012-03-14 08:38:22 +08:00
|
|
|
uint32_t HELPER(get_macf)(CPUM68KState *env, uint64_t val)
|
2008-05-25 06:29:16 +08:00
|
|
|
{
|
|
|
|
int rem;
|
|
|
|
uint32_t result;
|
|
|
|
|
|
|
|
if (env->macsr & MACSR_SU) {
|
|
|
|
/* 16-bit rounding. */
|
|
|
|
rem = val & 0xffffff;
|
|
|
|
val = (val >> 24) & 0xffffu;
|
|
|
|
if (rem > 0x800000)
|
|
|
|
val++;
|
|
|
|
else if (rem == 0x800000)
|
|
|
|
val += (val & 1);
|
|
|
|
} else if (env->macsr & MACSR_RT) {
|
|
|
|
/* 32-bit rounding. */
|
|
|
|
rem = val & 0xff;
|
|
|
|
val >>= 8;
|
|
|
|
if (rem > 0x80)
|
|
|
|
val++;
|
|
|
|
else if (rem == 0x80)
|
|
|
|
val += (val & 1);
|
|
|
|
} else {
|
|
|
|
/* No rounding. */
|
|
|
|
val >>= 8;
|
|
|
|
}
|
|
|
|
if (env->macsr & MACSR_OMC) {
|
|
|
|
/* Saturate. */
|
|
|
|
if (env->macsr & MACSR_SU) {
|
|
|
|
if (val != (uint16_t) val) {
|
|
|
|
result = ((val >> 63) ^ 0x7fff) & 0xffff;
|
|
|
|
} else {
|
|
|
|
result = val & 0xffff;
|
|
|
|
}
|
|
|
|
} else {
|
|
|
|
if (val != (uint32_t)val) {
|
|
|
|
result = ((uint32_t)(val >> 63) & 0x7fffffff);
|
|
|
|
} else {
|
|
|
|
result = (uint32_t)val;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
} else {
|
|
|
|
/* No saturation. */
|
|
|
|
if (env->macsr & MACSR_SU) {
|
|
|
|
result = val & 0xffff;
|
|
|
|
} else {
|
|
|
|
result = (uint32_t)val;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
return result;
|
|
|
|
}
|
|
|
|
|
|
|
|
uint32_t HELPER(get_macs)(uint64_t val)
|
|
|
|
{
|
|
|
|
if (val == (int32_t)val) {
|
|
|
|
return (int32_t)val;
|
|
|
|
} else {
|
|
|
|
return (val >> 61) ^ ~SIGNBIT;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
uint32_t HELPER(get_macu)(uint64_t val)
|
|
|
|
{
|
|
|
|
if ((val >> 32) == 0) {
|
|
|
|
return (uint32_t)val;
|
|
|
|
} else {
|
|
|
|
return 0xffffffffu;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2012-03-14 08:38:22 +08:00
|
|
|
uint32_t HELPER(get_mac_extf)(CPUM68KState *env, uint32_t acc)
|
2008-05-25 06:29:16 +08:00
|
|
|
{
|
|
|
|
uint32_t val;
|
|
|
|
val = env->macc[acc] & 0x00ff;
|
|
|
|
val = (env->macc[acc] >> 32) & 0xff00;
|
|
|
|
val |= (env->macc[acc + 1] << 16) & 0x00ff0000;
|
|
|
|
val |= (env->macc[acc + 1] >> 16) & 0xff000000;
|
|
|
|
return val;
|
|
|
|
}
|
|
|
|
|
2012-03-14 08:38:22 +08:00
|
|
|
uint32_t HELPER(get_mac_exti)(CPUM68KState *env, uint32_t acc)
|
2008-05-25 06:29:16 +08:00
|
|
|
{
|
|
|
|
uint32_t val;
|
|
|
|
val = (env->macc[acc] >> 32) & 0xffff;
|
|
|
|
val |= (env->macc[acc + 1] >> 16) & 0xffff0000;
|
|
|
|
return val;
|
|
|
|
}
|
|
|
|
|
2012-03-14 08:38:22 +08:00
|
|
|
void HELPER(set_mac_extf)(CPUM68KState *env, uint32_t val, uint32_t acc)
|
2008-05-25 06:29:16 +08:00
|
|
|
{
|
|
|
|
int64_t res;
|
|
|
|
int32_t tmp;
|
|
|
|
res = env->macc[acc] & 0xffffffff00ull;
|
|
|
|
tmp = (int16_t)(val & 0xff00);
|
|
|
|
res |= ((int64_t)tmp) << 32;
|
|
|
|
res |= val & 0xff;
|
|
|
|
env->macc[acc] = res;
|
|
|
|
res = env->macc[acc + 1] & 0xffffffff00ull;
|
|
|
|
tmp = (val & 0xff000000);
|
|
|
|
res |= ((int64_t)tmp) << 16;
|
|
|
|
res |= (val >> 16) & 0xff;
|
|
|
|
env->macc[acc + 1] = res;
|
|
|
|
}
|
|
|
|
|
2012-03-14 08:38:22 +08:00
|
|
|
void HELPER(set_mac_exts)(CPUM68KState *env, uint32_t val, uint32_t acc)
|
2008-05-25 06:29:16 +08:00
|
|
|
{
|
|
|
|
int64_t res;
|
|
|
|
int32_t tmp;
|
|
|
|
res = (uint32_t)env->macc[acc];
|
|
|
|
tmp = (int16_t)val;
|
|
|
|
res |= ((int64_t)tmp) << 32;
|
|
|
|
env->macc[acc] = res;
|
|
|
|
res = (uint32_t)env->macc[acc + 1];
|
|
|
|
tmp = val & 0xffff0000;
|
|
|
|
res |= (int64_t)tmp << 16;
|
|
|
|
env->macc[acc + 1] = res;
|
|
|
|
}
|
|
|
|
|
2012-03-14 08:38:22 +08:00
|
|
|
void HELPER(set_mac_extu)(CPUM68KState *env, uint32_t val, uint32_t acc)
|
2008-05-25 06:29:16 +08:00
|
|
|
{
|
|
|
|
uint64_t res;
|
|
|
|
res = (uint32_t)env->macc[acc];
|
|
|
|
res |= ((uint64_t)(val & 0xffff)) << 32;
|
|
|
|
env->macc[acc] = res;
|
|
|
|
res = (uint32_t)env->macc[acc + 1];
|
|
|
|
res |= (uint64_t)(val & 0xffff0000) << 16;
|
|
|
|
env->macc[acc + 1] = res;
|
|
|
|
}
|
2014-09-14 00:45:15 +08:00
|
|
|
|
|
|
|
void m68k_cpu_exec_enter(CPUState *cs)
|
|
|
|
{
|
|
|
|
M68kCPU *cpu = M68K_CPU(cs);
|
|
|
|
CPUM68KState *env = &cpu->env;
|
|
|
|
|
|
|
|
env->cc_op = CC_OP_FLAGS;
|
|
|
|
env->cc_dest = env->sr & 0xf;
|
|
|
|
env->cc_x = (env->sr >> 4) & 1;
|
|
|
|
}
|
|
|
|
|
|
|
|
void m68k_cpu_exec_exit(CPUState *cs)
|
|
|
|
{
|
|
|
|
M68kCPU *cpu = M68K_CPU(cs);
|
|
|
|
CPUM68KState *env = &cpu->env;
|
|
|
|
|
|
|
|
cpu_m68k_flush_flags(env, env->cc_op);
|
|
|
|
env->cc_op = CC_OP_FLAGS;
|
|
|
|
env->sr = (env->sr & 0xffe0) | env->cc_dest | (env->cc_x << 4);
|
|
|
|
}
|