mirror of
https://github.com/qemu/qemu.git
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57 lines
2.5 KiB
XML
57 lines
2.5 KiB
XML
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<?xml version="1.0"?>
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<!-- Copyright (C) 2018-2019 Free Software Foundation, Inc.
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Copying and distribution of this file, with or without modification,
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are permitted in any medium without royalty provided the copyright
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notice and this notice are preserved. -->
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<!-- Register numbers are hard-coded in order to maintain backward
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compatibility with older versions of tools that didn't use xml
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register descriptions. -->
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<!DOCTYPE feature SYSTEM "gdb-target.dtd">
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<feature name="org.gnu.gdb.riscv.fpu">
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<union id="riscv_double">
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<field name="float" type="ieee_single"/>
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<field name="double" type="ieee_double"/>
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</union>
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<reg name="ft0" bitsize="64" type="riscv_double" regnum="33"/>
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<reg name="ft1" bitsize="64" type="riscv_double"/>
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<reg name="ft2" bitsize="64" type="riscv_double"/>
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<reg name="ft3" bitsize="64" type="riscv_double"/>
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<reg name="ft4" bitsize="64" type="riscv_double"/>
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<reg name="ft5" bitsize="64" type="riscv_double"/>
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<reg name="ft6" bitsize="64" type="riscv_double"/>
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<reg name="ft7" bitsize="64" type="riscv_double"/>
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<reg name="fs0" bitsize="64" type="riscv_double"/>
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<reg name="fs1" bitsize="64" type="riscv_double"/>
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<reg name="fa0" bitsize="64" type="riscv_double"/>
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<reg name="fa1" bitsize="64" type="riscv_double"/>
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<reg name="fa2" bitsize="64" type="riscv_double"/>
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<reg name="fa3" bitsize="64" type="riscv_double"/>
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<reg name="fa4" bitsize="64" type="riscv_double"/>
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<reg name="fa5" bitsize="64" type="riscv_double"/>
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<reg name="fa6" bitsize="64" type="riscv_double"/>
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<reg name="fa7" bitsize="64" type="riscv_double"/>
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<reg name="fs2" bitsize="64" type="riscv_double"/>
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<reg name="fs3" bitsize="64" type="riscv_double"/>
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<reg name="fs4" bitsize="64" type="riscv_double"/>
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<reg name="fs5" bitsize="64" type="riscv_double"/>
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<reg name="fs6" bitsize="64" type="riscv_double"/>
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<reg name="fs7" bitsize="64" type="riscv_double"/>
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<reg name="fs8" bitsize="64" type="riscv_double"/>
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<reg name="fs9" bitsize="64" type="riscv_double"/>
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<reg name="fs10" bitsize="64" type="riscv_double"/>
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<reg name="fs11" bitsize="64" type="riscv_double"/>
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<reg name="ft8" bitsize="64" type="riscv_double"/>
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<reg name="ft9" bitsize="64" type="riscv_double"/>
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<reg name="ft10" bitsize="64" type="riscv_double"/>
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<reg name="ft11" bitsize="64" type="riscv_double"/>
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<reg name="fflags" bitsize="32" type="int" regnum="66"/>
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<reg name="frm" bitsize="32" type="int" regnum="67"/>
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<reg name="fcsr" bitsize="32" type="int" regnum="68"/>
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</feature>
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