mirror of
https://github.com/qemu/qemu.git
synced 2024-12-04 09:13:39 +08:00
37 lines
1.2 KiB
C
37 lines
1.2 KiB
C
|
/*
|
||
|
|
* QEMU AVR CPU
|
||
|
|
*
|
||
|
|
* Copyright (c) 2016-2020 Michael Rolnik
|
||
|
|
*
|
||
|
|
* This library is free software; you can redistribute it and/or
|
||
|
|
* modify it under the terms of the GNU Lesser General Public
|
||
|
|
* License as published by the Free Software Foundation; either
|
||
|
|
* version 2.1 of the License, or (at your option) any later version.
|
||
|
|
*
|
||
|
|
* This library is distributed in the hope that it will be useful,
|
||
|
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||
|
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
||
|
|
* Lesser General Public License for more details.
|
||
|
|
*
|
||
|
|
* You should have received a copy of the GNU Lesser General Public
|
||
|
|
* License along with this library; if not, see
|
||
|
|
* <http://www.gnu.org/licenses/lgpl-2.1.html>
|
||
|
|
*/
|
||
|
|
|
||
|
|
#ifndef AVR_CPU_PARAM_H
|
||
|
|
#define AVR_CPU_PARAM_H
|
||
|
|
|
||
|
|
#define TARGET_LONG_BITS 32
|
||
|
|
/*
|
||
|
|
* TARGET_PAGE_BITS cannot be more than 8 bits because
|
||
|
|
* 1. all IO registers occupy [0x0000 .. 0x00ff] address range, and they
|
||
|
|
* should be implemented as a device and not memory
|
||
|
|
* 2. SRAM starts at the address 0x0100
|
||
|
|
*/
|
||
|
|
#define TARGET_PAGE_BITS 8
|
||
|
|
#define TARGET_PHYS_ADDR_SPACE_BITS 24
|
||
|
|
#define TARGET_VIRT_ADDR_SPACE_BITS 24
|
||
|
|
#define NB_MMU_MODES 2
|
||
|
|
|
||
|
|
#endif
|