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qemu/target-ppc/STATUS

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Great PowerPC emulation code resynchronisation and improvments: - Add status file to make regression tracking easier - Move all micro-operations helpers definitions into a separate header: should never be seen outside of op.c - Update copyrights - Add new / missing PowerPC CPU definitions - Add definitions for PowerPC BookE - Add support for PowerPC 6xx/7xx software driven TLBs Allow use of PowerPC 603 as an example - Add preliminary code for POWER, POWER2, PowerPC 403, 405, 440, 601, 602 and BookE support - Avoid compiling priviledged only resources support for user-mode emulation - Remove unused helpers / micro-ops / dead code - Add instructions usage statistics dump: useful to figure which instructions need strong optimizations. - Micro-operation fixes: * add missing RETURN in some micro-ops * fix prototypes * use softfloat routines for all floating-point operations * fix tlbie instruction * move some huge micro-operations into helpers - emulation fixes: * fix inverted opcodes for fcmpo / fcmpu * condition register update is always to be done after the whole instruction has completed * add missing NIP updates when calling helpers that may generate an exception - optimizations and improvments: * optimize very often used instructions (li, mr, rlwixx...) * remove specific micro-ops for rarely used instructions * add routines for addresses computations to avoid bugs due to multiple different implementations * fix TB linking: do not reset T0 at the end of every TB. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2473 c046a42c-6fe2-441c-8c8c-71466251a162
2007-03-07 16:32:30 +08:00
PowerPC emulation status.
The goal of this file is to provide a reference status to avoid regressions.
===============================================================================
PowerPC core emulation status
More PowerPC definitions, from POWER 2.04 specifications and misc sources. Check that at least instructions set and SPRs are correct for PowerPC 401, 403, 405 and 440 cores. Implement PowerPC 401 MMU model (real-mode only). Improve INSNs and SPRs dump to ease parse with standard shell tools. Add more precise status for most PowerPC cores families. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3201 c046a42c-6fe2-441c-8c8c-71466251a162
2007-09-21 13:50:37 +08:00
32 bits PowerPC
PowerPC 601:
INSN
SPR
MMU
EXCP
PowerPC 602:
INSN
SPR
MMU
EXCP
PowerPC 603:
INSN OK
SPR OK
MMU OK
EXCP OK
PowerPC 604:
INSN OK
SPR OK
MMU OK
EXCP OK
PowerPC 740:
INSN OK
SPR OK
MMU OK
EXCP OK
PowerPC 745:
INSN
SPR
MMU
EXCP
PowerPC 750:
INSN OK
SPR OK
MMU OK
EXCP OK
PowerPC 755:
INSN
SPR
MMU
EXCP
PowerPC 7400:
INSN KO
SPR KO
MMU OK
EXCP OK
PowerPC 7410:
INSN KO
SPR KO
MMU OK
EXCP OK
PowerPC 7450:
INSN KO
SPR KO
MMU OK
EXCP OK
PowerPC 7455:
INSN KO
SPR KO
MMU OK
EXCP OK
PowerPC 7457:
INSN KO
SPR KO
MMU OK
EXCP OK
PowerPC 7457A:
INSN KO
SPR KO
MMU OK
EXCP OK
64 bits PowerPC
PowerPC 970:
INSN KO
SPR KO
MMU KO
EXCP KO
PowerPC 620: (lack of precise informations)
INSN KO
SPR KO
MMU KO
EXCP KO
PowerPC 630: (lack of precise informations)
INSN KO
SPR KO
MMU KO
EXCP KO
PowerPC 631: (lack of precise informations)
INSN KO
SPR KO
MMU KO
EXCP KO
POWER4: (lack of precise informations)
INSN KO
SPR KO
MMU KO
EXCP KO
POWER4+: (lack of precise informations)
INSN KO
SPR KO
MMU KO
EXCP KO
POWER5: (lack of precise informations)
INSN KO
SPR KO
MMU KO
EXCP KO
POWER5+: (lack of precise informations)
INSN KO
SPR KO
MMU KO
EXCP KO
POWER6: (lack of precise informations)
INSN KO
SPR KO
MMU KO
EXCP KO
RS64: (lack of precise informations)
INSN KO
SPR KO
MMU KO
EXCP KO
RS64-II: (lack of precise informations)
INSN KO
SPR KO
MMU KO
EXCP KO
RS64-III: (lack of precise informations)
INSN KO
SPR KO
MMU KO
EXCP KO
RS64-IV: (lack of precise informations)
INSN KO
SPR KO
MMU KO
EXCP KO
Embedded PowerPC cores
PowerPC 401:
INSN OK
SPR OK
MMU OK
EXCP ?
PowerPC 403:
INSN OK
SPR OK
MMU OK
EXCP ?
PowerPC 405:
INSN OK
SPR OK
MMU OK
EXCP OK
PowerPC 440:
INSN OK
SPR OK
MMU ?
EXCP ?
PowerPC 460: (lack of precise informations)
INSN KO
SPR KO
MMU KO
EXCP KO
Freescale (to be completed) ...
Original POWER
POWER: (lack of precise informations)
INSN KO
SPR KO
MMU KO
EXCP KO
POWER2: (lack of precise informations)
INSN KO
SPR KO
MMU KO
EXCP KO
Great PowerPC emulation code resynchronisation and improvments: - Add status file to make regression tracking easier - Move all micro-operations helpers definitions into a separate header: should never be seen outside of op.c - Update copyrights - Add new / missing PowerPC CPU definitions - Add definitions for PowerPC BookE - Add support for PowerPC 6xx/7xx software driven TLBs Allow use of PowerPC 603 as an example - Add preliminary code for POWER, POWER2, PowerPC 403, 405, 440, 601, 602 and BookE support - Avoid compiling priviledged only resources support for user-mode emulation - Remove unused helpers / micro-ops / dead code - Add instructions usage statistics dump: useful to figure which instructions need strong optimizations. - Micro-operation fixes: * add missing RETURN in some micro-ops * fix prototypes * use softfloat routines for all floating-point operations * fix tlbie instruction * move some huge micro-operations into helpers - emulation fixes: * fix inverted opcodes for fcmpo / fcmpu * condition register update is always to be done after the whole instruction has completed * add missing NIP updates when calling helpers that may generate an exception - optimizations and improvments: * optimize very often used instructions (li, mr, rlwixx...) * remove specific micro-ops for rarely used instructions * add routines for addresses computations to avoid bugs due to multiple different implementations * fix TB linking: do not reset T0 at the end of every TB. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2473 c046a42c-6fe2-441c-8c8c-71466251a162
2007-03-07 16:32:30 +08:00
PowerPC CPU known to work (ie booting at least Linux 2.4):
* main stream PowerPC cores
- PowerPC 603 & derivatives
- PowerPC 604 & derivatives
- PowerPC 740 & derivatives
- PowerPC 750 & derivatives
Update PowerPC target status. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2724 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-24 15:51:56 +08:00
- PowerPC 405
Great PowerPC emulation code resynchronisation and improvments: - Add status file to make regression tracking easier - Move all micro-operations helpers definitions into a separate header: should never be seen outside of op.c - Update copyrights - Add new / missing PowerPC CPU definitions - Add definitions for PowerPC BookE - Add support for PowerPC 6xx/7xx software driven TLBs Allow use of PowerPC 603 as an example - Add preliminary code for POWER, POWER2, PowerPC 403, 405, 440, 601, 602 and BookE support - Avoid compiling priviledged only resources support for user-mode emulation - Remove unused helpers / micro-ops / dead code - Add instructions usage statistics dump: useful to figure which instructions need strong optimizations. - Micro-operation fixes: * add missing RETURN in some micro-ops * fix prototypes * use softfloat routines for all floating-point operations * fix tlbie instruction * move some huge micro-operations into helpers - emulation fixes: * fix inverted opcodes for fcmpo / fcmpu * condition register update is always to be done after the whole instruction has completed * add missing NIP updates when calling helpers that may generate an exception - optimizations and improvments: * optimize very often used instructions (li, mr, rlwixx...) * remove specific micro-ops for rarely used instructions * add routines for addresses computations to avoid bugs due to multiple different implementations * fix TB linking: do not reset T0 at the end of every TB. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2473 c046a42c-6fe2-441c-8c8c-71466251a162
2007-03-07 16:32:30 +08:00
PowerPC that should work but are not supported by standard Linux kernel
(then remain mostly untested)
- PowerPC 745
- PowerPC 755
Work in progress:
* embedded PowerPC cores
- BookE PowerPC
- e500 core (Freescale PowerQUICC)
* main stream PowerPC cores
- PowerPC 601
- PowerPC 602
TODO:
* embedded PowerPC cores
- PowerPC 401
- PowerPC 403
- PowerPC 440
- PowerPC 460
* main stream PowerPC cores
- PowerPC 7400 (aka G4)
- PowerPC 7410
- PowerPC 7450
- PowerPC 7455
- PowerPC 7457
- PowerPC 7457A
* original POWER
- POWER
- POWER2
* 64 bits PowerPC cores
- PowerPC 620
- PowerPC 630 (aka POWER3)
- PowerPC 631 (aka POWER3+)
- POWER4
- POWER4+
- POWER5
- POWER5+
- PowerPC 970
* RS64 series
- RS64
- RS64-II
- RS64-III
- RS64-IV
===============================================================================
PowerPC microcontrollers emulation status
Update PowerPC target status. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2724 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-24 15:51:56 +08:00
Implemementation should be sufficient to boot Linux:
- PowerPC 405CR
- PowerPC 405EP
Great PowerPC emulation code resynchronisation and improvments: - Add status file to make regression tracking easier - Move all micro-operations helpers definitions into a separate header: should never be seen outside of op.c - Update copyrights - Add new / missing PowerPC CPU definitions - Add definitions for PowerPC BookE - Add support for PowerPC 6xx/7xx software driven TLBs Allow use of PowerPC 603 as an example - Add preliminary code for POWER, POWER2, PowerPC 403, 405, 440, 601, 602 and BookE support - Avoid compiling priviledged only resources support for user-mode emulation - Remove unused helpers / micro-ops / dead code - Add instructions usage statistics dump: useful to figure which instructions need strong optimizations. - Micro-operation fixes: * add missing RETURN in some micro-ops * fix prototypes * use softfloat routines for all floating-point operations * fix tlbie instruction * move some huge micro-operations into helpers - emulation fixes: * fix inverted opcodes for fcmpo / fcmpu * condition register update is always to be done after the whole instruction has completed * add missing NIP updates when calling helpers that may generate an exception - optimizations and improvments: * optimize very often used instructions (li, mr, rlwixx...) * remove specific micro-ops for rarely used instructions * add routines for addresses computations to avoid bugs due to multiple different implementations * fix TB linking: do not reset T0 at the end of every TB. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2473 c046a42c-6fe2-441c-8c8c-71466251a162
2007-03-07 16:32:30 +08:00
TODO:
Update PowerPC target status. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2724 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-24 15:51:56 +08:00
- More PowerPC 40x microcontrollers emulation
Great PowerPC emulation code resynchronisation and improvments: - Add status file to make regression tracking easier - Move all micro-operations helpers definitions into a separate header: should never be seen outside of op.c - Update copyrights - Add new / missing PowerPC CPU definitions - Add definitions for PowerPC BookE - Add support for PowerPC 6xx/7xx software driven TLBs Allow use of PowerPC 603 as an example - Add preliminary code for POWER, POWER2, PowerPC 403, 405, 440, 601, 602 and BookE support - Avoid compiling priviledged only resources support for user-mode emulation - Remove unused helpers / micro-ops / dead code - Add instructions usage statistics dump: useful to figure which instructions need strong optimizations. - Micro-operation fixes: * add missing RETURN in some micro-ops * fix prototypes * use softfloat routines for all floating-point operations * fix tlbie instruction * move some huge micro-operations into helpers - emulation fixes: * fix inverted opcodes for fcmpo / fcmpu * condition register update is always to be done after the whole instruction has completed * add missing NIP updates when calling helpers that may generate an exception - optimizations and improvments: * optimize very often used instructions (li, mr, rlwixx...) * remove specific micro-ops for rarely used instructions * add routines for addresses computations to avoid bugs due to multiple different implementations * fix TB linking: do not reset T0 at the end of every TB. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2473 c046a42c-6fe2-441c-8c8c-71466251a162
2007-03-07 16:32:30 +08:00
- PowerQUICC microcontrollers emulation
===============================================================================
PowerPC based platforms emulation status
* PREP platform (RS/6000 7043...) - TO BE CHECKED (broken)
- Gentoo Linux live CDROM 1.4
- Debian Linux 3.0
- Mandrake Linux 9
* heathrow PowerMac platform (beige PowerMac) - TO BE CHECKED (broken)
- Gentoo Linux live CDROM 1.4
- Debian Linux 3.0
- Mandrake Linux 9
* mac99 platform (white and blue PowerMac, ...)
- Gentoo Linux live CDROM 1.4 - boots, compiles linux kernel
- Debian Linux woody - boots from CDROM and HDD
- Mandrake Linux 9 - boots from CDROM, freezes during install
Update PowerPC target status. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2724 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-24 15:51:56 +08:00
- Knoppix 2003-07-13_4 boots from CDROM, pb with X configuration
distribution bug: X runs with a properly hand-coded configuration.
- rock Linux 2.0 runs from CDROM
* Linux 2.6 support seems deadly broken (used to boot...).
* PowerPC 405EP reference boards:
- can boot Linux 2.4 & 2.6.
Need to provide a flash image ready to boot for reproductible tests.
Great PowerPC emulation code resynchronisation and improvments: - Add status file to make regression tracking easier - Move all micro-operations helpers definitions into a separate header: should never be seen outside of op.c - Update copyrights - Add new / missing PowerPC CPU definitions - Add definitions for PowerPC BookE - Add support for PowerPC 6xx/7xx software driven TLBs Allow use of PowerPC 603 as an example - Add preliminary code for POWER, POWER2, PowerPC 403, 405, 440, 601, 602 and BookE support - Avoid compiling priviledged only resources support for user-mode emulation - Remove unused helpers / micro-ops / dead code - Add instructions usage statistics dump: useful to figure which instructions need strong optimizations. - Micro-operation fixes: * add missing RETURN in some micro-ops * fix prototypes * use softfloat routines for all floating-point operations * fix tlbie instruction * move some huge micro-operations into helpers - emulation fixes: * fix inverted opcodes for fcmpo / fcmpu * condition register update is always to be done after the whole instruction has completed * add missing NIP updates when calling helpers that may generate an exception - optimizations and improvments: * optimize very often used instructions (li, mr, rlwixx...) * remove specific micro-ops for rarely used instructions * add routines for addresses computations to avoid bugs due to multiple different implementations * fix TB linking: do not reset T0 at the end of every TB. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2473 c046a42c-6fe2-441c-8c8c-71466251a162
2007-03-07 16:32:30 +08:00
TODO:
- MCA based RS/6000 emulation
- CHRP emulation (not PowerMac)
- PPAR emulation
Update PowerPC target status. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2724 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-24 15:51:56 +08:00
- ePPAR emulation
Great PowerPC emulation code resynchronisation and improvments: - Add status file to make regression tracking easier - Move all micro-operations helpers definitions into a separate header: should never be seen outside of op.c - Update copyrights - Add new / missing PowerPC CPU definitions - Add definitions for PowerPC BookE - Add support for PowerPC 6xx/7xx software driven TLBs Allow use of PowerPC 603 as an example - Add preliminary code for POWER, POWER2, PowerPC 403, 405, 440, 601, 602 and BookE support - Avoid compiling priviledged only resources support for user-mode emulation - Remove unused helpers / micro-ops / dead code - Add instructions usage statistics dump: useful to figure which instructions need strong optimizations. - Micro-operation fixes: * add missing RETURN in some micro-ops * fix prototypes * use softfloat routines for all floating-point operations * fix tlbie instruction * move some huge micro-operations into helpers - emulation fixes: * fix inverted opcodes for fcmpo / fcmpu * condition register update is always to be done after the whole instruction has completed * add missing NIP updates when calling helpers that may generate an exception - optimizations and improvments: * optimize very often used instructions (li, mr, rlwixx...) * remove specific micro-ops for rarely used instructions * add routines for addresses computations to avoid bugs due to multiple different implementations * fix TB linking: do not reset T0 at the end of every TB. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2473 c046a42c-6fe2-441c-8c8c-71466251a162
2007-03-07 16:32:30 +08:00
- misc PowerPC reference boards emulation
===============================================================================
(to be completed)
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