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realtek: Improve MDIO bus probing for RTL9300

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Improve handling of multi-gig ports on the RTL9300 when probing
the MDIO bus.

Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
This commit is contained in:
Birger Koblitz 2021-09-26 17:37:25 +02:00 committed by John Crispin
parent 9ae927febd
commit ee6f483a62
1 changed files with 11 additions and 21 deletions
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32
target/linux/realtek/files-5.10/drivers/net/dsa/rtl83xx/common.c
View File

@ -2,6 +2,11 @@
#include <linux/of_mdio.h> #include <linux/of_mdio.h>
#include <linux/of_platform.h> #include <linux/of_platform.h>
#include <net/arp.h>
#include <net/nexthop.h>
#include <net/neighbour.h>
#include <net/netevent.h>
#include <linux/inetdevice.h>
#include <asm/mach-rtl838x/mach-rtl83xx.h> #include <asm/mach-rtl838x/mach-rtl83xx.h>
#include "rtl83xx.h" #include "rtl83xx.h"
@ -303,38 +308,32 @@ static int __init rtl83xx_mdio_probe(struct rtl838x_switch_priv *priv)
continue; continue;
// Check for the integrated SerDes of the RTL8380M first // Check for the integrated SerDes of the RTL8380M first
if (of_property_read_bool(dn, "phy-is-integrated") if (of_property_read_bool(dn, "phy-is-integrated") && priv->id == 0x8380 && pn >= 24) {
&& priv->id == 0x8380 && pn >= 24) {
pr_debug("----> FÓUND A SERDES\n"); pr_debug("----> FÓUND A SERDES\n");
priv->ports[pn].phy = PHY_RTL838X_SDS; priv->ports[pn].phy = PHY_RTL838X_SDS;
continue; continue;
} }
if (of_property_read_bool(dn, "phy-is-integrated") if (of_property_read_bool(dn, "phy-is-integrated") && !of_property_read_bool(dn, "sfp")) {
&& !of_property_read_bool(dn, "sfp")) {
priv->ports[pn].phy = PHY_RTL8218B_INT; priv->ports[pn].phy = PHY_RTL8218B_INT;
continue; continue;
} }
if (!of_property_read_bool(dn, "phy-is-integrated") if (!of_property_read_bool(dn, "phy-is-integrated") && of_property_read_bool(dn, "sfp")) {
&& of_property_read_bool(dn, "sfp")) {
priv->ports[pn].phy = PHY_RTL8214FC; priv->ports[pn].phy = PHY_RTL8214FC;
continue; continue;
} }
if (!of_property_read_bool(dn, "phy-is-integrated") if (!of_property_read_bool(dn, "phy-is-integrated") && !of_property_read_bool(dn, "sfp")) {
&& !of_property_read_bool(dn, "sfp")) {
priv->ports[pn].phy = PHY_RTL8218B_EXT; priv->ports[pn].phy = PHY_RTL8218B_EXT;
continue; continue;
} }
} }
// TODO: Do this needs to come from the .dts, at least the SerDes number // TODO: Do this needs to come from the .dts
if (priv->family_id == RTL9300_FAMILY_ID) { if (priv->family_id == RTL9300_FAMILY_ID) {
priv->ports[24].is2G5 = true; priv->ports[24].is2G5 = true;
priv->ports[25].is2G5 = true; priv->ports[25].is2G5 = true;
priv->ports[24].sds_num = 1;
priv->ports[24].sds_num = 2;
} }
/* Disable MAC polling the PHY so that we can start configuration */ /* Disable MAC polling the PHY so that we can start configuration */
@ -344,7 +343,7 @@ static int __init rtl83xx_mdio_probe(struct rtl838x_switch_priv *priv)
if (priv->family_id == RTL8380_FAMILY_ID) { if (priv->family_id == RTL8380_FAMILY_ID) {
/* Enable SerDes NWAY and PHY control via SoC */ /* Enable SerDes NWAY and PHY control via SoC */
sw_w32_mask(BIT(7), BIT(15), RTL838X_SMI_GLB_CTRL); sw_w32_mask(BIT(7), BIT(15), RTL838X_SMI_GLB_CTRL);
} else { } else if (priv->family_id == RTL8390_FAMILY_ID) {
/* Disable PHY polling via SoC */ /* Disable PHY polling via SoC */
sw_w32_mask(BIT(7), 0, RTL839X_SMI_GLB_CTRL); sw_w32_mask(BIT(7), 0, RTL839X_SMI_GLB_CTRL);
} }
@ -356,15 +355,6 @@ static int __init rtl83xx_mdio_probe(struct rtl838x_switch_priv *priv)
rtl8380_sds_power(26, 1); rtl8380_sds_power(26, 1);
} }
// TODO: Only power on SerDes with external PHYs connected
if (priv->family_id == RTL9300_FAMILY_ID) {
pr_info("RTL9300 Powering on SerDes ports\n");
rtl9300_sds_power(24, 1);
rtl9300_sds_power(25, 1);
rtl9300_sds_power(26, 1);
rtl9300_sds_power(27, 1);
}
pr_debug("%s done\n", __func__); pr_debug("%s done\n", __func__);
return 0; return 0;
} }