mirror of
https://github.com/openwrt/openwrt.git
synced 2024-11-25 10:54:01 +08:00
realtek: remove support for HPE 1920 series
Support for HPE 1920 images depends on two non-existent tools (mkh3cimg
and mkh3cvfs) from the in the firmware-utils package. Revert commit
f2f09bc002 ("realtek: add support for HPE 1920 series") until support
for these tools is merged and made available in OpenWrt.
Signed-off-by: Sander Vanheule <sander@svanheule.net>
This commit is contained in:
Sander Vanheule
parent
f2f09bc002
commit
a63aeaecf1
@ -22,20 +22,9 @@ ucidef_set_bridge_device switch
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ucidef_set_interface_lan "$lan_list"
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lan_mac=""
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lan_mac_start=""
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lan_mac_end=""
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label_mac=""
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case $board in
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hpe,1920-8g|\
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hpe,1920-16g|\
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hpe,1920-24g)
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label_mac=$(mtd_get_mac_binary factory 0x68)
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lan_mac=$label_mac
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mac_count1=$(hexdump -v -n 4 -s 0x110 -e '4 "%d"' $(find_mtd_part factory) 2>/dev/null)
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mac_count2=$(hexdump -v -n 4 -s 0x114 -e '4 "%d"' $(find_mtd_part factory) 2>/dev/null)
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lan_mac_start=$(macaddr_add $lan_mac 2)
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lan_mac_end=$(macaddr_add $lan_mac $((mac_count2-mac_count1)))
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;;
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*)
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lan_mac=$(mtd_get_mac_ascii u-boot-env2 mac_start)
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lan_mac_end=$(mtd_get_mac_ascii u-boot-env2 mac_end)
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@ -47,11 +36,10 @@ esac
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ucidef_set_interface_macaddr "lan" $lan_mac
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ucidef_set_bridge_mac "$lan_mac"
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ucidef_set_network_device_mac eth0 $lan_mac
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[ -z "$lan_mac_start" ] && lan_mac_start=$lan_mac
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for lan in $lan_list; do
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ucidef_set_network_device_mac $lan $lan_mac_start
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[ -z "$lan_mac_end" ] || [ "$lan_mac_start" == "$lan_mac_end" ] && lan_mac_start=$(macaddr_setbit_la $lan_mac_start)
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lan_mac_start=$(macaddr_add $lan_mac_start 1)
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ucidef_set_network_device_mac $lan $lan_mac
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[ -z "$lan_mac_end" ] || [ "$lan_mac" == "$lan_mac_end" ] && lan_mac=$(macaddr_setbit_la $lan_mac)
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lan_mac=$(macaddr_add $lan_mac 1)
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done
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[ -n "$label_mac" ] && ucidef_set_label_macaddr $label_mac
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@ -1,113 +0,0 @@
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// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
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#include "rtl838x.dtsi"
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#include "rtl838x_hpe_1920.dtsi"
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/ {
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compatible = "hpe,1920-8g", "realtek,rtl838x-soc";
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model = "HPE 1920-8G (JG920A)";
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gpio1: rtl8231-gpio {
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compatible = "realtek,rtl8231-gpio";
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#gpio-cells = <2>;
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gpio-controller;
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indirect-access-bus-id = <0>;
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};
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i2c0: i2c-gpio-0 {
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compatible = "i2c-gpio";
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sda-gpios = <&gpio1 23 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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scl-gpios = <&gpio1 24 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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i2c-gpio,delay-us = <2>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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sfp0: sfp-0 {
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compatible = "sff,sfp";
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i2c-bus = <&i2c0>;
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los-gpio = <&gpio1 26 GPIO_ACTIVE_HIGH>;
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mod-def0-gpio = <&gpio1 25 GPIO_ACTIVE_LOW>;
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// tx-fault and tx-disable unconnected
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};
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i2c1: i2c-gpio-1 {
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compatible = "i2c-gpio";
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sda-gpios = <&gpio1 13 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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scl-gpios = <&gpio1 14 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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i2c-gpio,delay-us = <2>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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sfp1: sfp-1 {
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compatible = "sff,sfp";
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i2c-bus = <&i2c1>;
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los-gpio = <&gpio1 22 GPIO_ACTIVE_HIGH>;
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mod-def0-gpio = <&gpio1 21 GPIO_ACTIVE_LOW>;
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// tx-fault and tx-disable unconnected
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};
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};
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ðernet0 {
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mdio: mdio-bus {
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compatible = "realtek,rtl838x-mdio";
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regmap = <ðernet0>;
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#address-cells = <1>;
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#size-cells = <0>;
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INTERNAL_PHY(8)
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INTERNAL_PHY(9)
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INTERNAL_PHY(10)
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INTERNAL_PHY(11)
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INTERNAL_PHY(12)
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INTERNAL_PHY(13)
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INTERNAL_PHY(14)
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INTERNAL_PHY(15)
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INTERNAL_PHY(24)
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INTERNAL_PHY(26)
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};
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};
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&switch0 {
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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SWITCH_PORT(8, 1, internal)
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SWITCH_PORT(9, 2, internal)
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SWITCH_PORT(10, 3, internal)
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SWITCH_PORT(11, 4, internal)
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SWITCH_PORT(12, 5, internal)
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SWITCH_PORT(13, 6, internal)
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SWITCH_PORT(14, 7, internal)
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SWITCH_PORT(15, 8, internal)
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port@24 {
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reg = <24>;
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label = "lan9";
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phy-mode = "1000base-x";
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managed = "in-band-status";
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sfp = <&sfp0>;
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};
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port@26 {
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reg = <26>;
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label = "lan10";
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phy-mode = "1000base-x";
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managed = "in-band-status";
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sfp = <&sfp1>;
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};
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port@28 {
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ethernet = <ðernet0>;
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reg = <28>;
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phy-mode = "internal";
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fixed-link {
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speed = <1000>;
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full-duplex;
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};
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};
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};
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};
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@ -1,48 +0,0 @@
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// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
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#include "rtl8382_hpe_1920.dtsi"
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/ {
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compatible = "hpe,1920-16g", "realtek,rtl838x-soc";
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model = "HPE 1920-16G (JG923A)";
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};
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&switch0 {
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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SWITCH_PORT(8, 1, internal)
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SWITCH_PORT(9, 2, internal)
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SWITCH_PORT(10, 3, internal)
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SWITCH_PORT(11, 4, internal)
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SWITCH_PORT(12, 5, internal)
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SWITCH_PORT(13, 6, internal)
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SWITCH_PORT(14, 7, internal)
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SWITCH_PORT(15, 8, internal)
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SWITCH_PORT(16, 9, qsgmii)
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SWITCH_PORT(17, 10, qsgmii)
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SWITCH_PORT(18, 11, qsgmii)
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SWITCH_PORT(19, 12, qsgmii)
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SWITCH_PORT(20, 13, qsgmii)
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SWITCH_PORT(21, 14, qsgmii)
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SWITCH_PORT(22, 15, qsgmii)
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SWITCH_PORT(23, 16, qsgmii)
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SWITCH_PORT(24, 17, qsgmii)
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SWITCH_PORT(25, 18, qsgmii)
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SWITCH_PORT(26, 19, qsgmii)
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SWITCH_PORT(27, 20, qsgmii)
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port@28 {
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ethernet = <ðernet0>;
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reg = <28>;
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phy-mode = "internal";
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fixed-link {
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speed = <1000>;
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full-duplex;
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};
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};
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};
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};
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@ -1,68 +0,0 @@
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// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
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#include "rtl8382_hpe_1920.dtsi"
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/ {
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compatible = "hpe,1920-24g", "realtek,rtl838x-soc";
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model = "HPE 1920-24G (JG924A)";
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};
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&mdio {
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EXTERNAL_PHY(0)
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EXTERNAL_PHY(1)
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EXTERNAL_PHY(2)
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EXTERNAL_PHY(3)
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EXTERNAL_PHY(4)
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EXTERNAL_PHY(5)
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EXTERNAL_PHY(6)
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EXTERNAL_PHY(7)
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};
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&switch0 {
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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SWITCH_PORT(0, 1, qsgmii)
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SWITCH_PORT(1, 2, qsgmii)
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SWITCH_PORT(2, 3, qsgmii)
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SWITCH_PORT(3, 4, qsgmii)
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SWITCH_PORT(4, 5, qsgmii)
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SWITCH_PORT(5, 6, qsgmii)
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SWITCH_PORT(6, 7, qsgmii)
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SWITCH_PORT(7, 8, qsgmii)
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SWITCH_PORT(8, 9, internal)
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SWITCH_PORT(9, 10, internal)
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SWITCH_PORT(10, 11, internal)
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SWITCH_PORT(11, 12, internal)
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SWITCH_PORT(12, 13, internal)
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SWITCH_PORT(13, 14, internal)
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SWITCH_PORT(14, 15, internal)
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SWITCH_PORT(15, 16, internal)
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SWITCH_PORT(16, 17, qsgmii)
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SWITCH_PORT(17, 18, qsgmii)
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SWITCH_PORT(18, 19, qsgmii)
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SWITCH_PORT(19, 20, qsgmii)
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SWITCH_PORT(20, 21, qsgmii)
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SWITCH_PORT(21, 22, qsgmii)
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SWITCH_PORT(22, 23, qsgmii)
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SWITCH_PORT(23, 24, qsgmii)
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SWITCH_PORT(24, 25, qsgmii)
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SWITCH_PORT(25, 26, qsgmii)
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SWITCH_PORT(26, 27, qsgmii)
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SWITCH_PORT(27, 28, qsgmii)
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port@28 {
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ethernet = <ðernet0>;
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reg = <28>;
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phy-mode = "internal";
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fixed-link {
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speed = <1000>;
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full-duplex;
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};
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};
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};
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};
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@ -1,117 +0,0 @@
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// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
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#include "rtl838x.dtsi"
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#include "rtl838x_hpe_1920.dtsi"
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/ {
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gpio1: rtl8231-gpio {
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compatible = "realtek,rtl8231-gpio";
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#gpio-cells = <2>;
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gpio-controller;
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indirect-access-bus-id = <0>;
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};
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i2c0: i2c-gpio-0 {
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compatible = "i2c-gpio";
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sda-gpios = <&gpio1 13 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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scl-gpios = <&gpio1 14 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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i2c-gpio,delay-us = <2>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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sfp0: sfp-0 {
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compatible = "sff,sfp";
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i2c-bus = <&i2c0>;
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los-gpio = <&gpio1 22 GPIO_ACTIVE_HIGH>;
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mod-def0-gpio = <&gpio1 21 GPIO_ACTIVE_LOW>;
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// tx-fault unconnected
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// tx-disable connected to RTL8214FC
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};
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i2c1: i2c-gpio-1 {
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compatible = "i2c-gpio";
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sda-gpios = <&gpio1 23 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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scl-gpios = <&gpio1 24 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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i2c-gpio,delay-us = <2>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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sfp1: sfp-1 {
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compatible = "sff,sfp";
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i2c-bus = <&i2c1>;
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los-gpio = <&gpio1 26 GPIO_ACTIVE_HIGH>;
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mod-def0-gpio = <&gpio1 25 GPIO_ACTIVE_LOW>;
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// tx-fault unconnected
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// tx-disable connected to RTL8214FC
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};
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i2c2: i2c-gpio-2 {
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compatible = "i2c-gpio";
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sda-gpios = <&gpio1 27 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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scl-gpios = <&gpio1 28 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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i2c-gpio,delay-us = <2>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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sfp2: sfp-2 {
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compatible = "sff,sfp";
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i2c-bus = <&i2c2>;
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los-gpio = <&gpio1 30 GPIO_ACTIVE_HIGH>;
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mod-def0-gpio = <&gpio1 29 GPIO_ACTIVE_LOW>;
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// tx-fault unconnected
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// tx-disable connected to RTL8214FC
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};
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i2c3: i2c-gpio-3 {
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compatible = "i2c-gpio";
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sda-gpios = <&gpio1 31 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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scl-gpios = <&gpio1 32 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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i2c-gpio,delay-us = <2>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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sfp3: sfp-3 {
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compatible = "sff,sfp";
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i2c-bus = <&i2c3>;
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los-gpio = <&gpio1 34 GPIO_ACTIVE_HIGH>;
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mod-def0-gpio = <&gpio1 33 GPIO_ACTIVE_LOW>;
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// tx-fault unconnected
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// tx-disable connected to RTL8214FC
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};
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};
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ðernet0 {
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mdio: mdio-bus {
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compatible = "realtek,rtl838x-mdio";
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regmap = <ðernet0>;
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#address-cells = <1>;
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#size-cells = <0>;
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INTERNAL_PHY(8)
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INTERNAL_PHY(9)
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INTERNAL_PHY(10)
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INTERNAL_PHY(11)
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INTERNAL_PHY(12)
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INTERNAL_PHY(13)
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INTERNAL_PHY(14)
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INTERNAL_PHY(15)
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EXTERNAL_PHY(16)
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EXTERNAL_PHY(17)
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EXTERNAL_PHY(18)
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EXTERNAL_PHY(19)
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EXTERNAL_PHY(20)
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EXTERNAL_PHY(21)
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EXTERNAL_PHY(22)
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EXTERNAL_PHY(23)
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EXTERNAL_SFP_PHY_FULL(24, 0)
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EXTERNAL_SFP_PHY_FULL(25, 1)
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EXTERNAL_SFP_PHY_FULL(26, 2)
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EXTERNAL_SFP_PHY_FULL(27, 3)
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};
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};
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@ -27,13 +27,6 @@
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reg = <##n>; \
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};
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#define EXTERNAL_SFP_PHY_FULL(n, s) \
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phy##n: ethernet-phy@##n { \
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compatible = "ethernet-phy-ieee802.3-c22"; \
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sfp = <&sfp##s>; \
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reg = <##n>; \
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};
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#define SWITCH_PORT(n, s, m) \
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port@##n { \
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reg = <##n>; \
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@ -1,96 +0,0 @@
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// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
|
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/gpio/gpio.h>
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/ {
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chosen {
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bootargs = "console=ttyS0,38400";
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};
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memory@0 {
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device_type = "memory";
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reg = <0x0 0x8000000>;
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};
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watchdog1: watchdog {
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// PT7A7514
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compatible = "linux,wdt-gpio";
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gpios = <&gpio0 0 GPIO_ACTIVE_HIGH>;
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hw_algo = "toggle";
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hw_margin_ms = <1000>;
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always-running;
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pinctrl-names = "default";
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pinctrl-0 = <&pinmux_disable_sys_led>;
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};
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};
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&watchdog0 {
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status = "disabled";
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};
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&spi0 {
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status = "okay";
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flash@0 {
|
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compatible = "jedec,spi-nor";
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reg = <0>;
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spi-max-frequency = <50000000>;
|
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m25p,fast-read;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "bootware_basic";
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reg = <0x0 0x50000>;
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read-only;
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};
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partition@0x60000 {
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label = "bootware_data";
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reg = <0x60000 0x30000>;
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||||
read-only;
|
||||
};
|
||||
|
||||
partition@0x90000 {
|
||||
label = "bootware_extend";
|
||||
reg = <0x90000 0x40000>;
|
||||
read-only;
|
||||
};
|
||||
|
||||
partition@0x100000 {
|
||||
label = "bootware_basic_backup";
|
||||
reg = <0x100000 0x50000>;
|
||||
read-only;
|
||||
};
|
||||
|
||||
partition@0x160000 {
|
||||
label = "bootware_data_backup";
|
||||
reg = <0x160000 0x30000>;
|
||||
read-only;
|
||||
};
|
||||
|
||||
partition@0x190000 {
|
||||
label = "bootware_extend_backup";
|
||||
reg = <0x190000 0x40000>;
|
||||
read-only;
|
||||
};
|
||||
|
||||
partition@0x300000 {
|
||||
label = "firmware";
|
||||
compatible = "h3c,vfs-firmware";
|
||||
reg = <0x300000 0x1cf0000>;
|
||||
};
|
||||
|
||||
partition@0x1ff0000 {
|
||||
label = "factory";
|
||||
reg = <0x1ff0000 0x10000>;
|
||||
read-only;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
@ -8,7 +8,6 @@ KERNEL_ENTRY = 0x80000400
|
||||
|
||||
DEVICE_VARS += ZYXEL_VERS DLINK_KERNEL_PART_SIZE
|
||||
DEVICE_VARS += CAMEO_KERNEL_PART CAMEO_ROOTFS_PART CAMEO_CUSTOMER_SIGNATURE CAMEO_BOARD_VERSION
|
||||
DEVICE_VARS += H3C_PRODUCT_ID H3C_DEVICE_ID
|
||||
|
||||
define Build/zyxel-vers
|
||||
( echo VERS;\
|
||||
@ -42,43 +41,6 @@ define Build/dlink-headers
|
||||
cat $@.kernel_part.hex $@.rootfs_part.hex > $@
|
||||
endef
|
||||
|
||||
define Build/7z
|
||||
$(STAGING_DIR_HOST)/bin/7zr a $(@).new -t7z -m0=lzma $(@)
|
||||
mv $@.new $@
|
||||
endef
|
||||
|
||||
define Build/h3c-image
|
||||
$(STAGING_DIR_HOST)/bin/mkh3cimg \
|
||||
-i $(@) \
|
||||
-o $(@).new \
|
||||
-c 7z \
|
||||
-p $(H3C_PRODUCT_ID) \
|
||||
-d $(H3C_DEVICE_ID)
|
||||
mv $@.new $@
|
||||
endef
|
||||
|
||||
define Build/h3c-vfs
|
||||
$(STAGING_DIR_HOST)/bin/mkh3cvfs \
|
||||
-i $(@) \
|
||||
-o $(@).new \
|
||||
-f openwrt-kernel.bin
|
||||
mv $@.new $@
|
||||
endef
|
||||
|
||||
define Build/relocate-kernel
|
||||
rm -rf $@.relocate
|
||||
$(CP) ../../generic/image/relocate $@.relocate
|
||||
$(MAKE) -j1 -C $@.relocate KERNEL_ADDR=$(KERNEL_LOADADDR) LZMA_TEXT_START=0x82000000 \
|
||||
CROSS_COMPILE=$(TARGET_CROSS)
|
||||
( \
|
||||
dd if=$@.relocate/loader.bin bs=32 conv=sync && \
|
||||
perl -e '@s = stat("$@"); print pack("N", @s[7])' && \
|
||||
cat "$@" \
|
||||
) > "$@.new"
|
||||
mv "$@.new" "$@"
|
||||
rm -rf $@.relocate
|
||||
endef
|
||||
|
||||
define Device/Default
|
||||
PROFILES = Default
|
||||
KERNEL := kernel-bin | append-dtb | gzip | uImage gzip
|
||||
@ -90,17 +52,6 @@ define Device/Default
|
||||
check-size | append-metadata
|
||||
endef
|
||||
|
||||
define Device/hpe_1920
|
||||
DEVICE_VENDOR := HPE
|
||||
IMAGE_SIZE := 29632k
|
||||
BLOCKSIZE := 64k
|
||||
H3C_PRODUCT_ID := 0x3c010501
|
||||
KERNEL := kernel-bin | append-dtb | relocate-kernel | 7z | h3c-image | h3c-vfs
|
||||
KERNEL_INITRAMFS := kernel-bin | append-dtb | relocate-kernel | 7z | h3c-image
|
||||
IMAGE/sysupgrade.bin := append-kernel | pad-to $$$$(BLOCKSIZE) | append-rootfs | \
|
||||
pad-rootfs | check-size | append-metadata
|
||||
endef
|
||||
|
||||
# "NGE" refers to the uImage magic
|
||||
define Device/netgear_nge
|
||||
KERNEL := kernel-bin | append-dtb | lzma | uImage lzma
|
||||
|
||||
@ -65,30 +65,6 @@ define Device/engenius_ews2910p
|
||||
endef
|
||||
TARGET_DEVICES += engenius_ews2910p
|
||||
|
||||
define Device/hpe_1920-8g
|
||||
$(Device/hpe_1920)
|
||||
SOC := rtl8380
|
||||
DEVICE_MODEL := 1920-8G (JG920A)
|
||||
H3C_DEVICE_ID := 0x00010023
|
||||
endef
|
||||
TARGET_DEVICES += hpe_1920-8g
|
||||
|
||||
define Device/hpe_1920-16g
|
||||
$(Device/hpe_1920)
|
||||
SOC := rtl8382
|
||||
DEVICE_MODEL := 1920-16G (JG923A)
|
||||
H3C_DEVICE_ID := 0x00010026
|
||||
endef
|
||||
TARGET_DEVICES += hpe_1920-16g
|
||||
|
||||
define Device/hpe_1920-24g
|
||||
$(Device/hpe_1920)
|
||||
SOC := rtl8382
|
||||
DEVICE_MODEL := 1920-24G (JG924A)
|
||||
H3C_DEVICE_ID := 0x00010027
|
||||
endef
|
||||
TARGET_DEVICES += hpe_1920-24g
|
||||
|
||||
define Device/inaba_aml2-17gp
|
||||
SOC := rtl8382
|
||||
IMAGE_SIZE := 13504k
|
||||
|
||||
@ -74,8 +74,6 @@ CONFIG_GPIO_PCA953X=y
|
||||
CONFIG_GPIO_PCA953X_IRQ=y
|
||||
CONFIG_GPIO_REALTEK_OTTO=y
|
||||
CONFIG_GPIO_RTL8231=y
|
||||
CONFIG_GPIO_WATCHDOG=y
|
||||
# CONFIG_GPIO_WATCHDOG_ARCH_INITCALL is not set
|
||||
CONFIG_GRO_CELLS=y
|
||||
CONFIG_HANDLE_DOMAIN_IRQ=y
|
||||
CONFIG_HARDWARE_WATCHPOINTS=y
|
||||
@ -136,7 +134,6 @@ CONFIG_MTD_SPI_NOR=y
|
||||
CONFIG_MTD_SPLIT_BRNIMAGE_FW=y
|
||||
CONFIG_MTD_SPLIT_EVA_FW=y
|
||||
CONFIG_MTD_SPLIT_FIRMWARE=y
|
||||
CONFIG_MTD_SPLIT_H3C_VFS=y
|
||||
CONFIG_MTD_SPLIT_TPLINK_FW=y
|
||||
CONFIG_MTD_SPLIT_UIMAGE_FW=y
|
||||
CONFIG_NEED_DMA_MAP_STATE=y
|
||||
|
||||
Loading…
Reference in New Issue
Block a user