ath79: add missing clock name strings in SoC dtsi

For all SoC in the ath79 target, the PLL controller provides 3 main
clocks "cpu", "ddr" and "ahb" through the input clock "ref".

Signed-off-by: Shiji Yang <yangshiji66@qq.com>
This commit is contained in:
Shiji Yang 2022-10-27 13:17:12 +08:00 committed by Hauke Mehrtens
parent 520c90854c
commit 8d4c22a956
5 changed files with 14 additions and 5 deletions

View File

@ -28,6 +28,12 @@
bootargs = "console=ttyATH0,115200";
};
ref: ref {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-output-names = "ref";
};
ahb {
apb {
ddr_ctrl: memory-controller@18000000 {
@ -83,7 +89,11 @@
compatible = "qca,ar9330-pll";
reg = <0x18050000 0x100>;
clocks = <&ref>;
clock-names = "ref";
#clock-cells = <1>;
clock-output-names = "cpu", "ddr", "ahb";
};
wdt: wdt@18060008 {

View File

@ -4,9 +4,4 @@
/ {
compatible = "qca,ar9331";
ref: ref {
compatible = "fixed-clock";
#clock-cells = <0>;
};
};

View File

@ -104,7 +104,9 @@
#clock-cells = <1>;
clock-output-names = "cpu", "ddr", "ahb";
clocks = <&extosc>;
clock-names = "ref";
};
wdt: wdt@18060008 {

View File

@ -119,6 +119,7 @@
clock-output-names = "cpu", "ddr", "ahb";
clocks = <&extosc>;
clock-names = "ref";
};
wdt: wdt@18060008 {

View File

@ -95,6 +95,7 @@
clock-output-names = "cpu", "ddr", "ahb";
clocks = <&extosc>;
clock-names = "ref";
};
wdt: wdt@18060008 {