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ipq40xx: add support for Meraki MR74
The Meraki MR74 is part of the "Insect" series. This device is essentially an outdoor variant of the MR33 with identical hardware, but requiring a config@3 DTS option to be set to allow booting with the stock u-boot. The install procedure is replicated from the MR33, with the exception being that the MR74 sysupgrade image must be used. Signed-off-by: Matthew Hagan <mnhagan88@gmail.com>
This commit is contained in:
Matthew Hagan
Christian Lamparter
parent
5f7828fcc2
commit
811538ab22
@ -29,6 +29,7 @@ ipq40xx_setup_interfaces()
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engenius,eap1300|\
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engenius,emd1|\
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meraki,mr33|\
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meraki,mr74|\
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mikrotik,lhgg-60ad|\
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mikrotik,sxtsq-5-ac|\
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netgear,ex6100v2|\
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@ -9,7 +9,8 @@ board=$(board_name)
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case "$FIRMWARE" in
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"ath10k/cal-pci-0000:01:00.0.bin")
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case "$board" in
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meraki,mr33)
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meraki,mr33 |\
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meraki,mr74)
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caldata_extract_ubi "ART" 0x9000 0x844
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caldata_valid "4408" || caldata_extract "ART" 0x9000 0x844
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ath10k_patch_mac $(macaddr_add $(get_mac_binary "/sys/bus/i2c/devices/0-0050/eeprom" 0x66) 1)
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@ -108,7 +109,8 @@ case "$FIRMWARE" in
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caldata_extract "ART" 0x1000 0x2f20
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ath10k_patch_mac $(macaddr_add "$(cat /sys/class/net/eth0/address)" 2)
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;;
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meraki,mr33)
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meraki,mr33 |\
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meraki,mr74)
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caldata_extract_ubi "ART" 0x1000 0x2f20
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caldata_valid "202f" || caldata_extract "ART" 0x1000 0x2f20
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ath10k_patch_mac $(macaddr_add $(get_mac_binary "/sys/bus/i2c/devices/0-0050/eeprom" 0x66) 2)
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@ -188,7 +190,8 @@ case "$FIRMWARE" in
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caldata_extract "ART" 0x5000 0x2f20
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ath10k_patch_mac $(macaddr_add "$(cat /sys/class/net/eth0/address)" 3)
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;;
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meraki,mr33)
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meraki,mr33 |\
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meraki,mr74)
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caldata_extract_ubi "ART" 0x5000 0x2f20
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caldata_valid "202f" || caldata_extract "ART" 0x5000 0x2f20
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ath10k_patch_mac $(macaddr_add $(get_mac_binary "/sys/bus/i2c/devices/0-0050/eeprom" 0x66) 3)
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@ -21,7 +21,8 @@ preinit_set_mac_address() {
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ip link set dev eth0 address "$base_mac"
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ip link set dev eth1 address $(macaddr_add "$base_mac" 1)
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;;
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meraki,mr33)
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meraki,mr33|\
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meraki,mr74)
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mac_lan=$(get_mac_binary "/sys/bus/i2c/devices/0-0050/eeprom" 0x66)
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[ -n "$mac_lan" ] && ip link set dev eth0 address "$mac_lan"
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;;
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@ -11,6 +11,7 @@ set_preinit_iface() {
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linksys,ea8300| \
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linksys,mr8300| \
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meraki,mr33| \
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meraki,mr74| \
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zyxel,nbg6617)
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ifname=eth0
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;;
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@ -165,7 +165,8 @@ platform_do_upgrade() {
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linksys,whw01-v1)
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platform_do_upgrade_linksys "$1"
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;;
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meraki,mr33)
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meraki,mr33 |\
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meraki,mr74)
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CI_KERNPART="part.safe"
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nand_do_upgrade "$1"
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;;
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@ -0,0 +1,407 @@
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// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Device Tree Source for Meraki "Insect" series
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*
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* Copyright (C) 2017 Chris Blake <chrisrblake93@gmail.com>
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* Copyright (C) 2017 Christian Lamparter <chunkeey@googlemail.com>
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*
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* Based on Cisco Meraki DTS from GPL release r25-linux-3.14-20170427
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without
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* any warranty of any kind, whether express or implied.
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*/
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#include "qcom-ipq4019.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/soc/qcom,tcsr.h>
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#include <dt-bindings/leds/common.h>
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/ {
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aliases {
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led-boot = &status_green;
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led-failsafe = &status_red;
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led-running = &status_green;
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led-upgrade = &power_orange;
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};
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/* Do we really need this defined? */
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memory {
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device_type = "memory";
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reg = <0x80000000 0x10000000>;
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};
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soc {
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rng@22000 {
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status = "okay";
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};
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mdio@90000 {
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status = "okay";
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pinctrl-0 = <&mdio_pins>;
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pinctrl-names = "default";
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};
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/* It is a 56-bit counter that supplies the count to the ARM arch
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timers and without upstream driver */
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counter@4a1000 {
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compatible = "qcom,qca-gcnt";
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reg = <0x4a1000 0x4>;
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};
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ess_tcsr@1953000 {
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compatible = "qcom,tcsr";
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reg = <0x1953000 0x1000>;
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qcom,ess-interface-select = <TCSR_ESS_PSGMII_RGMII5>;
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};
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tcsr@1949000 {
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compatible = "qcom,tcsr";
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reg = <0x1949000 0x100>;
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qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
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};
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tcsr@1957000 {
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compatible = "qcom,tcsr";
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reg = <0x1957000 0x100>;
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qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
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};
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serial@78b0000 {
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pinctrl-0 = <&serial_1_pins>;
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pinctrl-names = "default";
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status = "okay";
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bluetooth {
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compatible = "ti,cc2650";
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enable-gpios = <&tlmm 12 GPIO_ACTIVE_LOW>;
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};
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};
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crypto@8e3a000 {
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status = "okay";
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};
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watchdog@b017000 {
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status = "okay";
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};
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ess-switch@c000000 {
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switch_mac_mode = <0x3>; /* mac mode for RGMII RMII */
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switch_lan_bmp = <0x0>; /* lan port bitmap */
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switch_wan_bmp = <0x10>; /* wan port bitmap */
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};
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edma@c080000 {
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qcom,single-phy;
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qcom,num_gmac = <1>;
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phy-mode = "rgmii-rxid";
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status = "okay";
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};
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};
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keys {
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compatible = "gpio-keys";
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reset {
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label = "reset";
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gpios = <&tlmm 18 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_RESTART>;
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};
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};
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leds {
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compatible = "gpio-leds";
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power_orange: power {
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label = "orange:power";
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gpios = <&tlmm 49 GPIO_ACTIVE_LOW>;
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panic-indicator;
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};
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};
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};
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&blsp_dma {
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status = "okay";
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};
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&blsp1_uart1 {
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pinctrl-0 = <&serial_0_pins>;
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pinctrl-names = "default";
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status = "okay";
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};
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&cryptobam {
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status = "okay";
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};
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&gmac0 {
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qcom,phy_mdio_addr = <1>;
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qcom,poll_required = <1>;
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vlan_tag = <0 0x20>;
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};
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&blsp1_i2c3 {
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pinctrl-0 = <&i2c_0_pins>;
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pinctrl-names = "default";
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status = "okay";
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at24@50 {
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compatible = "atmel,24c64";
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pagesize = <32>;
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reg = <0x50>;
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read-only; /* This holds our MAC & Meraki board-data */
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};
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};
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&blsp1_i2c4 {
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pinctrl-0 = <&i2c_1_pins>;
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pinctrl-names = "default";
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status = "okay";
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tricolor: led-controller@30 {
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compatible = "ti,lp5562";
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reg = <0x30>;
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clock-mode = /bits/8 <2>;
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#address-cells = <1>;
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#size-cells = <0>;
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/* RGB led */
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status_red: chan@0 {
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chan-name = "red:status";
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led-cur = /bits/ 8 <0x20>;
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max-cur = /bits/ 8 <0x60>;
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reg = <0>;
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color = <LED_COLOR_ID_RED>;
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};
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status_green: chan@1 {
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chan-name = "green:status";
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led-cur = /bits/ 8 <0x20>;
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max-cur = /bits/ 8 <0x60>;
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reg = <1>;
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color = <LED_COLOR_ID_GREEN>;
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};
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chan@2 {
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chan-name = "blue:status";
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led-cur = /bits/ 8 <0x20>;
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max-cur = /bits/ 8 <0x60>;
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reg = <2>;
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color = <LED_COLOR_ID_BLUE>;
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};
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chan@3 {
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chan-name = "white:status";
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led-cur = /bits/ 8 <0x20>;
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max-cur = /bits/ 8 <0x60>;
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reg = <3>;
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color = <LED_COLOR_ID_WHITE>;
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};
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};
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};
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&nand {
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pinctrl-0 = <&nand_pins>;
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pinctrl-names = "default";
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status = "okay";
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nand@0 {
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "sbl1";
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reg = <0x00000000 0x00100000>;
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read-only;
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};
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partition@100000 {
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label = "mibib";
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reg = <0x00100000 0x00100000>;
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read-only;
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};
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partition@200000 {
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label = "bootconfig";
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reg = <0x00200000 0x00100000>;
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read-only;
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};
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partition@300000 {
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label = "qsee";
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reg = <0x00300000 0x00100000>;
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read-only;
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};
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partition@400000 {
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label = "qsee_alt";
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reg = <0x00400000 0x00100000>;
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read-only;
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};
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partition@500000 {
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label = "cdt";
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reg = <0x00500000 0x00080000>;
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read-only;
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};
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partition@580000 {
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label = "cdt_alt";
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reg = <0x00580000 0x00080000>;
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read-only;
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};
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partition@600000 {
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label = "ddrparams";
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reg = <0x00600000 0x00080000>;
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read-only;
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};
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partition@700000 {
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label = "u-boot";
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reg = <0x00700000 0x00200000>;
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read-only;
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};
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partition@900000 {
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label = "u-boot-backup";
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reg = <0x00900000 0x00200000>;
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read-only;
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};
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partition@b00000 {
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label = "ART";
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reg = <0x00b00000 0x00080000>;
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read-only;
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};
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partition@c00000 {
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label = "ubi";
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reg = <0x00c00000 0x07000000>;
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/*
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* Do not try to allocate the remaining
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* 4 MiB to this ubi partition. It will
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* confuse the u-boot and it might not
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* find the kernel partition anymore.
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*/
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};
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};
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};
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};
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&pcie0 {
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status = "okay";
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perst-gpio = <&tlmm 38 GPIO_ACTIVE_LOW>;
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wake-gpio = <&tlmm 50 GPIO_ACTIVE_LOW>;
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bridge@0,0 {
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reg = <0x00000000 0 0 0 0>;
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#address-cells = <3>;
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#size-cells = <2>;
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ranges;
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wifi2: wifi@1,0 {
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compatible = "qcom,ath10k";
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status = "okay";
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reg = <0x00010000 0 0 0 0>;
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};
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};
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};
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&qpic_bam {
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status = "okay";
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};
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&tlmm {
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/*
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* GPIO43 should be 0/1 whenever the unit is
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* powered through PoE or AC-Adapter.
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* That said, playing with this seems to
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* reset the AP.
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*/
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mdio_pins: mdio_pinmux {
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mux_1 {
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pins = "gpio6";
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function = "mdio";
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bias-pull-up;
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};
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mux_2 {
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pins = "gpio7";
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function = "mdc";
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bias-pull-up;
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};
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};
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serial_0_pins: serial_pinmux {
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mux {
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pins = "gpio16", "gpio17";
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function = "blsp_uart0";
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bias-disable;
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};
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};
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serial_1_pins: serial1_pinmux {
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mux {
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/* We use the i2c-0 pins for serial_1 */
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pins = "gpio8", "gpio9";
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function = "blsp_uart1";
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bias-disable;
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};
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};
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i2c_0_pins: i2c_0_pinmux {
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pinmux {
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function = "blsp_i2c0";
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pins = "gpio20", "gpio21";
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};
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pinconf {
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pins = "gpio20", "gpio21";
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drive-strength = <16>;
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bias-disable;
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};
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};
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i2c_1_pins: i2c_1_pinmux {
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pinmux {
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function = "blsp_i2c1";
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pins = "gpio34", "gpio35";
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};
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pinconf {
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pins = "gpio34", "gpio35";
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drive-strength = <16>;
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bias-disable;
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};
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};
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nand_pins: nand_pins {
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/*
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* There are 18 pins. 15 pins are common between LCD and NAND.
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* The QPIC controller arbitrates between LCD and NAND. Of the
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* remaining 4, 2 are for NAND and 2 are for LCD exclusively.
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*
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* The meraki source hints that the bluetooth module claims
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* pin 52 as well. But sadly, there's no data whenever this
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* is a NAND or LCD exclusive pin or not.
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*/
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pullups {
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pins = "gpio52", "gpio53", "gpio58",
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"gpio59";
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function = "qpic";
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bias-pull-up;
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};
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pulldowns {
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pins = "gpio54", "gpio55", "gpio56",
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"gpio57", "gpio60", "gpio61",
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"gpio62", "gpio63", "gpio64",
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"gpio65", "gpio66", "gpio67",
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"gpio68", "gpio69";
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function = "qpic";
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bias-pull-down;
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};
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};
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};
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&wifi0 {
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status = "okay";
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qcom,ath10k-calibration-variant = "Meraki-MR33";
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};
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&wifi1 {
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status = "okay";
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qcom,ath10k-calibration-variant = "Meraki-MR33";
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};
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@ -1,411 +1,13 @@
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// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Device Tree Source for Meraki MR33 (Stinkbug)
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*
|
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* Copyright (C) 2017 Chris Blake <chrisrblake93@gmail.com>
|
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* Copyright (C) 2017 Christian Lamparter <chunkeey@googlemail.com>
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*
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* Based on Cisco Meraki DTS from GPL release r25-linux-3.14-20170427
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*
|
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* This file is licensed under the terms of the GNU General Public
|
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* License version 2. This program is licensed "as is" without
|
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* any warranty of any kind, whether express or implied.
|
||||
*/
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// Device Tree Source for Meraki MR33 (Stinkbug)
|
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|
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#include "qcom-ipq4019.dtsi"
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#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/input/input.h>
|
||||
#include <dt-bindings/soc/qcom,tcsr.h>
|
||||
#include <dt-bindings/leds/common.h>
|
||||
#include "qcom-ipq4029-insect-common.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Meraki MR33 Access Point";
|
||||
compatible = "meraki,mr33";
|
||||
|
||||
aliases {
|
||||
led-boot = &status_green;
|
||||
led-failsafe = &status_red;
|
||||
led-running = &status_green;
|
||||
led-upgrade = &power_orange;
|
||||
};
|
||||
|
||||
/* Do we really need this defined? */
|
||||
memory {
|
||||
device_type = "memory";
|
||||
reg = <0x80000000 0x10000000>;
|
||||
};
|
||||
|
||||
soc {
|
||||
rng@22000 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
mdio@90000 {
|
||||
status = "okay";
|
||||
pinctrl-0 = <&mdio_pins>;
|
||||
pinctrl-names = "default";
|
||||
};
|
||||
|
||||
/* It is a 56-bit counter that supplies the count to the ARM arch
|
||||
timers and without upstream driver */
|
||||
counter@4a1000 {
|
||||
compatible = "qcom,qca-gcnt";
|
||||
reg = <0x4a1000 0x4>;
|
||||
};
|
||||
|
||||
ess_tcsr@1953000 {
|
||||
compatible = "qcom,tcsr";
|
||||
reg = <0x1953000 0x1000>;
|
||||
qcom,ess-interface-select = <TCSR_ESS_PSGMII_RGMII5>;
|
||||
};
|
||||
|
||||
tcsr@1949000 {
|
||||
compatible = "qcom,tcsr";
|
||||
reg = <0x1949000 0x100>;
|
||||
qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
|
||||
};
|
||||
|
||||
tcsr@1957000 {
|
||||
compatible = "qcom,tcsr";
|
||||
reg = <0x1957000 0x100>;
|
||||
qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
|
||||
};
|
||||
|
||||
serial@78b0000 {
|
||||
pinctrl-0 = <&serial_1_pins>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
|
||||
bluetooth {
|
||||
compatible = "ti,cc2650";
|
||||
enable-gpios = <&tlmm 12 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
};
|
||||
|
||||
crypto@8e3a000 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
watchdog@b017000 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
ess-switch@c000000 {
|
||||
switch_mac_mode = <0x3>; /* mac mode for RGMII RMII */
|
||||
switch_lan_bmp = <0x0>; /* lan port bitmap */
|
||||
switch_wan_bmp = <0x10>; /* wan port bitmap */
|
||||
};
|
||||
|
||||
edma@c080000 {
|
||||
qcom,single-phy;
|
||||
qcom,num_gmac = <1>;
|
||||
phy-mode = "rgmii-rxid";
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
keys {
|
||||
compatible = "gpio-keys";
|
||||
|
||||
reset {
|
||||
label = "reset";
|
||||
gpios = <&tlmm 18 GPIO_ACTIVE_LOW>;
|
||||
linux,code = <KEY_RESTART>;
|
||||
};
|
||||
};
|
||||
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
|
||||
power_orange: power {
|
||||
label = "orange:power";
|
||||
gpios = <&tlmm 49 GPIO_ACTIVE_LOW>;
|
||||
panic-indicator;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&blsp_dma {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&blsp1_uart1 {
|
||||
pinctrl-0 = <&serial_0_pins>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&cryptobam {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&gmac0 {
|
||||
qcom,phy_mdio_addr = <1>;
|
||||
qcom,poll_required = <1>;
|
||||
vlan_tag = <0 0x20>;
|
||||
};
|
||||
|
||||
&blsp1_i2c3 {
|
||||
pinctrl-0 = <&i2c_0_pins>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
at24@50 {
|
||||
compatible = "atmel,24c64";
|
||||
pagesize = <32>;
|
||||
reg = <0x50>;
|
||||
read-only; /* This holds our MAC & Meraki board-data */
|
||||
};
|
||||
};
|
||||
|
||||
&blsp1_i2c4 {
|
||||
pinctrl-0 = <&i2c_1_pins>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
|
||||
led-controller@30 {
|
||||
compatible = "ti,lp5562";
|
||||
reg = <0x30>;
|
||||
clock-mode = /bits/8 <2>;
|
||||
enable-gpio = <&tlmm 48 GPIO_ACTIVE_HIGH>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
/* RGB led */
|
||||
status_red: chan@0 {
|
||||
chan-name = "red:status";
|
||||
led-cur = /bits/ 8 <0x20>;
|
||||
max-cur = /bits/ 8 <0x60>;
|
||||
reg = <0>;
|
||||
color = <LED_COLOR_ID_RED>;
|
||||
};
|
||||
|
||||
status_green: chan@1 {
|
||||
chan-name = "green:status";
|
||||
led-cur = /bits/ 8 <0x20>;
|
||||
max-cur = /bits/ 8 <0x60>;
|
||||
reg = <1>;
|
||||
color = <LED_COLOR_ID_GREEN>;
|
||||
};
|
||||
|
||||
chan@2 {
|
||||
chan-name = "blue:status";
|
||||
led-cur = /bits/ 8 <0x20>;
|
||||
max-cur = /bits/ 8 <0x60>;
|
||||
reg = <2>;
|
||||
color = <LED_COLOR_ID_BLUE>;
|
||||
};
|
||||
|
||||
chan@3 {
|
||||
chan-name = "white:status";
|
||||
led-cur = /bits/ 8 <0x20>;
|
||||
max-cur = /bits/ 8 <0x60>;
|
||||
reg = <3>;
|
||||
color = <LED_COLOR_ID_WHITE>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&nand {
|
||||
pinctrl-0 = <&nand_pins>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
|
||||
nand@0 {
|
||||
partitions {
|
||||
compatible = "fixed-partitions";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
partition@0 {
|
||||
label = "sbl1";
|
||||
reg = <0x00000000 0x00100000>;
|
||||
read-only;
|
||||
};
|
||||
partition@100000 {
|
||||
label = "mibib";
|
||||
reg = <0x00100000 0x00100000>;
|
||||
read-only;
|
||||
};
|
||||
partition@200000 {
|
||||
label = "bootconfig";
|
||||
reg = <0x00200000 0x00100000>;
|
||||
read-only;
|
||||
};
|
||||
partition@300000 {
|
||||
label = "qsee";
|
||||
reg = <0x00300000 0x00100000>;
|
||||
read-only;
|
||||
};
|
||||
partition@400000 {
|
||||
label = "qsee_alt";
|
||||
reg = <0x00400000 0x00100000>;
|
||||
read-only;
|
||||
};
|
||||
partition@500000 {
|
||||
label = "cdt";
|
||||
reg = <0x00500000 0x00080000>;
|
||||
read-only;
|
||||
};
|
||||
partition@580000 {
|
||||
label = "cdt_alt";
|
||||
reg = <0x00580000 0x00080000>;
|
||||
read-only;
|
||||
};
|
||||
partition@600000 {
|
||||
label = "ddrparams";
|
||||
reg = <0x00600000 0x00080000>;
|
||||
read-only;
|
||||
};
|
||||
partition@700000 {
|
||||
label = "u-boot";
|
||||
reg = <0x00700000 0x00200000>;
|
||||
read-only;
|
||||
};
|
||||
partition@900000 {
|
||||
label = "u-boot-backup";
|
||||
reg = <0x00900000 0x00200000>;
|
||||
read-only;
|
||||
};
|
||||
partition@b00000 {
|
||||
label = "ART";
|
||||
reg = <0x00b00000 0x00080000>;
|
||||
read-only;
|
||||
};
|
||||
partition@c00000 {
|
||||
label = "ubi";
|
||||
reg = <0x00c00000 0x07000000>;
|
||||
/*
|
||||
* Do not try to allocate the remaining
|
||||
* 4 MiB to this ubi partition. It will
|
||||
* confuse the u-boot and it might not
|
||||
* find the kernel partition anymore.
|
||||
*/
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&pcie0 {
|
||||
status = "okay";
|
||||
perst-gpio = <&tlmm 38 GPIO_ACTIVE_LOW>;
|
||||
wake-gpio = <&tlmm 50 GPIO_ACTIVE_LOW>;
|
||||
|
||||
bridge@0,0 {
|
||||
reg = <0x00000000 0 0 0 0>;
|
||||
#address-cells = <3>;
|
||||
#size-cells = <2>;
|
||||
ranges;
|
||||
|
||||
wifi2: wifi@1,0 {
|
||||
compatible = "qcom,ath10k";
|
||||
status = "okay";
|
||||
reg = <0x00010000 0 0 0 0>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&qpic_bam {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&tlmm {
|
||||
/*
|
||||
* GPIO43 should be 0/1 whenever the unit is
|
||||
* powered through PoE or AC-Adapter.
|
||||
* That said, playing with this seems to
|
||||
* reset the AP.
|
||||
*/
|
||||
|
||||
mdio_pins: mdio_pinmux {
|
||||
mux_1 {
|
||||
pins = "gpio6";
|
||||
function = "mdio";
|
||||
bias-pull-up;
|
||||
};
|
||||
mux_2 {
|
||||
pins = "gpio7";
|
||||
function = "mdc";
|
||||
bias-pull-up;
|
||||
};
|
||||
};
|
||||
|
||||
serial_0_pins: serial_pinmux {
|
||||
mux {
|
||||
pins = "gpio16", "gpio17";
|
||||
function = "blsp_uart0";
|
||||
bias-disable;
|
||||
};
|
||||
};
|
||||
|
||||
serial_1_pins: serial1_pinmux {
|
||||
mux {
|
||||
/* We use the i2c-0 pins for serial_1 */
|
||||
pins = "gpio8", "gpio9";
|
||||
function = "blsp_uart1";
|
||||
bias-disable;
|
||||
};
|
||||
};
|
||||
|
||||
i2c_0_pins: i2c_0_pinmux {
|
||||
pinmux {
|
||||
function = "blsp_i2c0";
|
||||
pins = "gpio20", "gpio21";
|
||||
};
|
||||
pinconf {
|
||||
pins = "gpio20", "gpio21";
|
||||
drive-strength = <16>;
|
||||
bias-disable;
|
||||
};
|
||||
};
|
||||
|
||||
i2c_1_pins: i2c_1_pinmux {
|
||||
pinmux {
|
||||
function = "blsp_i2c1";
|
||||
pins = "gpio34", "gpio35";
|
||||
};
|
||||
pinconf {
|
||||
pins = "gpio34", "gpio35";
|
||||
drive-strength = <16>;
|
||||
bias-disable;
|
||||
};
|
||||
};
|
||||
|
||||
nand_pins: nand_pins {
|
||||
/*
|
||||
* There are 18 pins. 15 pins are common between LCD and NAND.
|
||||
* The QPIC controller arbitrates between LCD and NAND. Of the
|
||||
* remaining 4, 2 are for NAND and 2 are for LCD exclusively.
|
||||
*
|
||||
* The meraki source hints that the bluetooth module claims
|
||||
* pin 52 as well. But sadly, there's no data whenever this
|
||||
* is a NAND or LCD exclusive pin or not.
|
||||
*/
|
||||
|
||||
pullups {
|
||||
pins = "gpio52", "gpio53", "gpio58",
|
||||
"gpio59";
|
||||
function = "qpic";
|
||||
bias-pull-up;
|
||||
};
|
||||
|
||||
pulldowns {
|
||||
pins = "gpio54", "gpio55", "gpio56",
|
||||
"gpio57", "gpio60", "gpio61",
|
||||
"gpio62", "gpio63", "gpio64",
|
||||
"gpio65", "gpio66", "gpio67",
|
||||
"gpio68", "gpio69";
|
||||
function = "qpic";
|
||||
bias-pull-down;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&wifi0 {
|
||||
status = "okay";
|
||||
qcom,ath10k-calibration-variant = "Meraki-MR33";
|
||||
};
|
||||
|
||||
&wifi1 {
|
||||
status = "okay";
|
||||
qcom,ath10k-calibration-variant = "Meraki-MR33";
|
||||
&tricolor {
|
||||
enable-gpio = <&tlmm 48 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
@ -0,0 +1,13 @@
|
||||
// SPDX-License-Identifier: GPL-2.0-only
|
||||
// Device Tree Source for Meraki MR74 (Ladybug)
|
||||
|
||||
#include "qcom-ipq4029-insect-common.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Meraki MR74 Access Point";
|
||||
compatible = "meraki,mr74";
|
||||
};
|
||||
|
||||
&tricolor {
|
||||
enable-gpio = <&tlmm 14 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
@ -704,6 +704,18 @@ define Device/meraki_mr33
|
||||
endef
|
||||
TARGET_DEVICES += meraki_mr33
|
||||
|
||||
define Device/meraki_mr74
|
||||
$(call Device/FitImage)
|
||||
DEVICE_VENDOR := Cisco Meraki
|
||||
DEVICE_MODEL := MR74
|
||||
SOC := qcom-ipq4029
|
||||
BLOCKSIZE := 128k
|
||||
PAGESIZE := 2048
|
||||
DEVICE_PACKAGES := -swconfig ath10k-firmware-qca9887-ct
|
||||
DEVICE_DTS_CONFIG := config@3
|
||||
endef
|
||||
TARGET_DEVICES += meraki_mr74
|
||||
|
||||
define Device/mobipromo_cm520-79f
|
||||
$(call Device/FitzImage)
|
||||
$(call Device/UbiFit)
|
||||
|
||||
@ -10,7 +10,7 @@ Signed-off-by: John Crispin <john@phrozen.org>
|
||||
|
||||
--- a/arch/arm/boot/dts/Makefile
|
||||
+++ b/arch/arm/boot/dts/Makefile
|
||||
@@ -903,11 +903,77 @@ dtb-$(CONFIG_ARCH_QCOM) += \
|
||||
@@ -903,11 +903,78 @@ dtb-$(CONFIG_ARCH_QCOM) += \
|
||||
qcom-apq8074-dragonboard.dtb \
|
||||
qcom-apq8084-ifc6540.dtb \
|
||||
qcom-apq8084-mtp.dtb \
|
||||
@ -85,6 +85,7 @@ Signed-off-by: John Crispin <john@phrozen.org>
|
||||
+ qcom-ipq4019-gl-b2200.dtb \
|
||||
+ qcom-ipq4029-gl-s1300.dtb \
|
||||
+ qcom-ipq4029-mr33.dtb \
|
||||
+ qcom-ipq4029-mr74.dtb \
|
||||
qcom-ipq8064-ap148.dtb \
|
||||
qcom-ipq8064-rb3011.dtb \
|
||||
qcom-msm8660-surf.dtb \
|
||||
|
||||
@ -10,7 +10,7 @@ Signed-off-by: John Crispin <john@phrozen.org>
|
||||
|
||||
--- a/arch/arm/boot/dts/Makefile
|
||||
+++ b/arch/arm/boot/dts/Makefile
|
||||
@@ -951,11 +951,76 @@ dtb-$(CONFIG_ARCH_QCOM) += \
|
||||
@@ -951,11 +951,77 @@ dtb-$(CONFIG_ARCH_QCOM) += \
|
||||
qcom-ipq4018-ap120c-ac.dtb \
|
||||
qcom-ipq4018-ap120c-ac-bit.dtb \
|
||||
qcom-ipq4018-jalapeno.dtb \
|
||||
@ -84,6 +84,7 @@ Signed-off-by: John Crispin <john@phrozen.org>
|
||||
+ qcom-ipq4019-gl-b2200.dtb \
|
||||
+ qcom-ipq4029-gl-s1300.dtb \
|
||||
+ qcom-ipq4029-mr33.dtb \
|
||||
+ qcom-ipq4029-mr74.dtb \
|
||||
qcom-ipq8064-ap148.dtb \
|
||||
qcom-ipq8064-rb3011.dtb \
|
||||
qcom-msm8226-samsung-s3ve3g.dtb \
|
||||
|
||||
Loading…
Reference in New Issue
Block a user