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kernel: bump 5.4 to 5.4.60

Browse Source 
Deleted upstream patches:
  generic:
    041-genirq-affinity-Make-affinity-setting-if-activated-o.patch
  ipq806x:
    093-5-v5.8-ipq806x-PCI-qcom-Define-some-PARF-params-needed-for-ipq8064-SoC.patch
    093-6-v5.8-ipq806x-PCI-qcom-Add-support-for-tx-term-offset-for-rev-2_1_0.patch

Merged manually:
  ipq806x:
    093-4-v5.8-ipq806x-PCI-qcom-Use-bulk-clk-api-and-assert-on-error.patch
  layerscape:
    804-crypto-0016-MLKU-114-1-crypto-caam-reduce-page-0-regs-access-to-.patch

Build-tested: ath79/generic, ipq806x, layerscape/armv7, layerscape/armv8_64b
Run-tested: ipq806x (R7800)

Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
This commit is contained in:
Adrian Schmutzler 2020-08-21 18:16:42 +02:00
parent bf96eb55c8
commit 36aa27189a
28 changed files with 134 additions and 385 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
include/kernel-version.mk
View File

@ -8,11 +8,11 @@ endif
LINUX_VERSION-4.14 = .193
LINUX_VERSION-4.19 = .138
LINUX_VERSION-5.4 = .59
LINUX_VERSION-5.4 = .60
LINUX_KERNEL_HASH-4.14.193 = 0b0fb41d4430e1a42738b341cbfd2f41951aa5cd02acabbd53f076119c8b9f03
LINUX_KERNEL_HASH-4.19.138 = d15c27d05f6c527269b75b30cc72972748e55720e7e00ad8abbaa4fe3b1d5e02
LINUX_KERNEL_HASH-5.4.59 = 9bcb9db2e4435f2e5948375862baf0973f1d7860ebe3d750383e5a6deac4b2fd
LINUX_KERNEL_HASH-5.4.60 = add2ab2385c40fc9a3dfebe403e56da8500b633dc7dc42cf0c670c61d151a223
remove_uri_prefix=$(subst git://,,$(subst http://,,$(subst https://,,$(1))))
sanitize_uri=$(call qstrip,$(subst @,_,$(subst :,_,$(subst .,_,$(subst -,_,$(subst /,_,$(1)))))))

4
target/linux/bcm27xx/patches-5.4/950-0018-Register-the-clocks-early-during-the-boot-process-so.patch
View File

@ -13,7 +13,7 @@ Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
--- a/drivers/clk/bcm/clk-bcm2835.c
+++ b/drivers/clk/bcm/clk-bcm2835.c
@@ -2248,8 +2248,15 @@ static int bcm2835_clk_probe(struct plat
@@ -2265,8 +2265,15 @@ static int bcm2835_clk_probe(struct plat
if (ret)
return ret;
@ -30,7 +30,7 @@ Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
}
static const struct cprman_plat_data cprman_bcm2835_plat_data = {
@@ -2275,7 +2282,11 @@ static struct platform_driver bcm2835_cl
@@ -2292,7 +2299,11 @@ static struct platform_driver bcm2835_cl
.probe = bcm2835_clk_probe,
};

2
target/linux/bcm27xx/patches-5.4/950-0020-clk-bcm2835-Mark-used-PLLs-and-dividers-CRITICAL.patch
View File

@ -14,7 +14,7 @@ Signed-off-by: Phil Elwell <phil@raspberrypi.org>
--- a/drivers/clk/bcm/clk-bcm2835.c
+++ b/drivers/clk/bcm/clk-bcm2835.c
@@ -1363,6 +1363,11 @@ bcm2835_register_pll_divider(struct bcm2
@@ -1379,6 +1379,11 @@ bcm2835_register_pll_divider(struct bcm2
divider->div.hw.init = &init;
divider->div.table = NULL;

14
target/linux/bcm27xx/patches-5.4/950-0021-clk-bcm2835-Add-claim-clocks-property.patch
View File

@ -17,7 +17,7 @@ Signed-off-by: Phil Elwell <phil@raspberrypi.org>
--- a/drivers/clk/bcm/clk-bcm2835.c
+++ b/drivers/clk/bcm/clk-bcm2835.c
@@ -1295,6 +1295,8 @@ static const struct clk_ops bcm2835_vpu_
@@ -1311,6 +1311,8 @@ static const struct clk_ops bcm2835_vpu_
.debug_init = bcm2835_clock_debug_init,
};
@ -26,7 +26,7 @@ Signed-off-by: Phil Elwell <phil@raspberrypi.org>
static struct clk_hw *bcm2835_register_pll(struct bcm2835_cprman *cprman,
const struct bcm2835_pll_data *data)
{
@@ -1311,6 +1313,9 @@ static struct clk_hw *bcm2835_register_p
@@ -1327,6 +1329,9 @@ static struct clk_hw *bcm2835_register_p
init.ops = &bcm2835_pll_clk_ops;
init.flags = CLK_IGNORE_UNUSED;
@ -36,7 +36,7 @@ Signed-off-by: Phil Elwell <phil@raspberrypi.org>
pll = kzalloc(sizeof(*pll), GFP_KERNEL);
if (!pll)
return NULL;
@@ -1364,8 +1369,10 @@ bcm2835_register_pll_divider(struct bcm2
@@ -1380,8 +1385,10 @@ bcm2835_register_pll_divider(struct bcm2
divider->div.table = NULL;
if (!(cprman_read(cprman, data->cm_reg) & data->hold_mask)) {
@ -49,7 +49,7 @@ Signed-off-by: Phil Elwell <phil@raspberrypi.org>
}
divider->cprman = cprman;
@@ -2173,6 +2180,8 @@ static const struct bcm2835_clk_desc clk
@@ -2189,6 +2196,8 @@ static const struct bcm2835_clk_desc clk
.ctl_reg = CM_PERIICTL),
};
@ -58,7 +58,7 @@ Signed-off-by: Phil Elwell <phil@raspberrypi.org>
/*
* Permanently take a reference on the parent of the SDRAM clock.
*
@@ -2192,6 +2201,19 @@ static int bcm2835_mark_sdc_parent_criti
@@ -2208,6 +2217,19 @@ static int bcm2835_mark_sdc_parent_criti
return clk_prepare_enable(parent);
}
@ -78,7 +78,7 @@ Signed-off-by: Phil Elwell <phil@raspberrypi.org>
static int bcm2835_clk_probe(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
@@ -2202,6 +2224,7 @@ static int bcm2835_clk_probe(struct plat
@@ -2218,6 +2240,7 @@ static int bcm2835_clk_probe(struct plat
const size_t asize = ARRAY_SIZE(clk_desc_array);
const struct cprman_plat_data *pdata;
size_t i;
@ -86,7 +86,7 @@ Signed-off-by: Phil Elwell <phil@raspberrypi.org>
int ret;
pdata = of_device_get_match_data(&pdev->dev);
@@ -2221,6 +2244,13 @@ static int bcm2835_clk_probe(struct plat
@@ -2237,6 +2260,13 @@ static int bcm2835_clk_probe(struct plat
if (IS_ERR(cprman->regs))
return PTR_ERR(cprman->regs);

10
target/linux/bcm27xx/patches-5.4/950-0022-clk-bcm2835-Read-max-core-clock-from-firmware.patch
View File

@ -48,9 +48,9 @@ Signed-off-by: Phil Elwell <phil@raspberrypi.org>
void __iomem *regs;
+ struct rpi_firmware *fw;
spinlock_t regs_lock; /* spinlock for all clocks */
unsigned int soc;
/*
@@ -999,6 +1003,30 @@ static unsigned long bcm2835_clock_get_r
@@ -1015,6 +1019,30 @@ static unsigned long bcm2835_clock_get_r
return bcm2835_clock_rate_from_divisor(clock, parent_rate, div);
}
@ -81,7 +81,7 @@ Signed-off-by: Phil Elwell <phil@raspberrypi.org>
static void bcm2835_clock_wait_busy(struct bcm2835_clock *clock)
{
struct bcm2835_cprman *cprman = clock->cprman;
@@ -1287,7 +1315,7 @@ static int bcm2835_vpu_clock_is_on(struc
@@ -1303,7 +1331,7 @@ static int bcm2835_vpu_clock_is_on(struc
*/
static const struct clk_ops bcm2835_vpu_clock_clk_ops = {
.is_prepared = bcm2835_vpu_clock_is_on,
@ -90,7 +90,7 @@ Signed-off-by: Phil Elwell <phil@raspberrypi.org>
.set_rate = bcm2835_clock_set_rate,
.determine_rate = bcm2835_clock_determine_rate,
.set_parent = bcm2835_clock_set_parent,
@@ -2223,6 +2251,7 @@ static int bcm2835_clk_probe(struct plat
@@ -2239,6 +2267,7 @@ static int bcm2835_clk_probe(struct plat
const struct bcm2835_clk_desc *desc;
const size_t asize = ARRAY_SIZE(clk_desc_array);
const struct cprman_plat_data *pdata;
@ -98,7 +98,7 @@ Signed-off-by: Phil Elwell <phil@raspberrypi.org>
size_t i;
u32 clk_id;
int ret;
@@ -2244,6 +2273,14 @@ static int bcm2835_clk_probe(struct plat
@@ -2260,6 +2289,14 @@ static int bcm2835_clk_probe(struct plat
if (IS_ERR(cprman->regs))
return PTR_ERR(cprman->regs);

2
target/linux/bcm27xx/patches-5.4/950-0023-clk-bcm2835-Mark-GPIO-clocks-enabled-at-boot-as-crit.patch
View File

@ -20,7 +20,7 @@ Signed-off-by: Eric Anholt <eric@anholt.net>
--- a/drivers/clk/bcm/clk-bcm2835.c
+++ b/drivers/clk/bcm/clk-bcm2835.c
@@ -1455,6 +1455,15 @@ static struct clk_hw *bcm2835_register_c
@@ -1471,6 +1471,15 @@ static struct clk_hw *bcm2835_register_c
init.flags = data->flags | CLK_IGNORE_UNUSED;
/*

2
target/linux/bcm27xx/patches-5.4/950-0179-clk-clk-bcm2835-Use-zd-when-printing-size_t.patch
View File

@ -13,7 +13,7 @@ Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.org>
--- a/drivers/clk/bcm/clk-bcm2835.c
+++ b/drivers/clk/bcm/clk-bcm2835.c
@@ -2335,7 +2335,7 @@ static int bcm2835_clk_probe(struct plat
@@ -2352,7 +2352,7 @@ static int bcm2835_clk_probe(struct plat
return ret;
/* note that we have registered all the clocks */

2
target/linux/bcm27xx/patches-5.4/950-0216-clk-bcm2835-Don-t-wait-for-pllh-lock.patch
View File

@ -10,7 +10,7 @@ Signed-off-by: Phil Elwell <phil@raspberrypi.org>
--- a/drivers/clk/bcm/clk-bcm2835.c
+++ b/drivers/clk/bcm/clk-bcm2835.c
@@ -628,15 +628,17 @@ static int bcm2835_pll_on(struct clk_hw
@@ -643,15 +643,17 @@ static int bcm2835_pll_on(struct clk_hw
spin_unlock(&cprman->regs_lock);
/* Wait for the PLL to lock. */

4
target/linux/bcm27xx/patches-5.4/950-0219-clk-bcm2835-Add-support-for-setting-leaf-clock-rates.patch
View File

@ -14,7 +14,7 @@ Signed-off-by: Eric Anholt <eric@anholt.net>
--- a/drivers/clk/bcm/clk-bcm2835.c
+++ b/drivers/clk/bcm/clk-bcm2835.c
@@ -1098,15 +1098,19 @@ static int bcm2835_clock_set_rate(struct
@@ -1114,15 +1114,19 @@ static int bcm2835_clock_set_rate(struct
spin_lock(&cprman->regs_lock);
@ -42,7 +42,7 @@ Signed-off-by: Eric Anholt <eric@anholt.net>
ctl |= (div & CM_DIV_FRAC_MASK) ? CM_FRAC : 0;
cprman_write(cprman, data->ctl_reg, ctl);
@@ -1476,7 +1480,7 @@ static struct clk_hw *bcm2835_register_c
@@ -1492,7 +1496,7 @@ static struct clk_hw *bcm2835_register_c
init.ops = &bcm2835_vpu_clock_clk_ops;
} else {
init.ops = &bcm2835_clock_clk_ops;

10
target/linux/bcm27xx/patches-5.4/950-0220-clk-bcm2835-Allow-reparenting-leaf-clocks-while-they.patch
View File

@ -15,7 +15,7 @@ Signed-off-by: Eric Anholt <eric@anholt.net>
--- a/drivers/clk/bcm/clk-bcm2835.c
+++ b/drivers/clk/bcm/clk-bcm2835.c
@@ -1087,8 +1087,10 @@ static int bcm2835_clock_on(struct clk_h
@@ -1103,8 +1103,10 @@ static int bcm2835_clock_on(struct clk_h
return 0;
}
@ -28,7 +28,7 @@ Signed-off-by: Eric Anholt <eric@anholt.net>
{
struct bcm2835_clock *clock = bcm2835_clock_from_hw(hw);
struct bcm2835_cprman *cprman = clock->cprman;
@@ -1110,6 +1112,11 @@ static int bcm2835_clock_set_rate(struct
@@ -1126,6 +1128,11 @@ static int bcm2835_clock_set_rate(struct
bcm2835_clock_wait_busy(clock);
}
@ -40,7 +40,7 @@ Signed-off-by: Eric Anholt <eric@anholt.net>
ctl &= ~CM_FRAC;
ctl |= (div & CM_DIV_FRAC_MASK) ? CM_FRAC : 0;
cprman_write(cprman, data->ctl_reg, ctl);
@@ -1121,6 +1128,12 @@ static int bcm2835_clock_set_rate(struct
@@ -1137,6 +1144,12 @@ static int bcm2835_clock_set_rate(struct
return 0;
}
@ -53,7 +53,7 @@ Signed-off-by: Eric Anholt <eric@anholt.net>
static bool
bcm2835_clk_is_pllc(struct clk_hw *hw)
{
@@ -1304,6 +1317,7 @@ static const struct clk_ops bcm2835_cloc
@@ -1320,6 +1333,7 @@ static const struct clk_ops bcm2835_cloc
.unprepare = bcm2835_clock_off,
.recalc_rate = bcm2835_clock_get_rate,
.set_rate = bcm2835_clock_set_rate,
@ -61,7 +61,7 @@ Signed-off-by: Eric Anholt <eric@anholt.net>
.determine_rate = bcm2835_clock_determine_rate,
.set_parent = bcm2835_clock_set_parent,
.get_parent = bcm2835_clock_get_parent,
@@ -1480,7 +1494,6 @@ static struct clk_hw *bcm2835_register_c
@@ -1496,7 +1510,6 @@ static struct clk_hw *bcm2835_register_c
init.ops = &bcm2835_vpu_clock_clk_ops;
} else {
init.ops = &bcm2835_clock_clk_ops;

2
target/linux/bcm27xx/patches-5.4/950-0270-clk-bcm2835-Avoid-null-pointer-exception.patch
View File

@ -12,7 +12,7 @@ Signed-off-by: popcornmix <popcornmix@gmail.com>
--- a/drivers/clk/bcm/clk-bcm2835.c
+++ b/drivers/clk/bcm/clk-bcm2835.c
@@ -2262,9 +2262,11 @@ static bool bcm2835_clk_is_claimed(const
@@ -2278,9 +2278,11 @@ static bool bcm2835_clk_is_claimed(const
int i;
for (i = 0; i < ARRAY_SIZE(clk_desc_array); i++) {

4
target/linux/bcm27xx/patches-5.4/950-0351-clk-bcm2835-Disable-v3d-clock.patch
View File

@ -12,7 +12,7 @@ Signed-off-by: popcornmix <popcornmix@gmail.com>
--- a/drivers/clk/bcm/clk-bcm2835.c
+++ b/drivers/clk/bcm/clk-bcm2835.c
@@ -1716,16 +1716,12 @@ static const struct bcm2835_clk_desc clk
@@ -1732,16 +1732,12 @@ static const struct bcm2835_clk_desc clk
.hold_mask = CM_PLLA_HOLDCORE,
.fixed_divider = 1,
.flags = CLK_SET_RATE_PARENT),
@ -35,7 +35,7 @@ Signed-off-by: popcornmix <popcornmix@gmail.com>
[BCM2835_PLLA_DSI0] = REGISTER_PLL_DIV(
SOC_ALL,
.name = "plla_dsi0",
@@ -2003,14 +1999,12 @@ static const struct bcm2835_clk_desc clk
@@ -2019,14 +2015,12 @@ static const struct bcm2835_clk_desc clk
.int_bits = 6,
.frac_bits = 0,
.tcnt_mux = 3),

2
target/linux/bcm27xx/patches-5.4/950-0394-Initialise-rpi-firmware-before-clk-bcm2835.patch
View File

@ -25,7 +25,7 @@ Co-authored-by: Phil Elwell <phil@raspberrypi.org>
--- a/drivers/clk/bcm/clk-bcm2835.c
+++ b/drivers/clk/bcm/clk-bcm2835.c
@@ -2382,7 +2382,7 @@ static int __init __bcm2835_clk_driver_i
@@ -2399,7 +2399,7 @@ static int __init __bcm2835_clk_driver_i
{
return platform_driver_register(&bcm2835_clk_driver);
}

129
target/linux/generic/backport-5.4/041-genirq-affinity-Make-affinity-setting-if-activated-o.patch
View File

@ -1,129 +0,0 @@
From: Thomas Gleixner <tglx@linutronix.de>
Date: Fri, 24 Jul 2020 22:44:41 +0200
Subject: [PATCH] genirq/affinity: Make affinity setting if activated opt-in
commit f0c7baca180046824e07fc5f1326e83a8fd150c7 upstream.
John reported that on a RK3288 system the perf per CPU interrupts are all
affine to CPU0 and provided the analysis:
"It looks like what happens is that because the interrupts are not per-CPU
in the hardware, armpmu_request_irq() calls irq_force_affinity() while
the interrupt is deactivated and then request_irq() with IRQF_PERCPU |
IRQF_NOBALANCING.
Now when irq_startup() runs with IRQ_STARTUP_NORMAL, it calls
irq_setup_affinity() which returns early because IRQF_PERCPU and
IRQF_NOBALANCING are set, leaving the interrupt on its original CPU."
This was broken by the recent commit which blocked interrupt affinity
setting in hardware before activation of the interrupt. While this works in
general, it does not work for this particular case. As contrary to the
initial analysis not all interrupt chip drivers implement an activate
callback, the safe cure is to make the deferred interrupt affinity setting
at activation time opt-in.
Implement the necessary core logic and make the two irqchip implementations
for which this is required opt-in. In hindsight this would have been the
right thing to do, but ...
Fixes: baedb87d1b53 ("genirq/affinity: Handle affinity setting on inactive interrupts correctly")
Reported-by: John Keeping <john@metanate.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Tested-by: Marc Zyngier <maz@kernel.org>
Acked-by: Marc Zyngier <maz@kernel.org>
Cc: stable@vger.kernel.org
Link: https://lkml.kernel.org/r/87blk4tzgm.fsf@nanos.tec.linutronix.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
--- a/arch/x86/kernel/apic/vector.c
+++ b/arch/x86/kernel/apic/vector.c
@@ -554,6 +554,10 @@ static int x86_vector_alloc_irqs(struct
irqd->chip_data = apicd;
irqd->hwirq = virq + i;
irqd_set_single_target(irqd);
+
+ /* Don't invoke affinity setter on deactivated interrupts */
+ irqd_set_affinity_on_activate(irqd);
+
/*
* Legacy vectors are already assigned when the IOAPIC
* takes them over. They stay on the same vector. This is
--- a/drivers/irqchip/irq-gic-v3-its.c
+++ b/drivers/irqchip/irq-gic-v3-its.c
@@ -2581,6 +2581,7 @@ static int its_irq_domain_alloc(struct i
msi_alloc_info_t *info = args;
struct its_device *its_dev = info->scratchpad[0].ptr;
struct its_node *its = its_dev->its;
+ struct irq_data *irqd;
irq_hw_number_t hwirq;
int err;
int i;
@@ -2600,7 +2601,9 @@ static int its_irq_domain_alloc(struct i
irq_domain_set_hwirq_and_chip(domain, virq + i,
hwirq + i, &its_irq_chip, its_dev);
- irqd_set_single_target(irq_desc_get_irq_data(irq_to_desc(virq + i)));
+ irqd = irq_get_irq_data(virq + i);
+ irqd_set_single_target(irqd);
+ irqd_set_affinity_on_activate(irqd);
pr_debug("ID:%d pID:%d vID:%d\n",
(int)(hwirq + i - its_dev->event_map.lpi_base),
(int)(hwirq + i), virq + i);
--- a/include/linux/irq.h
+++ b/include/linux/irq.h
@@ -211,6 +211,8 @@ struct irq_data {
* IRQD_CAN_RESERVE - Can use reservation mode
* IRQD_MSI_NOMASK_QUIRK - Non-maskable MSI quirk for affinity change
* required
+ * IRQD_AFFINITY_ON_ACTIVATE - Affinity is set on activation. Don't call
+ * irq_chip::irq_set_affinity() when deactivated.
*/
enum {
IRQD_TRIGGER_MASK = 0xf,
@@ -234,6 +236,7 @@ enum {
IRQD_DEFAULT_TRIGGER_SET = (1 << 25),
IRQD_CAN_RESERVE = (1 << 26),
IRQD_MSI_NOMASK_QUIRK = (1 << 27),
+ IRQD_AFFINITY_ON_ACTIVATE = (1 << 29),
};
#define __irqd_to_state(d) ACCESS_PRIVATE((d)->common, state_use_accessors)
@@ -408,6 +411,16 @@ static inline bool irqd_msi_nomask_quirk
return __irqd_to_state(d) & IRQD_MSI_NOMASK_QUIRK;
}
+static inline void irqd_set_affinity_on_activate(struct irq_data *d)
+{
+ __irqd_to_state(d) |= IRQD_AFFINITY_ON_ACTIVATE;
+}
+
+static inline bool irqd_affinity_on_activate(struct irq_data *d)
+{
+ return __irqd_to_state(d) & IRQD_AFFINITY_ON_ACTIVATE;
+}
+
#undef __irqd_to_state
static inline irq_hw_number_t irqd_to_hwirq(struct irq_data *d)
--- a/kernel/irq/manage.c
+++ b/kernel/irq/manage.c
@@ -281,12 +281,16 @@ static bool irq_set_affinity_deactivated
struct irq_desc *desc = irq_data_to_desc(data);
/*
+ * Handle irq chips which can handle affinity only in activated
+ * state correctly
+ *
* If the interrupt is not yet activated, just store the affinity
* mask and do not call the chip driver at all. On activation the
* driver has to make sure anyway that the interrupt is in a
* useable state so startup works.
*/
- if (!IS_ENABLED(CONFIG_IRQ_DOMAIN_HIERARCHY) || irqd_is_activated(data))
+ if (!IS_ENABLED(CONFIG_IRQ_DOMAIN_HIERARCHY) ||
+ irqd_is_activated(data) || !irqd_affinity_on_activate(data))
return false;
cpumask_copy(desc->irq_common_data.affinity, mask);

4
target/linux/generic/hack-5.4/204-module_strip.patch
View File

@ -112,7 +112,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
config MODULES_TREE_LOOKUP
--- a/kernel/module.c
+++ b/kernel/module.c
@@ -3110,9 +3110,11 @@ static int setup_load_info(struct load_i
@@ -3126,9 +3126,11 @@ static int setup_load_info(struct load_i
static int check_modinfo(struct module *mod, struct load_info *info, int flags)
{
@ -125,7 +125,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
if (flags & MODULE_INIT_IGNORE_VERMAGIC)
modmagic = NULL;
@@ -3133,6 +3135,7 @@ static int check_modinfo(struct module *
@@ -3149,6 +3151,7 @@ static int check_modinfo(struct module *
mod->name);
add_taint_module(mod, TAINT_OOT_MODULE, LOCKDEP_STILL_OK);
}

2
target/linux/generic/hack-5.4/902-debloat_proc.patch
View File

@ -330,7 +330,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
--- a/net/core/sock.c
+++ b/net/core/sock.c
@@ -3613,6 +3613,8 @@ static __net_initdata struct pernet_oper
@@ -3634,6 +3634,8 @@ static __net_initdata struct pernet_oper
static int __init proto_init(void)
{

6
target/linux/generic/pending-5.4/690-net-add-support-for-threaded-NAPI-polling.patch
View File

@ -226,7 +226,8 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
have = netpoll_poll_lock(n);
- weight = n->weight;
-
+ work = __napi_poll(n, &do_repoll);
- /* This NAPI_STATE_SCHED test is for avoiding a race
- * with netpoll's poll_napi(). Only the entity which
- * obtains the lock and sees NAPI_STATE_SCHED set will
@ -243,8 +244,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
-
- if (likely(work < weight))
- goto out_unlock;
+ work = __napi_poll(n, &do_repoll);
-
- /* Drivers must not modify the NAPI state if they
- * consume the entire weight. In such cases this code
- * still "owns" the NAPI instance and therefore can

10
target/linux/ipq806x/patches-5.4/093-1-v5.8-ipq806x-PCI-qcom-Add-missing-ipq806x-clocks-in-PCIe-driver.patch
View File

@ -19,7 +19,7 @@ Acked-by: Stanimir Varbanov <svarbanov@mm-sol.com>
--- a/drivers/pci/controller/dwc/pcie-qcom.c
+++ b/drivers/pci/controller/dwc/pcie-qcom.c
@@ -85,6 +85,8 @@ struct qcom_pcie_resources_2_1_0 {
@@ -103,6 +103,8 @@ struct qcom_pcie_resources_2_1_0 {
struct clk *iface_clk;
struct clk *core_clk;
struct clk *phy_clk;
@ -28,7 +28,7 @@ Acked-by: Stanimir Varbanov <svarbanov@mm-sol.com>
struct reset_control *pci_reset;
struct reset_control *axi_reset;
struct reset_control *ahb_reset;
@@ -235,6 +237,14 @@ static int qcom_pcie_get_resources_2_1_0
@@ -253,6 +255,14 @@ static int qcom_pcie_get_resources_2_1_0
if (IS_ERR(res->phy_clk))
return PTR_ERR(res->phy_clk);
@ -43,7 +43,7 @@ Acked-by: Stanimir Varbanov <svarbanov@mm-sol.com>
res->pci_reset = devm_reset_control_get_exclusive(dev, "pci");
if (IS_ERR(res->pci_reset))
return PTR_ERR(res->pci_reset);
@@ -267,6 +277,8 @@ static void qcom_pcie_deinit_2_1_0(struc
@@ -285,6 +295,8 @@ static void qcom_pcie_deinit_2_1_0(struc
clk_disable_unprepare(res->iface_clk);
clk_disable_unprepare(res->core_clk);
clk_disable_unprepare(res->phy_clk);
@ -52,7 +52,7 @@ Acked-by: Stanimir Varbanov <svarbanov@mm-sol.com>
regulator_bulk_disable(ARRAY_SIZE(res->supplies), res->supplies);
}
@@ -296,16 +308,28 @@ static int qcom_pcie_init_2_1_0(struct q
@@ -315,16 +327,28 @@ static int qcom_pcie_init_2_1_0(struct q
goto err_assert_ahb;
}
@ -84,7 +84,7 @@ Acked-by: Stanimir Varbanov <svarbanov@mm-sol.com>
}
ret = reset_control_deassert(res->ahb_reset);
@@ -361,10 +385,14 @@ static int qcom_pcie_init_2_1_0(struct q
@@ -400,10 +424,14 @@ static int qcom_pcie_init_2_1_0(struct q
return 0;
err_deassert_ahb:

8
target/linux/ipq806x/patches-5.4/093-2-v5.8-ipq806x-PCI-qcom-Change-duplicate-PCI-reset-to-phy-reset.patch
View File

@ -18,7 +18,7 @@ Acked-by: Stanimir Varbanov <svarbanov@mm-sol.com>
--- a/drivers/pci/controller/dwc/pcie-qcom.c
+++ b/drivers/pci/controller/dwc/pcie-qcom.c
@@ -269,14 +269,14 @@ static void qcom_pcie_deinit_2_1_0(struc
@@ -287,14 +287,14 @@ static void qcom_pcie_deinit_2_1_0(struc
{
struct qcom_pcie_resources_2_1_0 *res = &pcie->res.v2_1_0;
@ -35,7 +35,7 @@ Acked-by: Stanimir Varbanov <svarbanov@mm-sol.com>
clk_disable_unprepare(res->aux_clk);
clk_disable_unprepare(res->ref_clk);
regulator_bulk_disable(ARRAY_SIZE(res->supplies), res->supplies);
@@ -314,12 +314,6 @@ static int qcom_pcie_init_2_1_0(struct q
@@ -333,12 +333,6 @@ static int qcom_pcie_init_2_1_0(struct q
goto err_clk_core;
}
@ -48,7 +48,7 @@ Acked-by: Stanimir Varbanov <svarbanov@mm-sol.com>
ret = clk_prepare_enable(res->aux_clk);
if (ret) {
dev_err(dev, "cannot prepare/enable aux clock\n");
@@ -372,6 +366,12 @@ static int qcom_pcie_init_2_1_0(struct q
@@ -411,6 +405,12 @@ static int qcom_pcie_init_2_1_0(struct q
return ret;
}
@ -61,7 +61,7 @@ Acked-by: Stanimir Varbanov <svarbanov@mm-sol.com>
/* wait for clock acquisition */
usleep_range(1000, 1500);
@@ -389,8 +389,6 @@ err_deassert_ahb:
@@ -428,8 +428,6 @@ err_deassert_ahb:
err_clk_ref:
clk_disable_unprepare(res->aux_clk);
err_clk_aux:

8
target/linux/ipq806x/patches-5.4/093-3-v5.8-ipq806x-PCI-qcom-Add-missing-reset-for-ipq806x.patch
View File

@ -20,7 +20,7 @@ Cc: stable@vger.kernel.org # v4.5+
--- a/drivers/pci/controller/dwc/pcie-qcom.c
+++ b/drivers/pci/controller/dwc/pcie-qcom.c
@@ -92,6 +92,7 @@ struct qcom_pcie_resources_2_1_0 {
@@ -110,6 +110,7 @@ struct qcom_pcie_resources_2_1_0 {
struct reset_control *ahb_reset;
struct reset_control *por_reset;
struct reset_control *phy_reset;
@ -28,7 +28,7 @@ Cc: stable@vger.kernel.org # v4.5+
struct regulator_bulk_data supplies[QCOM_PCIE_2_1_0_MAX_SUPPLY];
};
@@ -261,6 +262,10 @@ static int qcom_pcie_get_resources_2_1_0
@@ -279,6 +280,10 @@ static int qcom_pcie_get_resources_2_1_0
if (IS_ERR(res->por_reset))
return PTR_ERR(res->por_reset);
@ -39,7 +39,7 @@ Cc: stable@vger.kernel.org # v4.5+
res->phy_reset = devm_reset_control_get_exclusive(dev, "phy");
return PTR_ERR_OR_ZERO(res->phy_reset);
}
@@ -274,6 +279,7 @@ static void qcom_pcie_deinit_2_1_0(struc
@@ -292,6 +297,7 @@ static void qcom_pcie_deinit_2_1_0(struc
reset_control_assert(res->axi_reset);
reset_control_assert(res->ahb_reset);
reset_control_assert(res->por_reset);
@ -47,7 +47,7 @@ Cc: stable@vger.kernel.org # v4.5+
reset_control_assert(res->phy_reset);
clk_disable_unprepare(res->iface_clk);
clk_disable_unprepare(res->core_clk);
@@ -332,6 +338,12 @@ static int qcom_pcie_init_2_1_0(struct q
@@ -351,6 +357,12 @@ static int qcom_pcie_init_2_1_0(struct q
goto err_deassert_ahb;
}

144
target/linux/ipq806x/patches-5.4/093-4-v5.8-ipq806x-PCI-qcom-Use-bulk-clk-api-and-assert-on-error.patch
View File

@ -17,7 +17,7 @@ Acked-by: Stanimir Varbanov <svarbanov@mm-sol.com>
--- a/drivers/pci/controller/dwc/pcie-qcom.c
+++ b/drivers/pci/controller/dwc/pcie-qcom.c
@@ -81,12 +81,9 @@
@@ -99,12 +99,9 @@
#define SLV_ADDR_SPACE_SZ 0x10000000
#define QCOM_PCIE_2_1_0_MAX_SUPPLY 3
@ -32,7 +32,7 @@ Acked-by: Stanimir Varbanov <svarbanov@mm-sol.com>
struct reset_control *pci_reset;
struct reset_control *axi_reset;
struct reset_control *ahb_reset;
@@ -226,25 +223,21 @@ static int qcom_pcie_get_resources_2_1_0
@@ -244,25 +241,21 @@ static int qcom_pcie_get_resources_2_1_0
if (ret)
return ret;
@ -73,7 +73,7 @@ Acked-by: Stanimir Varbanov <svarbanov@mm-sol.com>
res->pci_reset = devm_reset_control_get_exclusive(dev, "pci");
if (IS_ERR(res->pci_reset))
@@ -274,17 +267,13 @@ static void qcom_pcie_deinit_2_1_0(struc
@@ -292,17 +285,13 @@ static void qcom_pcie_deinit_2_1_0(struc
{
struct qcom_pcie_resources_2_1_0 *res = &pcie->res.v2_1_0;
@ -92,111 +92,113 @@ Acked-by: Stanimir Varbanov <svarbanov@mm-sol.com>
regulator_bulk_disable(ARRAY_SIZE(res->supplies), res->supplies);
}
@@ -302,36 +291,6 @@ static int qcom_pcie_init_2_1_0(struct q
@@ -321,47 +310,45 @@ static int qcom_pcie_init_2_1_0(struct q
return ret;
}
- ret = reset_control_assert(res->ahb_reset);
- if (ret) {
+ ret = reset_control_deassert(res->ahb_reset);
if (ret) {
- dev_err(dev, "cannot assert ahb reset\n");
- goto err_assert_ahb;
- }
-
+ dev_err(dev, "cannot deassert ahb reset\n");
+ goto err_deassert_ahb;
}
- ret = clk_prepare_enable(res->iface_clk);
- if (ret) {
+ ret = reset_control_deassert(res->ext_reset);
if (ret) {
- dev_err(dev, "cannot prepare/enable iface clock\n");
- goto err_assert_ahb;
- }
-
- ret = clk_prepare_enable(res->core_clk);
- if (ret) {
- dev_err(dev, "cannot prepare/enable core clock\n");
- goto err_clk_core;
- }
-
- ret = clk_prepare_enable(res->aux_clk);
- if (ret) {
- dev_err(dev, "cannot prepare/enable aux clock\n");
- goto err_clk_aux;
- }
-
- ret = clk_prepare_enable(res->ref_clk);
- if (ret) {
- dev_err(dev, "cannot prepare/enable ref clock\n");
- goto err_clk_ref;
- }
-
ret = reset_control_deassert(res->ahb_reset);
if (ret) {
dev_err(dev, "cannot deassert ahb reset\n");
@@ -341,48 +300,46 @@ static int qcom_pcie_init_2_1_0(struct q
ret = reset_control_deassert(res->ext_reset);
if (ret) {
dev_err(dev, "cannot deassert ext reset\n");
- goto err_deassert_ahb;
+ dev_err(dev, "cannot deassert ext reset\n");
+ goto err_deassert_ext;
}
- /* enable PCIe clocks and resets */
- val = readl(pcie->parf + PCIE20_PARF_PHY_CTRL);
- val &= ~BIT(0);
- writel(val, pcie->parf + PCIE20_PARF_PHY_CTRL);
-
- /* enable external reference clock */
- val = readl(pcie->parf + PCIE20_PARF_PHY_REFCLK);
- val |= BIT(16);
- writel(val, pcie->parf + PCIE20_PARF_PHY_REFCLK);
-
ret = reset_control_deassert(res->phy_reset);
- ret = clk_prepare_enable(res->core_clk);
+ ret = reset_control_deassert(res->phy_reset);
if (ret) {
dev_err(dev, "cannot deassert phy reset\n");
- return ret;
- dev_err(dev, "cannot prepare/enable core clock\n");
- goto err_clk_core;
+ dev_err(dev, "cannot deassert phy reset\n");
+ goto err_deassert_phy;
}
ret = reset_control_deassert(res->pci_reset);
- ret = clk_prepare_enable(res->aux_clk);
+ ret = reset_control_deassert(res->pci_reset);
if (ret) {
dev_err(dev, "cannot deassert pci reset\n");
- return ret;
- dev_err(dev, "cannot prepare/enable aux clock\n");
- goto err_clk_aux;
+ dev_err(dev, "cannot deassert pci reset\n");
+ goto err_deassert_pci;
}
ret = reset_control_deassert(res->por_reset);
- ret = clk_prepare_enable(res->ref_clk);
+ ret = reset_control_deassert(res->por_reset);
if (ret) {
dev_err(dev, "cannot deassert por reset\n");
- return ret;
- dev_err(dev, "cannot prepare/enable ref clock\n");
- goto err_clk_ref;
+ dev_err(dev, "cannot deassert por reset\n");
+ goto err_deassert_por;
}
ret = reset_control_deassert(res->axi_reset);
- ret = reset_control_deassert(res->ahb_reset);
+ ret = reset_control_deassert(res->axi_reset);
if (ret) {
dev_err(dev, "cannot deassert axi reset\n");
- return ret;
- dev_err(dev, "cannot deassert ahb reset\n");
- goto err_deassert_ahb;
+ dev_err(dev, "cannot deassert axi reset\n");
+ goto err_deassert_axi;
}
- ret = clk_prepare_enable(res->phy_clk);
- ret = reset_control_deassert(res->ext_reset);
- if (ret) {
- dev_err(dev, "cannot prepare/enable phy clock\n");
- dev_err(dev, "cannot deassert ext reset\n");
- goto err_deassert_ahb;
- }
+ ret = clk_bulk_prepare_enable(ARRAY_SIZE(res->clks), res->clks);
+ if (ret)
+ goto err_clks;
+
+ /* enable PCIe clocks and resets */
+ val = readl(pcie->parf + PCIE20_PARF_PHY_CTRL);
+ val &= ~BIT(0);
+ writel(val, pcie->parf + PCIE20_PARF_PHY_CTRL);
+
+ /* enable external reference clock */
+ val = readl(pcie->parf + PCIE20_PARF_PHY_REFCLK);
+ val |= BIT(16);
+ writel(val, pcie->parf + PCIE20_PARF_PHY_REFCLK);
/* enable PCIe clocks and resets */
val = readl(pcie->parf + PCIE20_PARF_PHY_CTRL);
@@ -393,36 +380,6 @@ static int qcom_pcie_init_2_1_0(struct q
val |= PHY_REFCLK_SSP_EN;
writel(val, pcie->parf + PCIE20_PARF_PHY_REFCLK);
- ret = reset_control_deassert(res->phy_reset);
- if (ret) {
- dev_err(dev, "cannot deassert phy reset\n");
- return ret;
- }
-
- ret = reset_control_deassert(res->pci_reset);
- if (ret) {
- dev_err(dev, "cannot deassert pci reset\n");
- return ret;
- }
-
- ret = reset_control_deassert(res->por_reset);
- if (ret) {
- dev_err(dev, "cannot deassert por reset\n");
- return ret;
- }
-
- ret = reset_control_deassert(res->axi_reset);
- if (ret) {
- dev_err(dev, "cannot deassert axi reset\n");
- return ret;
- }
-
- ret = clk_prepare_enable(res->phy_clk);
- if (ret) {
- dev_err(dev, "cannot prepare/enable phy clock\n");
- goto err_deassert_ahb;
- }
-
/* wait for clock acquisition */
usleep_range(1000, 1500);
@@ -396,15 +353,19 @@ static int qcom_pcie_init_2_1_0(struct q
@@ -435,15 +392,19 @@ static int qcom_pcie_init_2_1_0(struct q
return 0;

67
target/linux/ipq806x/patches-5.4/093-5-v5.8-ipq806x-PCI-qcom-Define-some-PARF-params-needed-for-ipq8064-SoC.patch
View File

@ -1,67 +0,0 @@
From 5149901e9e6deca487c01cc434a3ac4125c7b00b Mon Sep 17 00:00:00 2001
From: Ansuel Smith <ansuelsmth@gmail.com>
Date: Mon, 15 Jun 2020 23:06:03 +0200
Subject: PCI: qcom: Define some PARF params needed for ipq8064 SoC
Set some specific value for Tx De-Emphasis, Tx Swing and Rx equalization
needed on some ipq8064 based device (Netgear R7800 for example). Without
this the system locks on kernel load.
Link: https://lore.kernel.org/r/20200615210608.21469-8-ansuelsmth@gmail.com
Fixes: 82a823833f4e ("PCI: qcom: Add Qualcomm PCIe controller driver")
Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Acked-by: Stanimir Varbanov <svarbanov@mm-sol.com>
Cc: stable@vger.kernel.org # v4.5+
---
drivers/pci/controller/dwc/pcie-qcom.c | 24 ++++++++++++++++++++++++
1 file changed, 24 insertions(+)
--- a/drivers/pci/controller/dwc/pcie-qcom.c
+++ b/drivers/pci/controller/dwc/pcie-qcom.c
@@ -76,6 +76,18 @@
#define DBI_RO_WR_EN 1
#define PERST_DELAY_US 1000
+/* PARF registers */
+#define PCIE20_PARF_PCS_DEEMPH 0x34
+#define PCS_DEEMPH_TX_DEEMPH_GEN1(x) ((x) << 16)
+#define PCS_DEEMPH_TX_DEEMPH_GEN2_3_5DB(x) ((x) << 8)
+#define PCS_DEEMPH_TX_DEEMPH_GEN2_6DB(x) ((x) << 0)
+
+#define PCIE20_PARF_PCS_SWING 0x38
+#define PCS_SWING_TX_SWING_FULL(x) ((x) << 8)
+#define PCS_SWING_TX_SWING_LOW(x) ((x) << 0)
+
+#define PCIE20_PARF_CONFIG_BITS 0x50
+#define PHY_RX0_EQ(x) ((x) << 24)
#define PCIE20_v3_PARF_SLV_ADDR_SPACE_SIZE 0x358
#define SLV_ADDR_SPACE_SZ 0x10000000
@@ -282,6 +294,7 @@ static int qcom_pcie_init_2_1_0(struct q
struct qcom_pcie_resources_2_1_0 *res = &pcie->res.v2_1_0;
struct dw_pcie *pci = pcie->pci;
struct device *dev = pci->dev;
+ struct device_node *node = dev->of_node;
u32 val;
int ret;
@@ -336,6 +349,17 @@ static int qcom_pcie_init_2_1_0(struct q
val &= ~BIT(0);
writel(val, pcie->parf + PCIE20_PARF_PHY_CTRL);
+ if (of_device_is_compatible(node, "qcom,pcie-ipq8064")) {
+ writel(PCS_DEEMPH_TX_DEEMPH_GEN1(24) |
+ PCS_DEEMPH_TX_DEEMPH_GEN2_3_5DB(24) |
+ PCS_DEEMPH_TX_DEEMPH_GEN2_6DB(34),
+ pcie->parf + PCIE20_PARF_PCS_DEEMPH);
+ writel(PCS_SWING_TX_SWING_FULL(120) |
+ PCS_SWING_TX_SWING_LOW(120),
+ pcie->parf + PCIE20_PARF_PCS_SWING);
+ writel(PHY_RX0_EQ(4), pcie->parf + PCIE20_PARF_CONFIG_BITS);
+ }
+
/* enable external reference clock */
val = readl(pcie->parf + PCIE20_PARF_PHY_REFCLK);
val |= BIT(16);

55
target/linux/ipq806x/patches-5.4/093-6-v5.8-ipq806x-PCI-qcom-Add-support-for-tx-term-offset-for-rev-2_1_0.patch
View File

@ -1,55 +0,0 @@
From de3c4bf648975ea0b1d344d811e9b0748907b47c Mon Sep 17 00:00:00 2001
From: Ansuel Smith <ansuelsmth@gmail.com>
Date: Mon, 15 Jun 2020 23:06:04 +0200
Subject: PCI: qcom: Add support for tx term offset for rev 2.1.0
Add tx term offset support to pcie qcom driver need in some revision of
the ipq806x SoC. Ipq8064 needs tx term offset set to 7.
Link: https://lore.kernel.org/r/20200615210608.21469-9-ansuelsmth@gmail.com
Fixes: 82a823833f4e ("PCI: qcom: Add Qualcomm PCIe controller driver")
Signed-off-by: Sham Muthayyan <smuthayy@codeaurora.org>
Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Acked-by: Stanimir Varbanov <svarbanov@mm-sol.com>
Cc: stable@vger.kernel.org # v4.5+
---
drivers/pci/controller/dwc/pcie-qcom.c | 17 ++++++++++++++++-
1 file changed, 16 insertions(+), 1 deletion(-)
--- a/drivers/pci/controller/dwc/pcie-qcom.c
+++ b/drivers/pci/controller/dwc/pcie-qcom.c
@@ -45,7 +45,13 @@
#define PCIE_CAP_CPL_TIMEOUT_DISABLE 0x10
#define PCIE20_PARF_PHY_CTRL 0x40
+#define PHY_CTRL_PHY_TX0_TERM_OFFSET_MASK GENMASK(20, 16)
+#define PHY_CTRL_PHY_TX0_TERM_OFFSET(x) ((x) << 16)
+
#define PCIE20_PARF_PHY_REFCLK 0x4C
+#define PHY_REFCLK_SSP_EN BIT(16)
+#define PHY_REFCLK_USE_PAD BIT(12)
+
#define PCIE20_PARF_DBI_BASE_ADDR 0x168
#define PCIE20_PARF_SLV_ADDR_SPACE_SIZE 0x16C
#define PCIE20_PARF_MHI_CLOCK_RESET_CTRL 0x174
@@ -360,9 +366,18 @@ static int qcom_pcie_init_2_1_0(struct q
writel(PHY_RX0_EQ(4), pcie->parf + PCIE20_PARF_CONFIG_BITS);
}
+ if (of_device_is_compatible(node, "qcom,pcie-ipq8064")) {
+ /* set TX termination offset */
+ val = readl(pcie->parf + PCIE20_PARF_PHY_CTRL);
+ val &= ~PHY_CTRL_PHY_TX0_TERM_OFFSET_MASK;
+ val |= PHY_CTRL_PHY_TX0_TERM_OFFSET(7);
+ writel(val, pcie->parf + PCIE20_PARF_PHY_CTRL);
+ }
+
/* enable external reference clock */
val = readl(pcie->parf + PCIE20_PARF_PHY_REFCLK);
- val |= BIT(16);
+ val &= ~PHY_REFCLK_USE_PAD;
+ val |= PHY_REFCLK_SSP_EN;
writel(val, pcie->parf + PCIE20_PARF_PHY_REFCLK);
/* wait for clock acquisition */

6
target/linux/layerscape/patches-5.4/804-crypto-0016-MLKU-114-1-crypto-caam-reduce-page-0-regs-access-to-.patch
View File

@ -30,7 +30,7 @@ Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
--- a/drivers/crypto/caam/caamalg.c
+++ b/drivers/crypto/caam/caamalg.c
@@ -3542,13 +3542,14 @@ int caam_algapi_init(struct device *ctrl
@@ -3520,13 +3520,14 @@ int caam_algapi_init(struct device *ctrl
* First, detect presence and attributes of DES, AES, and MD blocks.
*/
if (priv->era < 10) {
@ -47,7 +47,7 @@ Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
des_inst = (cha_inst & CHA_ID_LS_DES_MASK) >>
CHA_ID_LS_DES_SHIFT;
aes_inst = cha_inst & CHA_ID_LS_AES_MASK;
@@ -3558,24 +3559,24 @@ int caam_algapi_init(struct device *ctrl
@@ -3534,23 +3535,23 @@ int caam_algapi_init(struct device *ctrl
ccha_inst = 0;
ptha_inst = 0;
@ -73,10 +73,8 @@ Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
md_inst = mdha & CHA_VER_NUM_MASK;
- ccha_inst = rd_reg32(&priv->ctrl->vreg.ccha) & CHA_VER_NUM_MASK;
- ptha_inst = rd_reg32(&priv->ctrl->vreg.ptha) & CHA_VER_NUM_MASK;
- arc4_inst = rd_reg32(&priv->ctrl->vreg.afha) & CHA_VER_NUM_MASK;
+ ccha_inst = rd_reg32(&vreg->ccha) & CHA_VER_NUM_MASK;
+ ptha_inst = rd_reg32(&vreg->ptha) & CHA_VER_NUM_MASK;
+ arc4_inst = rd_reg32(&vreg->afha) & CHA_VER_NUM_MASK;
gcm_support = aesa & CHA_VER_MISC_AES_GCM;
}

10
target/linux/layerscape/patches-5.4/804-crypto-0022-MLK-19801-2-crypto-caam-add-support-of-tagged-keys-i.patch
View File

@ -127,8 +127,8 @@ Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
/* skcipher_encrypt shared descriptor */
desc = ctx->sh_desc_enc;
cnstr_shdsc_skcipher_encap(desc, &ctx->cdata, ivsize, is_rfc3686,
@@ -824,6 +867,14 @@ static int arc4_skcipher_setkey(struct c
return skcipher_setkey(skcipher, key, keylen, 0);
@@ -818,6 +861,14 @@ static int ctr_skcipher_setkey(struct cr
return skcipher_setkey(skcipher, key, keylen, ctx1_iv_off);
}
+#ifdef CONFIG_CRYPTO_DEV_FSL_CAAM_TK_API
@ -142,7 +142,7 @@ Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
static int des_skcipher_setkey(struct crypto_skcipher *skcipher,
const u8 *key, unsigned int keylen)
{
@@ -1924,6 +1975,25 @@ static struct caam_skcipher_alg driver_a
@@ -1918,6 +1969,25 @@ static struct caam_skcipher_alg driver_a
},
.caam.class1_alg_type = OP_ALG_ALGSEL_AES | OP_ALG_AAI_CBC,
},
@ -168,7 +168,7 @@ Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
{
.skcipher = {
.base = {
@@ -2043,6 +2113,24 @@ static struct caam_skcipher_alg driver_a
@@ -2037,6 +2107,24 @@ static struct caam_skcipher_alg driver_a
},
.caam.class1_alg_type = OP_ALG_ALGSEL_AES | OP_ALG_AAI_ECB,
},
@ -193,7 +193,7 @@ Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
{
.skcipher = {
.base = {
@@ -3507,7 +3595,8 @@ static void caam_skcipher_alg_init(struc
@@ -3486,7 +3574,8 @@ static void caam_skcipher_alg_init(struc
struct skcipher_alg *alg = &t_alg->skcipher;
alg->base.cra_module = THIS_MODULE;

2
target/linux/mvebu/patches-5.4/522-arm64-dts-marvell-armada-3720-espressobin-add-ports-.patch
View File

@ -15,7 +15,7 @@ Signed-off-by: Tomasz Maciej Nowak <tmn505@gmail.com>
--- a/arch/arm64/boot/dts/marvell/armada-3720-espressobin.dts
+++ b/arch/arm64/boot/dts/marvell/armada-3720-espressobin.dts
@@ -137,7 +137,7 @@
@@ -143,7 +143,7 @@
dsa,member = <0 0>;

4
target/linux/mvebu/patches-5.4/523-arm64-dts-marvell-espressobin-remove-COMPHY-nodes-as.patch
View File

@ -24,7 +24,7 @@ Signed-off-by: Tomasz Maciej Nowak <tmn505@gmail.com>
--- a/arch/arm64/boot/dts/marvell/armada-3720-espressobin.dts
+++ b/arch/arm64/boot/dts/marvell/armada-3720-espressobin.dts
@@ -54,8 +54,6 @@
@@ -60,8 +60,6 @@
/* J6 */
&sata {
status = "okay";
@ -33,7 +33,7 @@ Signed-off-by: Tomasz Maciej Nowak <tmn505@gmail.com>
};
/* J1 */
@@ -121,11 +119,17 @@
@@ -127,11 +125,17 @@
/* J7 */
&usb3 {
status = "okay";

2
target/linux/octeontx/patches-5.4/0004-PCI-add-quirk-for-Gateworks-PLX-PEX860x-switch-with-.patch
View File

@ -22,7 +22,7 @@ Signed-off-by: Tim Harvey <tharvey@gateworks.com>
#include <linux/platform_data/x86/apple.h>
#include <linux/pm_runtime.h>
#include <linux/switchtec.h>
@@ -5619,3 +5620,34 @@ static void apex_pci_fixup_class(struct
@@ -5622,3 +5623,34 @@ static void apex_pci_fixup_class(struct
}
DECLARE_PCI_FIXUP_CLASS_HEADER(0x1ac1, 0x089a,
PCI_CLASS_NOT_DEFINED, 8, apex_pci_fixup_class);