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31b46ebb62
to the two-entry list of verified platforms in #ifndef FIPS_REF_POINT_IS_SAFE_TO_CROSS_COMPILE pre-processor section.
203 lines
7.2 KiB
C
203 lines
7.2 KiB
C
/* ====================================================================
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* Copyright (c) 2005 The OpenSSL Project. Rights for redistribution
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* and usage in source and binary forms are granted according to the
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* OpenSSL license.
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*/
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#include <stdio.h>
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#if defined(__DECC)
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# include <c_asm.h>
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# pragma __nostandard
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#endif
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const void *FIPS_text_start(void);
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const void *FIPS_text_end(void);
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#include "e_os.h"
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#if !defined(POINTER_TO_FUNCTION_IS_POINTER_TO_1ST_INSTRUCTION)
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# if (defined(__sun) && (defined(__sparc) || defined(__sparcv9))) || \
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(defined(__sgi) && (defined(__mips) || defined(mips))) || \
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(defined(__osf__) && defined(__alpha)) || \
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(defined(__linux) && (defined(__arm) || defined(__arm__))) || \
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(defined(__i386) || defined(__i386__)) || \
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(defined(__x86_64) || defined(__x86_64__)) || \
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(defined(vax) || defined(__vax__))
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# define POINTER_TO_FUNCTION_IS_POINTER_TO_1ST_INSTRUCTION
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# endif
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#endif
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#if !defined(FIPS_REF_POINT_IS_SAFE_TO_CROSS_COMPILE)
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# if (defined(__ANDROID__) && (defined(__arm__) || defined(__arm))) || \
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(defined(__vxworks) && (defined(__ppc__) || defined(__ppc)))
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# define FIPS_REF_POINT_IS_SAFE_TO_CROSS_COMPILE
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# endif
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#endif
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#if defined(__xlC__) && __xlC__>=0x600 && (defined(_POWER) || defined(_ARCH_PPC))
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static void *instruction_pointer_xlc(void);
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# pragma mc_func instruction_pointer_xlc {\
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"7c0802a6" /* mflr r0 */ \
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"48000005" /* bl $+4 */ \
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"7c6802a6" /* mflr r3 */ \
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"7c0803a6" /* mtlr r0 */ }
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# pragma reg_killed_by instruction_pointer_xlc gr0 gr3
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# define INSTRUCTION_POINTER_IMPLEMENTED(ret) (ret=instruction_pointer_xlc());
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#endif
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#ifdef FIPS_START
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#define FIPS_ref_point FIPS_text_start
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/* Some compilers put string literals into a separate segment. As we
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* are mostly interested to hash AES tables in .rodata, we declare
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* reference points accordingly. In case you wonder, the values are
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* big-endian encoded variable names, just to prevent these arrays
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* from being merged by linker. */
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const unsigned int FIPS_rodata_start[]=
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{ 0x46495053, 0x5f726f64, 0x6174615f, 0x73746172 };
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#else
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#define FIPS_ref_point FIPS_text_end
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const unsigned int FIPS_rodata_end[]=
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{ 0x46495053, 0x5f726f64, 0x6174615f, 0x656e645b };
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#endif
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/*
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* I declare reference function as static in order to avoid certain
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* pitfalls in -dynamic linker behaviour...
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*/
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static void *instruction_pointer(void)
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{ void *ret=NULL;
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/* These are ABI-neutral CPU-specific snippets. ABI-neutrality means
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* that they are designed to work under any OS running on particular
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* CPU, which is why you don't find any #ifdef THIS_OR_THAT_OS in
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* this function. */
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#if defined(INSTRUCTION_POINTER_IMPLEMENTED)
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INSTRUCTION_POINTER_IMPLEMENTED(ret);
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#elif defined(__GNUC__) && __GNUC__>=2
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# if defined(__alpha) || defined(__alpha__)
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# define INSTRUCTION_POINTER_IMPLEMENTED
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__asm __volatile ( "br %0,1f\n1:" : "=r"(ret) );
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# elif defined(__i386) || defined(__i386__)
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# define INSTRUCTION_POINTER_IMPLEMENTED
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__asm __volatile ( "call 1f\n1: popl %0" : "=r"(ret) );
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ret = (void *)((size_t)ret&~3UL); /* align for better performance */
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# elif defined(__ia64) || defined(__ia64__)
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# define INSTRUCTION_POINTER_IMPLEMENTED
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__asm __volatile ( "mov %0=ip" : "=r"(ret) );
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# elif defined(__hppa) || defined(__hppa__) || defined(__pa_risc)
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# define INSTRUCTION_POINTER_IMPLEMENTED
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__asm __volatile ( "blr %%r0,%0\n\tnop" : "=r"(ret) );
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ret = (void *)((size_t)ret&~3UL); /* mask privilege level */
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# elif defined(__mips) || defined(__mips__)
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# define INSTRUCTION_POINTER_IMPLEMENTED
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void *scratch;
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__asm __volatile ( "move %1,$31\n\t" /* save ra */
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"bal .+8; nop\n\t"
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"move %0,$31\n\t"
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"move $31,%1" /* restore ra */
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: "=r"(ret),"=r"(scratch) );
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# elif defined(__ppc__) || defined(__ppc) || \\
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defined(__powerpc) || defined(__powerpc__) || \
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defined(__POWERPC__) || defined(_POWER) || defined(__PPC__) || \
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defined(__PPC64__) || defined(__ppc64__) || defined(__powerpc64__)
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# define INSTRUCTION_POINTER_IMPLEMENTED
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void *scratch;
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__asm __volatile ( "mfspr %1,8\n\t" /* save lr */
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"bl $+4\n\t"
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"mfspr %0,8\n\t" /* mflr ret */
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"mtspr 8,%1" /* restore lr */
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: "=r"(ret),"=r"(scratch) );
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# elif defined(__s390__) || defined(__s390x__)
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# define INSTRUCTION_POINTER_IMPLEMENTED
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__asm __volatile ( "bras %0,1f\n1:" : "=r"(ret) );
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ret = (void *)((size_t)ret&~3UL);
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# elif defined(__sparc) || defined(__sparc__) || defined(__sparcv9)
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# define INSTRUCTION_POINTER_IMPLEMENTED
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void *scratch;
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__asm __volatile ( "mov %%o7,%1\n\t"
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"call .+8; nop\n\t"
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"mov %%o7,%0\n\t"
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"mov %1,%%o7"
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: "=r"(ret),"=r"(scratch) );
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# elif defined(__x86_64) || defined(__x86_64__)
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# define INSTRUCTION_POINTER_IMPLEMENTED
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__asm __volatile ( "leaq 0(%%rip),%0" : "=r"(ret) );
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ret = (void *)((size_t)ret&~3UL); /* align for better performance */
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# elif defined(__arm) || defined(__arm__)
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# define INSTRUCTION_POINTER_IMPLEMENTED
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__asm __volatile ( "sub %0,pc,#8" : "=r"(ret) );
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# endif
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#elif defined(__DECC) && defined(__alpha)
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# define INSTRUCTION_POINTER_IMPLEMENTED
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ret = (void *)(size_t)asm("br %v0,1f\n1:");
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#elif defined(_MSC_VER) && defined(_M_IX86)
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# define INSTRUCTION_POINTER_IMPLEMENTED
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void *scratch;
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_asm {
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call self
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self: pop eax
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mov scratch,eax
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}
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ret = (void *)((size_t)scratch&~3UL);
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#endif
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return ret;
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}
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/*
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* This function returns pointer to an instruction in the vicinity of
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* its entry point, but not outside this object module. This guarantees
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* that sequestered code is covered...
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*/
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const void *FIPS_ref_point()
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{
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#if defined(FIPS_REF_POINT_IS_SAFE_TO_CROSS_COMPILE)
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return (void *)FIPS_ref_point;
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#if defined(INSTRUCTION_POINTER_IMPLEMENTED)
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return instruction_pointer();
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/* Below we essentially cover vendor compilers which do not support
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* inline assembler... */
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#elif defined(_AIX)
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struct { void *ip,*gp,*env; } *p = (void *)instruction_pointer;
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return p->ip;
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#elif defined(_HPUX_SOURCE)
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# if defined(__hppa) || defined(__hppa__)
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struct { void *i[4]; } *p = (void *)FIPS_ref_point;
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if (sizeof(p) == 8) /* 64-bit */
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return p->i[2];
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else if ((size_t)p & 2)
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{ p = (void *)((size_t)p&~3UL);
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return p->i[0];
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}
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else
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return (void *)p;
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# elif defined(__ia64) || defined(__ia64__)
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struct { unsigned long long ip,gp; } *p=(void *)instruction_pointer;
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return (void *)(size_t)p->ip;
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# endif
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#elif (defined(__VMS) || defined(VMS)) && !(defined(vax) || defined(__vax__))
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/* applies to both alpha and ia64 */
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struct { unsigned __int64 opaque,ip; } *p=(void *)instruction_pointer;
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return (void *)(size_t)p->ip;
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#elif defined(__VOS__)
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/* applies to both pa-risc and ia32 */
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struct { void *dp,*ip,*gp; } *p = (void *)instruction_pointer;
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return p->ip;
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#elif defined(_WIN32)
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# if defined(_WIN64) && defined(_M_IA64)
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struct { void *ip,*gp; } *p = (void *)FIPS_ref_point;
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return p->ip;
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# else
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return (void *)FIPS_ref_point;
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# endif
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/*
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* In case you wonder why there is no #ifdef __linux. All Linux targets
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* are GCC-based and therefore are covered by instruction_pointer above
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* [well, some are covered by by the one below]...
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*/
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#elif defined(POINTER_TO_FUNCTION_IS_POINTER_TO_1ST_INSTRUCTION)
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return (void *)instruction_pointer;
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#else
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return NULL;
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#endif
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}
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