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Commentary update for AES IA-64 assembler module.
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@ -48,13 +48,16 @@ te0=r40; te1=r41; te2=r42; te3=r43;
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# define ADDP add
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#endif
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// Why is the key schedule sparse on 64-bit architectures? When/if we fix
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// it in C, these are the lines to modify accordingly.
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#ifndef KSZ
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# define KSZ 8
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# define LDKEY ld8
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#endif
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// void AES_encrypt (const void *in,void *out,const AES_KEY *key);
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// measured timing om Itanium 2 is (48 + 14*rounds) cycles
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// measured timing on Itanium 2 is (48 + 14*rounds) cycles, or
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// 11.75 cycles per byte for 128 bit key...
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.global AES_encrypt#
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.proc AES_encrypt#
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.align 32
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