mirror of
https://github.com/openssl/openssl.git
synced 2024-12-28 03:13:59 +08:00
247 lines
4.3 KiB
Perl
247 lines
4.3 KiB
Perl
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#!/usr/bin/env perl
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#
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while (($output=shift) && ($output!~/\w[\w\-]*\.\w+$/)) {}
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open STDOUT,">$output";
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$code.=<<___;
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.text
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.asg B3,RA
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.global _OPENSSL_rdtsc
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_OPENSSL_rdtsc:
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.asmfunc
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B RA
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MVC TSCL,B0
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MVC TSCH,B1
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[!B0] MVC B0,TSCL ; start TSC
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MV B0,A4
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MV B1,A5
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.endasmfunc
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.global _OPENSSL_cleanse
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_OPENSSL_cleanse:
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.asmfunc
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ZERO A3:A2
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|| ZERO B2
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|| SHRU B4,3,B0 ; is length >= 8
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|| ADD 1,A4,B6
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[!B0] BNOP RA
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|| ZERO A1
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|| ZERO B1
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[B0] MVC B0,ILC
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||[!B0] CMPLT 0,B4,A1
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||[!B0] CMPLT 1,B4,B1
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[A1] STB A2,*A4++[2]
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|| [B1] STB B2,*B6++[2]
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||[!B0] CMPLT 2,B4,A1
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||[!B0] CMPLT 3,B4,B1
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[A1] STB A2,*A4++[2]
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|| [B1] STB B2,*B6++[2]
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||[!B0] CMPLT 4,B4,A1
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||[!B0] CMPLT 5,B4,B1
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[A1] STB A2,*A4++[2]
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|| [B1] STB B2,*B6++[2]
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||[!B0] CMPLT 6,B4,A1
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[A1] STB A2,*A4++[2]
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SPLOOP 1
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STNDW A3:A2,*A4++
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|| SUB B4,8,B4
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SPKERNEL
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MV B4,B0 ; remaining bytes
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|| ADD 1,A4,B6
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|| BNOP RA
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[B0] CMPLT 0,B0,A1
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|| [B0] CMPLT 1,B0,B1
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[A1] STB A2,*A4++[2]
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|| [B1] STB B2,*B6++[2]
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|| [B0] CMPLT 2,B0,A1
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|| [B0] CMPLT 3,B0,B1
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[A1] STB A2,*A4++[2]
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|| [B1] STB B2,*B6++[2]
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|| [B0] CMPLT 4,B0,A1
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|| [B0] CMPLT 5,B0,B1
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[A1] STB A2,*A4++[2]
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|| [B1] STB B2,*B6++[2]
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|| [B0] CMPLT 6,B0,A1
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[A1] STB A2,*A4++[2]
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.endasmfunc
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.global _OPENSSL_atomic_add
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_OPENSSL_atomic_add:
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.asmfunc
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MV A4,B0
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atomic_add?:
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LL *B0,B5
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NOP 4
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ADD B4,B5,B5
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SL B5,*B0
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CMTL *B0,B1
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NOP 4
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[!B1] B atomic_add?
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[B1] BNOP RA,4
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MV B5,A4
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.endasmfunc
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.global _OPENSSL_wipe_cpu
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_OPENSSL_wipe_cpu:
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.asmfunc
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ZERO A0
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|| ZERO B0
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|| ZERO A1
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|| ZERO B1
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ZERO A3:A2
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|| MVD B0,B2
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|| ZERO A4
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|| ZERO B4
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|| ZERO A5
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|| ZERO B5
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|| BNOP RA
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ZERO A7:A6
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|| ZERO B7:B6
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|| ZERO A8
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|| ZERO B8
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|| ZERO A9
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|| ZERO B9
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ZERO A17:A16
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|| ZERO B17:B16
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|| ZERO A18
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|| ZERO B18
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|| ZERO A19
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|| ZERO B19
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ZERO A21:A20
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|| ZERO B21:B20
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|| ZERO A22
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|| ZERO B22
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|| ZERO A23
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|| ZERO B23
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ZERO A25:A24
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|| ZERO B25:B24
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|| ZERO A26
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|| ZERO B26
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|| ZERO A27
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|| ZERO B27
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ZERO A29:A28
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|| ZERO B29:B28
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|| ZERO A30
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|| ZERO B30
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|| ZERO A31
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|| ZERO B31
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.endasmfunc
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CLFLUSH .macro CONTROL,ADDR,LEN
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B passthrough?
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|| STW ADDR,*CONTROL[0]
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STW LEN,*CONTROL[1]
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spinlock?:
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LDW *CONTROL[1],A0
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NOP 3
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passthrough?:
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NOP
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[A0] BNOP spinlock?,5
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.endm
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.global _OPENSSL_instrument_bus
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_OPENSSL_instrument_bus:
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.asmfunc
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MV B4,B0 ; reassign sizeof(output)
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|| MV A4,B4 ; reassign output
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|| MVK 0x00004030,A3
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MV B0,A4 ; return value
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|| MVK 1,A1
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|| MVKH 0x01840000,A3 ; L1DWIBAR
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MVC TSCL,B8 ; collect 1st tick
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|| MVK 0x00004010,A5
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MV B8,B9 ; lasttick = tick
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|| MVK 0,B7 ; lastdiff = 0
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|| MVKH 0x01840000,A5 ; L2WIBAR
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CLFLUSH A3,B4,A1 ; write-back and invalidate L1D line
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CLFLUSH A5,B4,A1 ; write-back and invalidate L2 line
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LL *B4,B5
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NOP 4
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ADD B7,B5,B5
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SL B5,*B4
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CMTL *B4,B1
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NOP 4
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STW B5,*B4
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bus_loop1?:
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MVC TSCL,B8
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|| [B0] SUB B0,1,B0
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SUB B8,B9,B7 ; lastdiff = tick - lasttick
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|| MV B8,B9 ; lasttick = tick
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CLFLUSH A3,B4,A1 ; write-back and invalidate L1D line
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CLFLUSH A5,B4,A1 ; write-back and invalidate L2 line
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LL *B4,B5
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NOP 4
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ADD B7,B5,B5
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SL B5,*B4
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CMTL *B4,B1
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STW B5,*B4 ; [!B1] is removed to flatten samples
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|| ADDK 4,B4
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|| [B0] BNOP bus_loop1?,5
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BNOP RA,5
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.endasmfunc
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.global _OPENSSL_instrument_bus2
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_OPENSSL_instrument_bus2:
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.asmfunc
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MV A6,B0 ; reassign max
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|| MV B4,A6 ; reassing sizeof(output)
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|| MVK 0x00004030,A3
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MV A4,B4 ; reassign output
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|| MVK 0,A4 ; return value
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|| MVK 1,A1
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|| MVKH 0x01840000,A3 ; L1DWIBAR
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MVC TSCL,B8 ; collect 1st tick
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|| MVK 0x00004010,A5
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MV B8,B9 ; lasttick = tick
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|| MVK 0,B7 ; lastdiff = 0
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|| MVKH 0x01840000,A5 ; L2WIBAR
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CLFLUSH A3,B4,A1 ; write-back and invalidate L1D line
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CLFLUSH A5,B4,A1 ; write-back and invalidate L2 line
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LL *B4,B5
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NOP 4
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ADD B7,B5,B5
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SL B5,*B4
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CMTL *B4,B1
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NOP 4
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STW B5,*B4
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MVC TSCL,B8 ; collect 1st diff
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SUB B8,B9,B7 ; lastdiff = tick - lasttick
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|| MV B8,B9 ; lasttick = tick
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|| SUB B0,1,B0
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bus_loop2?:
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CLFLUSH A3,B4,A1 ; write-back and invalidate L1D line
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CLFLUSH A5,B4,A1 ; write-back and invalidate L2 line
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LL *B4,B5
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NOP 4
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ADD B7,B5,B5
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SL B5,*B4
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CMTL *B4,B1
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STW B5,*B4 ; [!B1] is removed to flatten samples
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||[!B0] BNOP bus_loop2_done?,2
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|| SUB B0,1,B0
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MVC TSCL,B8
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SUB B8,B9,B8
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|| MV B8,B9
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CMPEQ B8,B7,B2
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|| MV B8,B7
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[!B2] ADDAW B4,1,B4
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||[!B2] ADDK 1,A4
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CMPEQ A4,A6,A2
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[!A2] BNOP bus_loop2?,5
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bus_loop2_done?:
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BNOP RA,5
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.endasmfunc
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___
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print $code;
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close STDOUT;
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