mirrors/openssl
0
0
Fork 0
mirror of https://github.com/openssl/openssl.git synced 2024-11-24 18:43:34 +08:00
Code Issues Packages Projects Releases Wiki Activity
4be63cfb55
openssl/crypto/x86cpuid.pl

256 lines
6.3 KiB
Perl
Raw Normal View History

Add framework for yet another assembler module dubbed "cpuid." Idea is to have a placeholder to small routines, which can be written only in assembler. In IA-32 case this includes processor capability identification and access to Time-Stamp Counter. As discussed earlier OPENSSL_ia32cap is introduced to control recently added SSE2 code pathes (see docs/crypto/OPENSSL_ia32cap.pod). For the moment the code is operational on ELF platforms only. I haven't checked it yet, but I have all reasons to believe that Windows build should fail to link too. I'll be looking into it shortly...
2004-07-27 04:18:55 +08:00
#!/usr/bin/env perl
push(@INC,"perlasm");
require "x86asm.pl";
&asm_init($ARGV[0],"x86cpuid");
Don't emit SSE2 instructions unless were asked to. PR: 1073
2005-05-18 16:42:08 +08:00
for (@ARGV) { $sse2=1 if (/-DOPENSSL_IA32_SSE2/); }
Add framework for yet another assembler module dubbed "cpuid." Idea is to have a placeholder to small routines, which can be written only in assembler. In IA-32 case this includes processor capability identification and access to Time-Stamp Counter. As discussed earlier OPENSSL_ia32cap is introduced to control recently added SSE2 code pathes (see docs/crypto/OPENSSL_ia32cap.pod). For the moment the code is operational on ELF platforms only. I haven't checked it yet, but I have all reasons to believe that Windows build should fail to link too. I'll be looking into it shortly...
2004-07-27 04:18:55 +08:00
&function_begin("OPENSSL_ia32_cpuid");
&xor ("edx","edx");
&pushf ();
&pop ("eax");
&mov ("ecx","eax");
&xor ("eax",1<<21);
&push ("eax");
&popf ();
&pushf ();
&pop ("eax");
&xor ("ecx","eax");
&bt ("ecx",21);
x86*cpuid update.
2007-07-21 22:46:27 +08:00
&jnc (&label("done"));
Update x86cpuid.pl to correctly detect shared cache and to support new RC4_set_key.
2007-04-02 01:28:08 +08:00
&xor ("eax","eax");
&cpuid ();
&xor ("eax","eax");
&cmp ("ebx",0x756e6547); # "Genu"
&setne (&LB("eax"));
&mov ("ebp","eax");
&cmp ("edx",0x49656e69); # "ineI"
&setne (&LB("eax"));
&or ("ebp","eax");
&cmp ("ecx",0x6c65746e); # "ntel"
&setne (&LB("eax"));
&or ("ebp","eax");
Add framework for yet another assembler module dubbed "cpuid." Idea is to have a placeholder to small routines, which can be written only in assembler. In IA-32 case this includes processor capability identification and access to Time-Stamp Counter. As discussed earlier OPENSSL_ia32cap is introduced to control recently added SSE2 code pathes (see docs/crypto/OPENSSL_ia32cap.pod). For the moment the code is operational on ELF platforms only. I haven't checked it yet, but I have all reasons to believe that Windows build should fail to link too. I'll be looking into it shortly...
2004-07-27 04:18:55 +08:00
&mov ("eax",1);
&cpuid ();
Update x86cpuid.pl to correctly detect shared cache and to support new RC4_set_key.
2007-04-02 01:28:08 +08:00
&cmp ("ebp",0);
x86*cpuid update.
2007-07-21 22:46:27 +08:00
&jne (&label("notP4"));
&and (&HB("eax"),15); # familiy ID
&cmp (&HB("eax"),15); # P4?
&jne (&label("notP4"));
Update x86cpuid.pl to correctly detect shared cache and to support new RC4_set_key.
2007-04-02 01:28:08 +08:00
&or ("edx",1<<20); # use reserved bit to engage RC4_CHAR
x86*cpuid update.
2007-07-21 22:46:27 +08:00
&set_label("notP4");
&bt ("edx",28); # test hyper-threading bit
&jnc (&label("done"));
Update x86cpuid.pl to correctly detect shared cache and to support new RC4_set_key.
2007-04-02 01:28:08 +08:00
&shr ("ebx",16);
&cmp (&LB("ebx"),1); # see if cache is shared(*)
x86*cpuid update.
2007-07-21 22:46:27 +08:00
&ja (&label("done"));
x86cpuid fixes. PR: 1526
2007-05-20 01:52:51 +08:00
&and ("edx",0xefffffff); # clear hyper-threading bit if not
x86*cpuid update.
2007-07-21 22:46:27 +08:00
&set_label("done");
Add framework for yet another assembler module dubbed "cpuid." Idea is to have a placeholder to small routines, which can be written only in assembler. In IA-32 case this includes processor capability identification and access to Time-Stamp Counter. As discussed earlier OPENSSL_ia32cap is introduced to control recently added SSE2 code pathes (see docs/crypto/OPENSSL_ia32cap.pod). For the moment the code is operational on ELF platforms only. I haven't checked it yet, but I have all reasons to believe that Windows build should fail to link too. I'll be looking into it shortly...
2004-07-27 04:18:55 +08:00
&mov ("eax","edx");
&mov ("edx","ecx");
&function_end("OPENSSL_ia32_cpuid");
Update x86cpuid.pl to correctly detect shared cache and to support new RC4_set_key.
2007-04-02 01:28:08 +08:00
# (*) on Core2 this value is set to 2 denoting the fact that L2
# cache is shared between cores.
Add framework for yet another assembler module dubbed "cpuid." Idea is to have a placeholder to small routines, which can be written only in assembler. In IA-32 case this includes processor capability identification and access to Time-Stamp Counter. As discussed earlier OPENSSL_ia32cap is introduced to control recently added SSE2 code pathes (see docs/crypto/OPENSSL_ia32cap.pod). For the moment the code is operational on ELF platforms only. I haven't checked it yet, but I have all reasons to believe that Windows build should fail to link too. I'll be looking into it shortly...
2004-07-27 04:18:55 +08:00
OPENSSL_ia32cap final touches. Note that OPENSSL_ia32cap is no longer a symbol, but a macro expanded as (*(OPENSSL_ia32cap_loc())). The latter is the only one to be exported to application.
2004-08-30 00:36:05 +08:00
&external_label("OPENSSL_ia32cap_P");
Add framework for yet another assembler module dubbed "cpuid." Idea is to have a placeholder to small routines, which can be written only in assembler. In IA-32 case this includes processor capability identification and access to Time-Stamp Counter. As discussed earlier OPENSSL_ia32cap is introduced to control recently added SSE2 code pathes (see docs/crypto/OPENSSL_ia32cap.pod). For the moment the code is operational on ELF platforms only. I haven't checked it yet, but I have all reasons to believe that Windows build should fail to link too. I'll be looking into it shortly...
2004-07-27 04:18:55 +08:00
OPENSSL_ia32cap final touches. Note that OPENSSL_ia32cap is no longer a symbol, but a macro expanded as (*(OPENSSL_ia32cap_loc())). The latter is the only one to be exported to application.
2004-08-30 00:36:05 +08:00
&function_begin_B("OPENSSL_rdtsc","EXTRN\t_OPENSSL_ia32cap_P:DWORD");
Add framework for yet another assembler module dubbed "cpuid." Idea is to have a placeholder to small routines, which can be written only in assembler. In IA-32 case this includes processor capability identification and access to Time-Stamp Counter. As discussed earlier OPENSSL_ia32cap is introduced to control recently added SSE2 code pathes (see docs/crypto/OPENSSL_ia32cap.pod). For the moment the code is operational on ELF platforms only. I haven't checked it yet, but I have all reasons to believe that Windows build should fail to link too. I'll be looking into it shortly...
2004-07-27 04:18:55 +08:00
&xor ("eax","eax");
&xor ("edx","edx");
OPENSSL_ia32cap final touches. Note that OPENSSL_ia32cap is no longer a symbol, but a macro expanded as (*(OPENSSL_ia32cap_loc())). The latter is the only one to be exported to application.
2004-08-30 00:36:05 +08:00
&picmeup("ecx","OPENSSL_ia32cap_P");
Add framework for yet another assembler module dubbed "cpuid." Idea is to have a placeholder to small routines, which can be written only in assembler. In IA-32 case this includes processor capability identification and access to Time-Stamp Counter. As discussed earlier OPENSSL_ia32cap is introduced to control recently added SSE2 code pathes (see docs/crypto/OPENSSL_ia32cap.pod). For the moment the code is operational on ELF platforms only. I haven't checked it yet, but I have all reasons to believe that Windows build should fail to link too. I'll be looking into it shortly...
2004-07-27 04:18:55 +08:00
&bt (&DWP(0,"ecx"),4);
&jnc (&label("notsc"));
&rdtsc ();
&set_label("notsc");
&ret ();
&function_end_B("OPENSSL_rdtsc");
x86 assembler updates: more instructions, new OPENSSL_instrument_halt [for DJGPP]...
2004-09-09 22:50:32 +08:00
# This works in Ring 0 only [read DJGPP+MS-DOS+privileged DPMI host],
# but it's safe to call it on any [supported] 32-bit platform...
# Just check for [non-]zero return value...
&function_begin_B("OPENSSL_instrument_halt","EXTRN\t_OPENSSL_ia32cap_P:DWORD");
&picmeup("ecx","OPENSSL_ia32cap_P");
&bt (&DWP(0,"ecx"),4);
&jnc (&label("nohalt")); # no TSC
&data_word(0x9058900e); # push %cs; pop %eax
&and ("eax",3);
&jnz (&label("nohalt")); # not enough privileges
&pushf ();
&pop ("eax")
&bt ("eax",9);
&jnc (&label("nohalt")); # interrupts are disabled
&rdtsc ();
&push ("edx");
&push ("eax");
&halt ();
&rdtsc ();
&sub ("eax",&DWP(0,"esp"));
&sbb ("edx",&DWP(4,"esp"));
&add ("esp",8);
&ret ();
&set_label("nohalt");
&xor ("eax","eax");
&xor ("edx","edx");
&ret ();
&function_end_B("OPENSSL_instrument_halt");
Cpuid modules updates.
2005-05-04 05:05:06 +08:00
# Essentially there is only one use for this function. Under DJGPP:
#
# #include <go32.h>
# ...
# i=OPENSSL_far_spin(_dos_ds,0x46c);
# ...
# to obtain the number of spins till closest timer interrupt.
&function_begin_B("OPENSSL_far_spin");
&pushf ();
&pop ("eax")
&bt ("eax",9);
&jnc (&label("nospin")); # interrupts are disabled
&mov ("eax",&DWP(4,"esp"));
&mov ("ecx",&DWP(8,"esp"));
&data_word (0x90d88e1e); # push %ds, mov %eax,%ds
&xor ("eax","eax");
&mov ("edx",&DWP(0,"ecx"));
&jmp (&label("spin"));
&align (16);
&set_label("spin");
&inc ("eax");
&cmp ("edx",&DWP(0,"ecx"));
&je (&label("spin"));
&data_word (0x1f909090); # pop %ds
&ret ();
&set_label("nospin");
&xor ("eax","eax");
&xor ("edx","edx");
&ret ();
&function_end_B("OPENSSL_far_spin");
&function_begin_B("OPENSSL_wipe_cpu","EXTRN\t_OPENSSL_ia32cap_P:DWORD");
&xor ("eax","eax");
&xor ("edx","edx");
&picmeup("ecx","OPENSSL_ia32cap_P");
&mov ("ecx",&DWP(0,"ecx"));
&bt (&DWP(0,"ecx"),1);
&jnc (&label("no_x87"));
Don't emit SSE2 instructions unless were asked to. PR: 1073
2005-05-18 16:42:08 +08:00
if ($sse2) {
&bt (&DWP(0,"ecx"),26);
&jnc (&label("no_sse2"));
&pxor ("xmm0","xmm0");
&pxor ("xmm1","xmm1");
&pxor ("xmm2","xmm2");
&pxor ("xmm3","xmm3");
&pxor ("xmm4","xmm4");
&pxor ("xmm5","xmm5");
&pxor ("xmm6","xmm6");
&pxor ("xmm7","xmm7");
&set_label("no_sse2");
}
Replace emms with finit in x86cpuid.
2005-06-25 00:32:10 +08:00
# just a bunch of fldz to zap the fp/mm bank followed by finit...
&data_word(0xeed9eed9,0xeed9eed9,0xeed9eed9,0xeed9eed9,0x90e3db9b);
Cpuid modules updates.
2005-05-04 05:05:06 +08:00
&set_label("no_x87");
&lea ("eax",&DWP(4,"esp"));
&ret ();
&function_end_B("OPENSSL_wipe_cpu");
&function_begin_B("OPENSSL_atomic_add");
&mov ("edx",&DWP(4,"esp")); # fetch the pointer, 1st arg
&mov ("ecx",&DWP(8,"esp")); # fetch the increment, 2nd arg
&push ("ebx");
&nop ();
&mov ("eax",&DWP(0,"edx"));
&set_label("spin");
&lea ("ebx",&DWP(0,"eax","ecx"));
&nop ();
&data_word(0x1ab10ff0); # lock; cmpxchg %ebx,(%edx) # %eax is envolved and is always reloaded
&jne (&label("spin"));
&mov ("eax","ebx"); # OpenSSL expects the new value
&pop ("ebx");
&ret ();
&function_end_B("OPENSSL_atomic_add");
x86cpuid.pl update.
2005-12-03 19:56:55 +08:00
# This function can become handy under Win32 in situations when
# we don't know which calling convention, __stdcall or __cdecl(*),
# indirect callee is using. In C it can be deployed as
#
#ifdef OPENSSL_CPUID_OBJ
# type OPENSSL_indirect_call(void *f,...);
# ...
# OPENSSL_indirect_call(func,[up to $max arguments]);
#endif
#
# (*) it's designed to work even for __fastcall if number of
# arguments is 1 or 2!
&function_begin_B("OPENSSL_indirect_call");
{
my $i,$max=7; # $max has to be chosen as 4*n-1
# in order to preserve eventual
# stack alignment
&push ("ebp");
&mov ("ebp","esp");
&sub ("esp",$max*4);
&mov ("ecx",&DWP(12,"ebp"));
&mov (&DWP(0,"esp"),"ecx");
&mov ("edx",&DWP(16,"ebp"));
&mov (&DWP(4,"esp"),"edx");
for($i=2;$i<$max;$i++)
{
# Some copies will be redundant/bogus...
&mov ("eax",&DWP(12+$i*4,"ebp"));
&mov (&DWP(0+$i*4,"esp"),"eax");
}
Support for indirect calls in x86 assembler modules.
2005-12-07 02:43:59 +08:00
&call_ptr (&DWP(8,"ebp"));# make the call...
x86cpuid.pl update.
2005-12-03 19:56:55 +08:00
&mov ("esp","ebp"); # ... and just restore the stack pointer
# without paying attention to what we called,
# (__cdecl *func) or (__stdcall *one).
&pop ("ebp");
&ret ();
}
&function_end_B("OPENSSL_indirect_call");
Profiling revealed that OPENSSL_cleanse consumes *more* CPU time than sha1_block_data_order when hashing short messages. Move OPENSSL_cleanse to "cpuid" assembler module and gain 2x.
2007-05-15 05:35:25 +08:00
&function_begin_B("OPENSSL_cleanse");
&mov ("edx",&wparam(0));
&mov ("ecx",&wparam(1));
&xor ("eax","eax");
&cmp ("ecx",7);
&jae (&label("lot"));
&set_label("little");
&mov (&BP(0,"edx"),"al");
&sub ("ecx",1);
&lea ("edx",&DWP(1,"edx"));
&jnz (&label("little"));
&ret ();
&set_label("lot",16);
&test ("edx",3);
&jz (&label("aligned"));
&mov (&BP(0,"edx"),"al");
&lea ("ecx",&DWP(-1,"ecx"));
&lea ("edx",&DWP(1,"edx"));
&jmp (&label("lot"));
&set_label("aligned");
&mov (&DWP(0,"edx"),"eax");
&lea ("ecx",&DWP(-4,"ecx"));
&test ("ecx",-4);
&lea ("edx",&DWP(4,"edx"));
&jnz (&label("aligned"));
&cmp ("ecx",0);
&jne (&label("little"));
&ret ();
&function_end_B("OPENSSL_cleanse");
OPENSSL_ia32cap final touches. Note that OPENSSL_ia32cap is no longer a symbol, but a macro expanded as (*(OPENSSL_ia32cap_loc())). The latter is the only one to be exported to application.
2004-08-30 00:36:05 +08:00
&initseg("OPENSSL_cpuid_setup");
Add framework for yet another assembler module dubbed "cpuid." Idea is to have a placeholder to small routines, which can be written only in assembler. In IA-32 case this includes processor capability identification and access to Time-Stamp Counter. As discussed earlier OPENSSL_ia32cap is introduced to control recently added SSE2 code pathes (see docs/crypto/OPENSSL_ia32cap.pod). For the moment the code is operational on ELF platforms only. I haven't checked it yet, but I have all reasons to believe that Windows build should fail to link too. I'll be looking into it shortly...
2004-07-27 04:18:55 +08:00
&asm_finish();
Reference in New Issue Copy Permalink