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[rk_venc_cmd]: Change h264 codec cfg

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1. Remove slice mode/arg in H.264 codec cfg.
2. Add max long-term reference number / max temporal layer id / prefix
mode / base layer priority id.

Signed-off-by: Herman Chen <herman.chen@rock-chips.com>
Change-Id: If34166e4658edba65f4c6c095412a6fadd941320
This commit is contained in:
Herman Chen 2020-07-08 16:22:20 +08:00
parent 7f4ebeec8e
commit f654f1a0ad
7 changed files with 21 additions and 23 deletions
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18
inc/rk_venc_cmd.h
View File

@ -511,8 +511,14 @@ typedef enum MppEncH264CfgChange_e {
MPP_ENC_H264_CFG_CHANGE_QP_LIMIT = (1 << 16),
/* change on intra_refresh_mode / intra_refresh_arg */
MPP_ENC_H264_CFG_CHANGE_INTRA_REFRESH = (1 << 17),
/* change on slice_mode / slice_arg */
MPP_ENC_H264_CFG_CHANGE_SLICE_MODE = (1 << 18),
/* change on max long-term reference frame count */
MPP_ENC_H264_CFG_CHANGE_MAX_LTR = (1 << 18),
/* change on max temporal id */
MPP_ENC_H264_CFG_CHANGE_MAX_TID = (1 << 19),
/* change on adding prefix nal */
MPP_ENC_H264_CFG_CHANGE_ADD_PREFIX = (1 << 20),
/* change on base layer priority id */
MPP_ENC_H264_CFG_CHANGE_BASE_LAYER_PID = (1 << 21),
/* change on vui */
MPP_ENC_H264_CFG_CHANGE_VUI = (1 << 28),
@ -635,9 +641,11 @@ typedef struct MppEncH264Cfg_t {
RK_S32 intra_refresh_mode;
RK_S32 intra_refresh_arg;
/* slice mode config */
RK_S32 slice_mode;
RK_S32 slice_arg;
/* extra mode config */
RK_S16 max_ltr_frames;
RK_S16 max_tid;
RK_S16 prefix_mode;
RK_S16 base_layer_pid;
/* extra info */
MppEncH264VuiCfg vui;

4
mpp/base/mpp_enc_cfg.cpp
View File

@ -191,6 +191,10 @@ static const char *cfg_func_names[] = {
ENTRY(h264, qp_max_i, S32, RK_S32, MPP_ENC_H264_CFG_CHANGE_QP_LIMIT, codec.h264, qp_max) \
ENTRY(h264, qp_min_i, S32, RK_S32, MPP_ENC_H264_CFG_CHANGE_QP_LIMIT, codec.h264, qp_min) \
ENTRY(h264, qp_step, S32, RK_S32, MPP_ENC_H264_CFG_CHANGE_QP_LIMIT, codec.h264, qp_max_step) \
ENTRY(h264, max_tid, S32, RK_S32, MPP_ENC_H264_CFG_CHANGE_MAX_TID, codec.h264, max_tid) \
ENTRY(h264, max_ltr, S32, RK_S32, MPP_ENC_H264_CFG_CHANGE_MAX_LTR, codec.h264, max_ltr_frames) \
ENTRY(h264, prefix_mode, S32, RK_S32, MPP_ENC_H264_CFG_CHANGE_ADD_PREFIX, codec.h264, prefix_mode) \
ENTRY(h264, base_layer_pid, S32, RK_S32, MPP_ENC_H264_CFG_CHANGE_BASE_LAYER_PID, codec.h264, base_layer_pid) \
/* h265 config*/ \
ENTRY(h265, profile, S32, RK_S32, MPP_ENC_H265_CFG_PROFILE_LEVEL_TILER_CHANGE, codec.h265, profile) \
ENTRY(h265, level, S32, RK_S32, MPP_ENC_H265_CFG_PROFILE_LEVEL_TILER_CHANGE, codec.h265, level) \

4
mpp/codec/enc/h264/h264e_api_v2.c
View File

@ -384,10 +384,6 @@ static MPP_RET h264e_proc_h264_cfg(MppEncH264Cfg *dst, MppEncH264Cfg *src)
dst->intra_refresh_mode = src->intra_refresh_mode;
dst->intra_refresh_arg = src->intra_refresh_arg;
}
if (change & MPP_ENC_H264_CFG_CHANGE_SLICE_MODE) {
dst->slice_mode = src->slice_mode;
dst->slice_arg = src->slice_arg;
}
if (change & MPP_ENC_H264_CFG_CHANGE_VUI) {
dst->vui = src->vui;
}

6
mpp/hal/common/h264/hal_h264e_api.c
View File

@ -108,8 +108,10 @@ static MPP_RET hal_h264e_init(void *hal, MppHalCfg *cfg)
h264->qp_max_step = 8;
h264->intra_refresh_mode = 0;
h264->intra_refresh_arg = 0;
h264->slice_mode = 0;
h264->slice_arg = 0;
h264->max_ltr_frames = 0;
h264->max_tid = 0;
h264->prefix_mode = 0;
h264->base_layer_pid = 0;
h264->vui.change = 0;
vui->b_vui = 1;

4
mpp/hal/rkenc/h264e/hal_h264e_rkv.c
View File

@ -1905,10 +1905,6 @@ MPP_RET hal_h264e_rkv_control(void *hal, MpiCmd cmd_type, void *param)
dst->intra_refresh_mode = src->intra_refresh_mode;
dst->intra_refresh_arg = src->intra_refresh_arg;
}
if (change & MPP_ENC_H264_CFG_CHANGE_SLICE_MODE) {
dst->slice_mode = src->slice_mode;
dst->slice_arg = src->slice_arg;
}
if (change & MPP_ENC_H264_CFG_CHANGE_VUI) {
dst->vui = src->vui;
}

4
mpp/hal/vpu/h264e/hal_h264e_vepu1.c
View File

@ -731,10 +731,6 @@ MPP_RET hal_h264e_vepu1_control(void *hal, MpiCmd cmd_type, void *param)
dst->intra_refresh_mode = src->intra_refresh_mode;
dst->intra_refresh_arg = src->intra_refresh_arg;
}
if (change & MPP_ENC_H264_CFG_CHANGE_SLICE_MODE) {
dst->slice_mode = src->slice_mode;
dst->slice_arg = src->slice_arg;
}
if (change & MPP_ENC_H264_CFG_CHANGE_VUI) {
dst->vui = src->vui;
}

4
mpp/hal/vpu/h264e/hal_h264e_vepu2.c
View File

@ -761,10 +761,6 @@ MPP_RET hal_h264e_vepu2_control(void *hal, MpiCmd cmd_type, void *param)
dst->intra_refresh_mode = src->intra_refresh_mode;
dst->intra_refresh_arg = src->intra_refresh_arg;
}
if (change & MPP_ENC_H264_CFG_CHANGE_SLICE_MODE) {
dst->slice_mode = src->slice_mode;
dst->slice_arg = src->slice_arg;
}
if (change & MPP_ENC_H264_CFG_CHANGE_VUI) {
dst->vui = src->vui;
}