Commit Graph

197900 Commits

Author SHA1 Message Date
Sagar Ghuge
e5776bcb39 blorp: Use the calculated execution mask
Instead of setting execution mask to 0xFFFFFFFF, use the previously
calculated execution mask.

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30474>
2024-11-18 04:42:52 +00:00
Brad Smith
67333c2632 util: Support elf_aux_info() on OpenBSD arm and ppc
Signed-off-by: Brad Smith <brad@comstyle.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31102>
2024-11-18 01:03:28 +00:00
Jianxun Zhang
8db71c95e1 isl: Move a CCS restriction in GFX 12.x
3D+MSAA is not supported and depth-stencil formats are all
32bpp or less. Move this restriction into single-sample
case.

Suggested-by: Nanley Chery <nanley.g.chery@intel.com>
Signed-off-by: Jianxun Zhang <jianxun.zhang@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31496>
2024-11-17 22:41:56 +00:00
Jianxun Zhang
ab56a9eecd isl: Allow CCS in more cases (xe2)
By restricting these limitations up to GFX 12, CCS support
can be present on these cases that we think Xe2+ platform
should support compression.

Noticeably, CCS is allowed on depth resources without HiZ,
multi-sampled resources without CCS, and multi-sampled
stencil resources.

Signed-off-by: Jianxun Zhang <jianxun.zhang@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31496>
2024-11-17 22:41:56 +00:00
Jianxun Zhang
dc70e2d556 iris: Allow compression on multi-sampled stencil (xe2)
Two aux functions are updated to fix piglit test once CCS is enabled on
multi-sampled stencil resources in a following change. As reviewers
suggested, we don't see much value of the assertion.
https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31496#note_2601233

Piglit test:
fbo-depthstencil blit default_fb -samples=16 -auto

iris_resolve.c:972: iris_resource_get_aux_state: Assertion
`res->surf.samples == 1 || res->surf.msaa_layout == ISL_MSAA_LAYOUT_ARRAY' failed.

iris_resolve.c:996: iris_resource_set_aux_state: Assertion
`res->surf.samples == 1 || res->surf.msaa_layout == ISL_MSAA_LAYOUT_ARRAY' failed.

Signed-off-by: Jianxun Zhang <jianxun.zhang@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31496>
2024-11-17 22:41:55 +00:00
Jianxun Zhang
705555b6b0 isl: Refactor WA 22015614752
Using intel_needs_workaround() within a block of GFX version
checker requires extra carefulness on the road because both
of them specify a range of applicable platforms. The WA block
can be unexpectedly skipped once the GFX version checker gets
updated later.

Moving the WA implementation out of the GFX block to decouple
them for more clarity and less chance of messing up next time.

Signed-off-by: Jianxun Zhang <jianxun.zhang@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31496>
2024-11-17 22:41:55 +00:00
Tomeu Vizoso
4d23156127 teflon/docs: Clarify smoke test instructions
Some improvements suggested by users.

Suggested-by: Jeffrey Hugo <quic_jhugo@quicinc.com>
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32168>
2024-11-17 09:47:41 +00:00
Tomeu Vizoso
778ca0824f teflon/docs: Add i.MX8MP to list of supported NPUs
It's working now!

Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32168>
2024-11-17 09:47:41 +00:00
Tomeu Vizoso
5adb9d03ae teflon/docs: Update performance measurements on LibreComputer Alta
We got faster!

Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32168>
2024-11-17 09:47:41 +00:00
Marek Olšák
a37c8b4e7c radeonsi/ci: update navi31 failures
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32171>
2024-11-16 22:01:06 -05:00
Marek Olšák
8deb32ac2e radeonsi: split outputs_written_before_tes_gs into ls_es_* and tcs_* masks
these will have different values later

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32171>
2024-11-16 21:59:29 -05:00
Marek Olšák
1d16d88e1e radeonsi: set *outputs_written in scan_io_usage instead of later
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32171>
2024-11-16 21:59:25 -05:00
Marek Olšák
3f6bc3e58d radeonsi: remove unused si_shader_info::output_readmask
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32171>
2024-11-16 21:59:21 -05:00
Marek Olšák
b10bb9f0ba radeonsi: don't set tess level outputs in patch_outputs_written unconditionally
It doesn't do anything. The tess level outputs that are actually written are
set just below that.

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32171>
2024-11-16 21:59:17 -05:00
Marek Olšák
3a9e7e1e82 radeonsi: remove unused function si_get_tcs_out_patch_stride
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32171>
2024-11-16 21:59:13 -05:00
Marek Olšák
25ac573140 radeonsi: reduce si_shader_key_ge::tes_prim_mode size to 2 bits
enum tess_primitive_mode has only 4 values.

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32171>
2024-11-16 21:59:10 -05:00
Marek Olšák
a00ed96585 radeonsi: replace are_tessfactors_def_in_all_invocs with nir_gather_tcs_info
This is now in common code.

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32171>
2024-11-16 21:59:06 -05:00
Marek Olšák
702982d399 radeonsi: get the value for load_tcs_primitive_mode_amd from shader info
This is possible thanks to the commit:
    "st/mesa: copy some TES shader info fields to TCS".

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32171>
2024-11-16 21:59:00 -05:00
Marek Olšák
e28e05ffe4 radeonsi: don't overwrite info.tess._primitive mode when it can be correct
The linker now sets TCS info to match TES, and the key can contain 0
if it's not optimized.

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32171>
2024-11-16 21:58:56 -05:00
Marek Olšák
3570edeae2 radeonsi: fix passing TCS wave ID from LS to HS for monolithic LS+HS
required by the new HS shader message code

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32171>
2024-11-16 21:58:34 -05:00
Marek Olšák
a7ba36f589 ac/nir: get pass_tessfactors_by_reg from nir_gather_tcs_info
If nir_tcs_info::all_invocations_define_tess_levels is true, the pass
doesn't have to insert a barrier and use output loads to get tess level
output values. It can just use the SSA defs that are being stored (or phis
thereof) to get the tess level output values.

The remaining tcs_info fields will be used by the HS shader message.

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32171>
2024-11-16 21:58:29 -05:00
Marek Olšák
b258a9aa4e aco: remove unused TCS fields from aco_shader_info
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32171>
2024-11-16 21:58:26 -05:00
Eric Engestrom
985285f30a v3dv/ci: mark whole group as flaky
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32162>
2024-11-16 21:50:39 +00:00
Matt Turner
3d24f0ece1 vulkan: Avoid pointer aliasing
Avoids the sanitizer errors:

```
Test case 'dEQP-VK.pipeline.monolithic.spec_constant.graphics.vertex.basic.mixed_packed'..
../src/vulkan/util/vk_util.c:111:38: runtime error: load of misaligned address 0x603002b1c591 for type 'const uint16_t', which requires 2 byte alignment
0x603002b1c591: note: pointer points here
 00 00 00  98 76 98 54 76 98 ba 10  32 54 76 98 ba dc fe ff  ff ff ff ff ff ff ff ff  ff ff ff ff ff
              ^
../src/vulkan/util/vk_util.c:108:38: runtime error: load of misaligned address 0x603002b1c593 for type 'const uint32_t', which requires 4 byte alignment
0x603002b1c593: note: pointer points here
 00  98 76 98 54 76 98 ba 10  32 54 76 98 ba dc fe ff  ff ff ff ff ff ff ff ff  ff ff ff ff ff ff ff
              ^
../src/vulkan/util/vk_util.c:105:38: runtime error: load of misaligned address 0x603002b1c597 for type 'const uint64_t', which requires 8 byte alignment
0x603002b1c597: note: pointer points here
 54 76 98 ba 10  32 54 76 98 ba dc fe ff  ff ff ff ff ff ff ff ff  ff ff ff ff ff ff ff ff  03 11 00
             ^
```

Fixes: 476dc3c050 ("vulkan: add vk_spec_info_to_nir_spirv util method")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32159>
2024-11-16 03:14:31 +00:00
Eric Engestrom
ad4e5538ba ci/crosvm: remove noise inside deqp-runner output
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32156>
2024-11-15 20:24:17 +00:00
Pavel Ondračka
8d3f2d2c23 r300: group KIL for R300/R400
Separate KIL counts to the indirection limit, so try to schedule it
within the TEX block on R300/R400, except for small shaders, where we
already know we are fine.

42 gained shaders on R400 (40 Trine and 2 This war of mine) at the
expense of some increase in register pressure.

shader-db:
total temps in shared programs: 18107 -> 18129 (0.12%)
temps in affected programs: 262 -> 284 (8.40%)
helped: 0
HURT: 22

Signed-off-by: Pavel Ondračka <pavel.ondracka@gmail.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32023>
2024-11-15 18:02:55 +00:00
Tomeu Vizoso
6cdfc2d51c teflon: Add files mentioned in the docs for image classification
It is an easy way to check that the installation works and is in a
useful state.

The Python script is based on a example in the TensorFlow repository at:

tensorflow/lite/examples/python/label_image.py

The labels file is distributed by Google along the MobileNetV1 model
that we already have. These files are released under the Apache
license.

Reported-by: Jeffrey Hugo <quic_jhugo@quicinc.com>
Reviewed-by: Jeffrey Hugo <quic_jhugo@quicinc.com>
Tested-by: Jeffrey Hugo <quic_jhugo@quicinc.com>
Acked-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31860>
2024-11-15 17:24:19 +00:00
Tomeu Vizoso
3f096c6995 etnaviv/ml: Support addition operations on V8
The proprietary driver on V8 uses a different way of lowering the
addition to a convolution that seems to be faster.

Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32105>
2024-11-15 16:41:05 +00:00
Tomeu Vizoso
eaecd0ffd6 etnaviv/ml: Adapt to changes in teflon regarding multiple inputs
The Gallium API that Teflon uses now supports a variable number of
inputs per operation.

Adapt to this change without any change in functionality.

Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32105>
2024-11-15 16:41:05 +00:00
Tomeu Vizoso
986f8c7ff2 teflon: Support multiple graph inputs and outputs
Operations other than tensor addition will also need to be able to
handle multiple inputs, and a variable number of them.

And for testing individual operations, we also need to support models
with multiple inputs.

Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32105>
2024-11-15 16:41:04 +00:00
Boris Brezillon
c0f47b12fc panvk/cs: Poison cmdbuf registers when PANVK_DEBUG=cs is set
Poison all cmdbuf registers to make sure we don't inherit state from
a previously executed cmdbuf.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31911>
2024-11-15 16:00:25 +00:00
Boris Brezillon
c3ff3f2405 panvk/csf: Fix a wait-LS operation in finish_cs()
cs_wait_slots() expects a mask, cs_wait_slot() a slot ID.

Fixes: 5544d39f44 ("panvk: Add a CSF backend for panvk_queue/cmd_buffer")
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31911>
2024-11-15 16:00:25 +00:00
Boris Brezillon
b9eed7a0d4 panvk: Cache the fs_required() result
get_fs() (and thus fs_required()) is called enough times during a draw
that it makes sense to cache the value in the graphics state instead of
calling fs_required() repeatedly.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31911>
2024-11-15 16:00:25 +00:00
Boris Brezillon
fd497b2278 panvk: Move common gfx bits to a new source file in the common dir
Keeping those distinct makes it hard to maintain (fixes hitting one
version but not the other). Let's make it common code and guard CSF/JM
specific code under #if PAN_ARCH blocks.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31911>
2024-11-15 16:00:25 +00:00
Boris Brezillon
79e5146378 panvk: Sanitize the driver-internal dirty state tracking
Coalesce all the dirty bits into a single bitset, and use dirty bits for
stuff that were already tracked through NULL GPU pointers.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31911>
2024-11-15 16:00:25 +00:00
Boris Brezillon
8b70f66440 panvk: Don't link the VS and FS shaders on v10
When IDVS+malloc is used, there's no linking involved (getting the
VS and FS shaders to agree on the varyings attributes), so we can
purely and simply skip this phase.

If we ever have to support the non-malloc or non-IDVS case, we'll need
to revisit the linking logic anyway, so let's kill the linking on v10
for now.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31911>
2024-11-15 16:00:25 +00:00
Boris Brezillon
b07fd26211 panvk: Move is_dirty() to panvk_cmd_draw.h and rename it
We're about to bitset-based driver-internal dirty state tracking, and
we'll need to define new xx_is_dirty() macros, so let's rename the
existing one dyn_gfx_state_dirty() to avoid the confusion, and move it
to panvk_cmd_draw.h, since it's the same for JM and CSF.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31911>
2024-11-15 16:00:25 +00:00
Boris Brezillon
b304a0c49b panvk: Move panvk_cmd_compute_state to a common place
panvk_cmd_compute_state is exactly the same in JM and CSF, so let's move
it to a common place.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31911>
2024-11-15 16:00:25 +00:00
Boris Brezillon
b67b350b4c panvk: Move the panvk_cmd_graphics_state definition to panvk_cmd_draw.h
Those structs are almost the same on JM and CSF, so let's move them to a
common place and use #ifdef sections for fields that only apply to
CSF or JM.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31911>
2024-11-15 16:00:25 +00:00
Boris Brezillon
f211e5f9c5 panvk: Kill unused fields in panvk_cmd_graphics_state
Some fields are never used, others are set but never checked.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31911>
2024-11-15 16:00:25 +00:00
Boris Brezillon
8a5814b456 panvk: Change the prototype of panvk_select_tiler_hierarchy_mask()
We're going to put the panvk_cmd_graphics_state definition to
panvk_cmd_draw.h, which involves including panvk_cmd_draw.h from
panvk_cmd_buffer.h, which in turn means we can't include
panvk_cmd_buffer.h from panvk_cmd_draw.h.

Kill the circular inclusion by changing the prototype of
panvk_select_tiler_hierarchy_mask() to take a panvk_physical_device
and a panvk_cmd_graphics_state instead of a panvk_cmd_buffer oject.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31911>
2024-11-15 16:00:25 +00:00
Tomeu Vizoso
f6c3544392 etnaviv/ml: Zero all BOs
A few bugs due to uninitialized buffers have cropped up. For now let's
zero them all and see if we want to do something else when we get
concerned about compilation times.

Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32104>
2024-11-15 15:35:32 +00:00
Karol Herbst
a5149f3fef rusticl/kernel: fix kernel variant selection
Apparently I messed up enough so that the optimized kernel variant was
almost never selected.

This fixes that :)

Fixes: f098620c21 ("rusticl/kernel: add optimized Kernel variant")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32139>
2024-11-15 14:21:36 +00:00
Lars-Ivar Hesselberg Simonsen
0291f62c6a panvk: update expectations for G610
The prior commit fixed various dEQP-VK.*.suballocation.multisample*
tests.

Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32155>
2024-11-15 13:03:10 +01:00
Lars-Ivar Hesselberg Simonsen
595019526d panvk: Add frag->frag barrier before resolve
As resolve is implemented as a separate renderpass, we'll need to add a
frag->frag barrier before executing it.

Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32155>
2024-11-15 13:03:07 +01:00
Corentin Noël
a7c8677241 virgl: Simply loop over the resources to figure-out if it is already added
There is not that many resources added to a command buffer to justify the resource
id being cached.

Signed-off-by: Corentin Noël <corentin.noel@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32134>
2024-11-15 11:33:52 +00:00
Robert Mader
758941ab0c v3d: Support SAND128 base modifier
The BROADCOM_SAND128 modifier is usually used with an extra parameter
to pass in the stride via a side channel. Quoting from drm_fourcc.h:
> The pitch between the start of each column is set to optimally
> switch between SDRAM banks. This is passed as the number of lines
> of column width in the modifier (we can't use the stride value due
> to various core checks that look at it , so you should set the
> stride to width*cpp).

So apparently this is just a workaround for limitations in some kernel
APIs. DRM modifiers, however, are arguably a bad fit for extra
parameters that aren't known in advance. In the Wayland/KMS ecosystem
many components depend on being able to treat modifiers as opaque, e.g.
for negotiations etc. In practice the current approach requires various
software components to manually use the
`DRM_FORMAT_MOD_BROADCOM_SAND128_COL_HEIGHT()` macro - using the
`DRM_FORMAT_MOD_BROADCOM_SAND128` modifier directly with formats like
`NV12` results in a rejection in the KMS driver and corrupted output
in Mesa (because we'd bail out early in `v3d_sand8_blit()`).

Fortunately the stride check limitations mentioned above don't seem to
apply to Mesa though. Thus we can just add support for the base modifier
and stride (coming from V4L2), allowing various toolkits, Wayland
compositors and V4L2 decoder implementations to support e.g.
`NV12` + `DRM_FORMAT_MOD_BROADCOM_SAND128` (`NC12` in V4L2) in a generic
way.

Notes:
1. Wayland compositors trying to offload composition to KMS will still
fail when doing a test commit.
2. There is another limitation - in the V4L2 MPLANE API - that
requires userspace to know the correct offset of the second plane. That's
a known API limitation though and only affects V4L2 decoder implementations.

Cc: mesa-stable
Signed-off-by: Robert Mader <robert.mader@collabora.com>
Reviewed-by: Jose Maria Casanova Crespo <jmcasanova@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32033>
2024-11-15 11:09:02 +00:00
Jose Maria Casanova Crespo
808ae13042 rpi4/ci: another detected flaky timeline_semaphore test
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32154>
2024-11-15 10:48:54 +00:00
John Anthony
eb84f1e61f panvk: Enable storageBuffer16BitAccess
This is a mandatory feature if VK_KHR_16bit_storage is enabled.

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32138>
2024-11-15 10:28:08 +00:00
Sam Lantinga
4ed8ef74b4 util: Fixed crash in HEVC encoding on 32-bit systems
This builds on https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25059, and extends that change to all 32-bit systems.

This fixes a crash on SteamOS with the following test case:

        unsigned char data[] = {
          0x00, 0x00, 0x00, 0x01, 0x40, 0x01, 0x0c, 0x01, 0xff, 0xff, 0x01, 0x60,
          0x00, 0x00, 0x03, 0x00, 0xb0, 0x00, 0x00, 0x03, 0x00, 0x00, 0x03, 0x00,
          0x99, 0x2c, 0x0c, 0x01, 0x64, 0x7c, 0x00, 0x7c, 0xd2, 0x56, 0x01, 0x40,
          0x00, 0x00, 0x00, 0x01, 0x42, 0x01, 0x01, 0x01, 0x60, 0x00, 0x00, 0x03,
          0x00, 0xb0, 0x00, 0x00, 0x03, 0x00, 0x00, 0x03, 0x00, 0x99, 0xa0, 0x02,
          0x80, 0x80, 0x32, 0x16, 0x24, 0xbb, 0x90, 0x84, 0x48, 0x9a, 0x83, 0x03,
          0x03, 0x02, 0x00, 0xb2, 0x3e, 0x00, 0x3e, 0x69, 0x2b, 0x00, 0x5f, 0x08,
          0x04, 0x10, 0x00, 0x00, 0x00, 0x01, 0x44, 0x01, 0xc0, 0x62, 0x0f, 0x02,
          0x24
        };
        vlVaContext context;
        vlVaBuffer buf;

        memset(&context, 0, sizeof(context));
        memset(&buf, 0, sizeof(buf));
        context.packed_header_emulation_bytes = true;
        buf.data = data;
        buf.size = sizeof(data);
        vlVaHandleVAEncPackedHeaderDataBufferTypeHEVC(&context, &buf);

Cc: mesa-stable
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31596>
2024-11-15 09:51:39 +00:00