Commit Graph

198074 Commits

Author SHA1 Message Date
Chia-I Wu
3f84573be4 panvk: fix base_workgroup_id sysval
Make sure the sysval is pushed.

Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32203>
2024-11-19 23:13:54 +00:00
Lionel Landwerlin
9b779068c3 anv: prevent access to destroyed vk_sync objects post submission
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 36ea90a361 ("anv: Convert to the common sync and submit framework")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/12145
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32219>
2024-11-19 19:40:03 +00:00
Rhys Perry
6c07c0b862 glsl/list: remove underscores in foreach_list_typed macros
I'm not sure why they're here, but I find them to be annoying to read.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32225>
2024-11-19 18:59:05 +00:00
Rhys Perry
66df291513 glsl/list: remove parenthesis in foreach_list_typed macros
These are not necessary because __node is only a single token. The
variable declaration wouldn't work otherwise.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32225>
2024-11-19 18:59:05 +00:00
Rhys Perry
02e353a066 glsl/list: add and use helpers in foreach_list_typed macros
This reduces noise when reading them.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32225>
2024-11-19 18:59:05 +00:00
Rhys Perry
17045b9465 glsl/list: add comments above foreach macros
The _safe suffix is misleading.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32225>
2024-11-19 18:59:05 +00:00
Rhys Perry
65a54b4ec4 nir/lcssa: fix premature exit of loop after rematerializing derefs
If we have NIR such as:

32x4  %48 = @load_vulkan_descriptor (%47) (desc_type=SSBO)
32x4  %76 = deref_cast (tint_symbol_11 *)%48 (ssbo tint_symbol_11)  (ptr_stride=0, align_mul=4, align_offset=0)
32x4  %77 = deref_struct &%76->tint_symbol_10 (ssbo int)  // &((tint_symbol_11 *)%48)->tint_symbol_10

A single nir_rematerialize_deref_in_use_blocks() will rematerialize the
deref_struct and then it's deref_cast. However,
nir_foreach_instr_reverse_safe is not safe if the next iteration's
instruction is removed. This can result in the instruction loop exiting
and the load_vulkan_descriptor never having an LCSSA phi.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Fixes: 439e8c42cc ("nir/lcssa: Fix rematerializing derefs")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11770
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32225>
2024-11-19 18:59:05 +00:00
Rhys Perry
327e5465fc nir/algebraic: check bit sizes in lowered unpack(pack()) optimization
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Fixes: 894f7f4387 ("nir_opt_algebraic: Add a couple optimizations for lowered unpack(pack())")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32157>
2024-11-19 18:17:18 +00:00
Rhys Perry
ecd6ae12fb nir/algebraic: fix iabs(ishr(iabs(a), b)) optimization
iabs(a) is not positive if "a" is the minimum signed value, so this is
incorrect in that case for some values of "b".

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Fixes: 2b76de9b5d ("nir/algebraic: Add a couple optimizations for iabs and ishr")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32157>
2024-11-19 18:17:17 +00:00
David Rosca
217d70fc38 frontends/va: Use compositor blit with different number of planes
This fixes Y8_U8_V8_444_UNORM -> NV12 conversion for example.

Cc: mesa-stable
Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32089>
2024-11-19 17:24:18 +00:00
David Rosca
6a01102efe frontends/va: Stop reallocating buffers in EndPicture
This is not used anymore and can be removed now.

Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32089>
2024-11-19 17:24:18 +00:00
David Rosca
6bd21e4a06 frontends/va: Check if target buffer is supported in EndPicture
Check for all entrypoints, not just encode.

Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32089>
2024-11-19 17:24:18 +00:00
David Rosca
7925f13a41 frontends/va: Stop reallocating according to JPEG sampling factor
Tested with FFmpeg 7.1, it uses correct formats for each sampling factor,
so this has been fixed and is not needed anymore.

Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32089>
2024-11-19 17:24:18 +00:00
David Rosca
0df7e80179 frontends/va: Stop reallocating buffers for protected playback
Instead set the protected flag on allocation and return error
when the protected state of surface doesn't match context.

Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32089>
2024-11-19 17:24:18 +00:00
David Rosca
63fd685b31 frontends/va: Stop reallocating from progressive to interlaced in EndPicture
No driver should be hitting this path anymore.

Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32089>
2024-11-19 17:24:18 +00:00
David Rosca
910b81f73d frontends/va: Stop reallocating to prefered format in EndPicture
This was needed because of the issue with using NV12 regardless
of RT format that was fixed in previous commit.
There was a special case for AV1, because AV1 Profile 0 supports
both 8 and 10 bit, but this is also not needed anymore.

Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32089>
2024-11-19 17:24:18 +00:00
David Rosca
c8a893becd frontends/va: Create surfaces with correct fourcc for RT format
If applications doesn't send any attributes to describe the format,
we would always use driver preferred format (NV12). This is wrong
for any RT format other than the driver preferred (YUV420).
Driver doesn't have a choice here, we must use the matching format.

Cc: mesa-stable
Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32089>
2024-11-19 17:24:18 +00:00
David Rosca
f70ecba49a radeonsi: Check all supported formats in si_vid_is_target_buffer_supported
Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32089>
2024-11-19 17:24:17 +00:00
Matt Turner
ba5c65f10b nir: Get correct number of components
The code wants the number of components used by the variable in the
current attribute slot, not the total number of components.

For e.g. a 4x3 matrix, glsl_get_components() returns 12, leading to the
following error reported by AddressSanitizer:

```
Test case 'dEQP-VK.tessellation.shader_input_output.cross_invocation_per_patch_mat4x3'..
../src/compiler/nir/nir_lower_io_to_vector.c:265:16: runtime error: index 4 out of bounds for type 'nir_variable *[4]'
```

Fixes: 5ef2b8f1f2 ("nir: Add a pass for lowering IO back to vector when possible")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32193>
2024-11-19 16:35:17 +00:00
Timur Kristóf
cf36fc134e radv: Set dump flags in a smarter way by default.
If shader stages are specified but compilation stages aren't,
dump NIR, backend IR and disassembly.

If compilation stages are specified but shader stages aren't,
dump all shader stages.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32079>
2024-11-19 16:15:45 +01:00
Timur Kristóf
14ea24ab6f radv: Also allow filtering SPIR-V dump per stage.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32079>
2024-11-19 16:15:43 +01:00
Timur Kristóf
e6eaf7b950 radv: Slightly reword preoptir debug flag.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32079>
2024-11-19 16:15:42 +01:00
Timur Kristóf
8c1e2ac03b radv: Refactor RADV_DEBUG=shaders to be a combination of other options.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32079>
2024-11-19 16:15:40 +01:00
Timur Kristóf
6d5caabdd7 radv: Separate option to dump backend IR.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32079>
2024-11-19 16:15:38 +01:00
Timur Kristóf
649da9e744 radv: Separate option to print shader disassembly.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32079>
2024-11-19 16:15:35 +01:00
Timur Kristóf
3f92c0bbe9 radv: Separate option to dump NIR.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32079>
2024-11-19 16:15:33 +01:00
Timur Kristóf
d94e65574f aco: Separate options for printing IR and recording disassembly.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32079>
2024-11-19 16:15:28 +01:00
Timur Kristóf
ab89fdc3d4 radv: Add ability to dump shaders based on stage.
The new debug flags can make the output less overwhelming
and only dump what we want to see.

The old RADV_DEBUG=shaders will still print all stages.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32079>
2024-11-19 16:15:23 +01:00
Timur Kristóf
57161f516e radv: Mark GS copy shaders as internal.
Instead of passing the meta_shader arg.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32079>
2024-11-19 16:14:45 +01:00
Job Noorman
86795a6337 ir3: fold shared movs into other movs
Handle cases like this in ir3_shared_fold:

cov.f32f16 sssa_1, c0.x
mov.u16u16 ssa_2, sssa_1
=>
cov.f32f16 ssa_1, c0.x

Signed-off-by: Job Noorman <jnoorman@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32211>
2024-11-19 14:30:35 +00:00
Mary Guillemard
957db02fed panvk: Advertise VK_EXT_host_query_reset
Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.cim>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31843>
2024-11-19 13:40:07 +01:00
Mary Guillemard
89e65dd227 panvk: Expose precise occlusion queries
Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.cim>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31843>
2024-11-19 13:39:34 +01:00
Mary Guillemard
cbdb4757d4 panvk: Implement occlusion queries for CSF
Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.cim>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31843>
2024-11-19 13:39:34 +01:00
Mary Guillemard
d1934e44fc panvk: Implement occlusion queries for JM
Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.cim>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31843>
2024-11-19 13:39:34 +01:00
Mary Guillemard
61534faf4e panvk: Wire occlusion queries to internals
Prepare CSF & JM to support occlusion queries.

Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.cim>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31843>
2024-11-19 13:39:34 +01:00
Mary Guillemard
be023a3fe0 panfrost: Remove faulty assert in cs_loop_conditional_*
In case of nested if/else, the current block will not be the loop block.

Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.cim>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31843>
2024-11-19 13:39:34 +01:00
Mary Guillemard
25248fae83 panvk: Take rasterization samples into account in draw
We were ignoring rasterization samples count before.

This fix "dEQP-VK.query_pool.occlusion_query.no_attachments_multisample"
failure.

Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.cim>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31843>
2024-11-19 13:39:34 +01:00
Mary Guillemard
0d0547ee4a panvk: Only flag rw_nc pool as uncached on v10+
Panfrost doesn't support PAN_KMOD_BO_FLAG_GPU_UNCACHED and to keep
things usable on all generation, let's do that for now.

Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.cim>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31843>
2024-11-19 13:39:34 +01:00
Marek Olšák
ef4342e3c3 radeonsi/ci: add options to test llvmpipe, softpipe, virgl, zink
for https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31942

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32186>
2024-11-19 11:43:20 +00:00
Marek Olšák
51aa1d8381 radeonsi: fix gl_FrontFace elimination when one side is culled
Fixes: 55d81214c9 - radeonsi: replace gl_FrontFacing with a constant if one side is always culled

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32186>
2024-11-19 11:43:20 +00:00
Marek Olšák
48c1c6247c radeonsi: handle nir_intrinsic_component in kill_ps_outputs
The assertion was failing with AMD_DEBUG=mono.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32186>
2024-11-19 11:43:20 +00:00
Marek Olšák
5be9d76861 radeonsi: fix an assertion failure in si_shader_ps with AMD_DEBUG=mono
assert(!shader->key.ps.part.prolog.force_persp_center_interp ||
       (!G_0286CC_PERSP_SAMPLE_ENA(input_ena) && !G_0286CC_PERSP_CENTROID_ENA(input_ena)));
failed when all FS inputs have been eliminated by optimizations, which
causes LLVM to set PERSP_SAMPLE_ENA because at least 1 of those must be
enabled, which this code didn't expect.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32186>
2024-11-19 11:43:20 +00:00
Marek Olšák
5b09aaf44d radeonsi: fix buffer_size for emulated GS statistics
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32186>
2024-11-19 11:43:20 +00:00
Mary Guillemard
1fc454673a panvk: Implement VK_EXT_sampler_filter_minmax for v10
This is supported by the hardware since v10.

Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32215>
2024-11-19 11:55:05 +01:00
Caterina Shablia
a5bcf566a9 nir: lower INSTANCE_{ID,INDEX} to an offset load_instance_{index,id} respectively
If the hardware does not support INSTANCE_INDEX natively, it will be
lowered to load_instance_id + base_instance. Otherwise, INSTANCE_ID
will be lowered to load_instance_index - base_instance.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32158>
2024-11-19 09:18:47 +00:00
Caterina Shablia
b9be1f1f20 nir: introduce instance_index system value
The semantics of this newly introduced system value match
Vulkan's InstanceIndex exactly, and are equivalent to
instance_id + base_instance.

Some hardware, such as Mali Valhall or later, only provides
instance id offset by base_instance. Introducing a new system
value to represent this, rather than handling the mismatch
when lowering to BIR lets us use NIR to eliminate redundant
arithmetic that would follow from mismatched semantics, e.g.
instance_id could be lowered to instance_index - base_instance,
so expressions such as instance_id + base_instance would be
optimized to a simple instance_index.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32158>
2024-11-19 09:18:47 +00:00
Samuel Pitoiset
2f13723c0a radv: add a new drirc option to disable DCC for mips and enable it for RDR2
The game aliases two images. It binds a memory object to two different
images, the first one being an image with 4 mips and the second with
only one mip but the bind offset is incorrect. It's like it queried
the first image size with different usage flags, so that DCC was
disabled.

Force disabling DCC for mips fixes the incorrect rendering and doesn't
hurt performance.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/10200
Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32190>
2024-11-19 07:39:13 +00:00
Samuel Pitoiset
2e51d0c724 radv: add a helper to destroy a logical device
It's less error prone than duplicating every cleanups with a bunch of
gotos.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32112>
2024-11-19 07:02:52 +00:00
Samuel Pitoiset
2181ddf383 radv: destroy meta resources properly when creating the device failed
Better to call radv_device_finish_meta().

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32112>
2024-11-19 07:02:52 +00:00
Caio Oliveira
0b66cb1f82 intel/brw: Allow extra SWSB encodings for Xe2
There are new combinations of ordered and unordered dependencies
available for the instructions to use, which among others include:

- combining FLOAT and INT pipe deps in SENDs;
- combining SRC mode deps in regular instructions for the inferred type.

This patch enables a couple of tests checking for the first case.

Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31375>
2024-11-19 04:27:00 +00:00