Commit Graph

177519 Commits

Author SHA1 Message Date
David Heidelberg
05bd55a994 ci/traces: extend no-output timeout by 5 minutes
This should help us handling possibly slower downloads of the traces,
which leads into piglit not printing anything on the output.

After Infra will get stabilized again, needs to be reverted.

Acked-by: Helen Koike <helen.koike@collabora.com>
Acked-by: Daniel Stone <daniels@collabora.com>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25097>
2023-09-07 23:43:02 +00:00
Samuel Pitoiset
a2ead228ac radv: avoid emitting THREAD_TRACE_MARKER for predicated draws/dispatches
This confused RGP for example when DGC calls are skipped.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25060>
2023-09-07 22:51:51 +00:00
Samuel Pitoiset
51eb072eb6 radv: skip DGC calls when the indirect sequence count is zero with a predicate
Starfield has a lot of empty ExecuteIndirect() calls. This optimizes
them by using the indirect sequence count as predicate.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25060>
2023-09-07 22:51:51 +00:00
Martin Roukala (né Peres)
13723e3097 radv/ci: use the default kernel on vkcts-navi10
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7888
Signed-off-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25095>
2023-09-07 21:02:25 +00:00
Martin Roukala (né Peres)
76ef5f82ab radv/ci: drop the auto-reboot-on-hang for vkcts-navi10
Anecdotal evidence seems to suggest this is not happening anymore, so
let's try dropping it and see how it fares!

Signed-off-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25095>
2023-09-07 21:02:25 +00:00
Danylo Piliaiev
b16472fc97 ir3/lower_tex_prefetch: Fix crash with lowered load_barycentric_at_offset
ir3_nir_lower_tex_prefetch expects src0 of load_interpolated_input to
be intrinsic, however this assumption broke when src0 is
load_barycentric_at_offset and is lowered in series of alu instructions.

 32x2  %1121 = @load_barycentric_at_offset (%1120) (interp_mode=0)
 32x4  %1118 = @load_interpolated_input (%1121, %1116 (0x0)) ...
 32x2    %32 = vec2 %1118.x, %1118.y
 32x4    %37 = (float32)tex %36 (texture_handle), %34 (sampler_handle), %32 (coord), 0 (texture), 0 (sampler)

is lowered into:

 [...]
 32      %54 = ffma %46.y, %52, %50
 32      %55 = ffma %46.y, %53, %51
 32x2    %56 = vec2 %54, %55
 32x4    %57 = @load_interpolated_input (%56, %25 (0x0))
 [...]

Crash backtrace:

 #5  in __GI___assert_fail (assertion=0x7ff6692328 "parent && parent->type == nir_instr_type_intrinsic",
     file=0x7ff66921c8 "nir.h", line=2536, function=0x7ff6692630 <__PRETTY_FUNCTION__.13> "nir_instr_as_intrinsic")
     at assert.c:101
 #6  in nir_instr_as_intrinsic (parent=0x7fd4b648e8) at nir.h:2536
 #7  in coord_offset (ssa=0x7fd4b649d0) at ir3_nir_lower_tex_prefetch.c:77
 #8  in coord_offset (ssa=0x7fd4b64a90) at ir3_nir_lower_tex_prefetch.c:48
 #9  in ir3_nir_coord_offset (ssa=0x7fd4b64a90) at ir3_nir_lower_tex_prefetch.c:104
 #10 in lower_tex_prefetch_block (block=0x7fd482c100) at ir3_nir_lower_tex_prefetch.c:185
 #11 in lower_tex_prefetch_func (impl=0x7fd4aa0890) at ir3_nir_lower_tex_prefetch.c:218
 #12 in ir3_nir_lower_tex_prefetch (shader=0x7fd4942b10) at ir3_nir_lower_tex_prefetch.c:242

Cc: mesa-stable

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25096>
2023-09-07 16:12:58 +00:00
Iago Toral Quiroga
eb7a46ed3d v3dv: bump up MAX_UNIFORM_BUFFERS to 16
We currently expose 12 but that becomes 11 when running on Zink
since Mesa's state tracker is aware that the first one is reserved
for its own constant buffer, and the minimum number of UBOs required
by GL is 12, so Zink won't be able to expose UBO support.

Bump it up to 16 to meet Zink requirements, which is what we offer
on V3D.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9764
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25093>
2023-09-07 12:46:10 +00:00
Tatsuyuki Ishi
383842fab8 radv: Fix dumping vertex descriptors with RADV_DEBUG=hang.
Adding 3 words should be done before the uint32_t ** cast. This is in
line with other places which uses pointer arithmetic on trace_id_ptr.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25081>
2023-09-07 11:50:32 +00:00
Vlad Schiller
6d2d74fa1c pvr: Add VK_KHR_driver_properties
This commit will implement the VK_KHR_driver_properties extension.
At the moment, the extension is disabled, because the current conformance
test version does not include the Imagination driver ID. The extension
can be enabled after conformance test version 1.3.6.0.

Co-Authored-by: Matt Coster <matt.coster@imgtec.com>
Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Signed-off-by: Vlad Schiller <vlad-radu.schiller@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24927>
2023-09-07 11:35:05 +00:00
Lionel Landwerlin
34813e13db pps-producer: add ability to select device with DRI_PRIME
When running with multiple Intel cards in a system, having the ability
to select the device recording performance data is useful.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Chia-I Wu <olvaffe@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25051>
2023-09-07 10:44:51 +00:00
Tatsuyuki Ishi
0228b294e8 radv: Fix IB size for RADV_DEBUG=hang.
cs->base.cdw here is the size of the last CS in the chain, but we are
passing in the first CS in the chain to begin decoding. Hence,
cs->ib_buffers[0].cdw is the correct size here.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25061>
2023-09-07 09:45:19 +00:00
Tapani Pälli
6e4663635f mesa: disable snorm readpix clamping with EXT_render_snorm
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25054>
2023-09-07 08:59:07 +00:00
Samuel Pitoiset
285223d0fd radv: fix interactions with primitives generated queries and pipeline stats
SAMPLE_STREAMOUTSTATS requires PIPELINESTAT_START to be enabled,
otherwise the hw doesn't count anything.

This fixes
dEQP-VK.transform_feedback.primitives_generated_query.concurrent.pipeline_statistics_2.*
on GFX8. GFX6-9 are probably also affected by this bug, but with NGG
these queries are slightly different and don't use legacy streamout.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25049>
2023-09-07 08:06:40 +00:00
Lionel Landwerlin
6f4fe3f81b anv: Copy/Clear MSAA images over companion RCS while we are on compute
When we have MSAA copy/clear operation on the compute queue, use the
companion RCS command buffer to carry out copy/clear operations.

v2: (Sagar)
- Flush cache according to command buffer
- Invalidate AUX when we create new companion RCS command buffer if
  platform support AUX TT.

Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23661>
2023-09-07 06:39:06 +00:00
Sagar Ghuge
5b8bef8650 anv: Extract batch print code to anv_print_batch helper
Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23661>
2023-09-07 06:39:06 +00:00
Sagar Ghuge
9866c4e32b anv: Skip layout transition on the compute queue
v2: (Nanley)
- Make sure we skip layout transition during queue ownership transfer

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23661>
2023-09-07 06:39:06 +00:00
Sagar Ghuge
46d203c0ab anv: Add secondary companion RCS cmd buffer to primary
Add secondary buffer's companion RCS command buffer to primary buffer's
companion RCS command buffer for execution if secondary RCS is valid.

v2: (Lionel)
- Fix the primary companion RCS check
- Set batch error

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23661>
2023-09-07 06:39:06 +00:00
Sagar Ghuge
4d79c2d280 anv: Execute an empty batch to sync main and companion RCS batch
We need to synchronize main (CCS/BCS) and companion rcs batch, so let's
create an empty batch and make both the batches (CCS/BCS) and companion
RCS batch wait on empty sync batch and signal the fence.

Reason to execute the empty batch is we need to make sure the companion
RCS batch finish as soon as the CCS/BCS batch finish. Preemption could
prevent the companion RCS batch execution and we might end up destroying
the CCS/BCS batch before companion RCS finishes.

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23661>
2023-09-07 06:39:06 +00:00
Sagar Ghuge
0c49d3cf97 anv: Setup companion RCS command buffer submission
Add all the wait fences from the main (CCS/BCS) command buffer to the
companion RCS command buffer so that the companion RCS batch starts at
the same time as the main (CCS/BCS) batch.

v2:
- Drop unncessary flush (Jose)

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23661>
2023-09-07 06:39:06 +00:00
Sagar Ghuge
a63277ec36 anv: Execute RCS init batch on companion RCS context/engine
Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23661>
2023-09-07 06:39:06 +00:00
Sagar Ghuge
103512ef3b anv: Move compute specfic bits under compute queue init
Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23661>
2023-09-07 06:39:06 +00:00
Sagar Ghuge
b375302576 anv: Create companion RCS engine
We need to create companion RCS engine when there is CCS/BCS engine
creation requested.

v2:
- Factor out anv_xe_create_engine code in create_engine (Jose)

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23661>
2023-09-07 06:39:06 +00:00
Lionel Landwerlin
a5f2c8c845 anv: create individual logical engines on i915 when possible
This enables us to create more logical engines than HW engines are
available. This also brings the uAPI usage closer to what is happening
on Xe.

Rework: (Sagar)
- Correct exec_flag at the time of submission
- Handle device status check
- Set queue parameters

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23661>
2023-09-07 06:39:06 +00:00
Sagar Ghuge
a5e4be45c0 intel: Pass virtual memory address space ID while creating context
In future patches, we will be creating a separate companion RCS engine
and each engine is created with it's own address space, and we really
don't want. CCS and RCS engine writes should be visible to each other in
order to get the wait/signal mechanism working.

v2:
- Move drm_i915_gem_context_create_ext_setparam out of if block (Lionel)

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23661>
2023-09-07 06:39:06 +00:00
Sagar Ghuge
b73960fc40 intel: Add helper to create/destroy i915 VM
Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23661>
2023-09-07 06:39:06 +00:00
Sagar Ghuge
13b3d7f741 anv: Handle companion RCS in end/destory/reset code path
If we have valid companion RCS command buffer, we should
end/destroy/reset in the same fashion as of main command buffer.

v2:
- Add lock around anv_cmd_buffer_destroy (Sagar)

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23661>
2023-09-07 06:39:06 +00:00
Sagar Ghuge
801523f03d anv: Split out End/Destroy/Reset cmd buffer code into helper
Since we are going to have companion RCS command buffer, we need to
end/destroy/reset companion RCS command buffer similar to main (CCS/BCS)
command buffer.

It's better to split out common code into helper function so that we can
use it later in this series.

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23661>
2023-09-07 06:39:05 +00:00
Sagar Ghuge
edcde0679c anv: Add helper to create companion RCS command buffer
This helper takes the main command buffer as input and then create a
companion RCS command buffer.

v2:
- Rename anv_get_render_queue_index helper to
  anv_get_first_render_queue_index (Jose)
- Rename RCS command buffer to companion RCS command buffer (Lionel)
- Add early return in anv_get_first_render_queue_index (Lionel)
- Add lock around the function (Jose)
- Move companion rcs command pool creation in device create (Sagar)
- Reset companion RCS cmd buffer (Sagar)

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23661>
2023-09-07 06:39:05 +00:00
Iago Toral Quiroga
31eaeb8274 v3dv: handle pPlaneLayouts in VkImageDrmFormatModifierExplicitCreateInfoEXT
We have been ignoring these completely until now. V3D isn't very flexible
regarding image layouts anyway, so for the most part we require that
whatever the user puts here matches exactly what the driver would compute
while setting up the slices. The only exceptions are plane offsets which
and array strides.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9742
Tested-by: Roman Stratiienko <r.stratiienko@gmail.com>
Reviewed-by: Roman Stratiienko <r.stratiienko@gmail.com>
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25074>
2023-09-07 06:22:36 +00:00
Iago Toral Quiroga
717fbda536 v3dv: be more precise in vkGetImageSubresourceLayout
Only return non-zero values for arrayPitch and depthPitch if
they make sense for the image type.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25074>
2023-09-07 06:22:36 +00:00
Piotr Kocia
8019a1b929 glsl: ir_function_param_visitor::visit_enter always true condition
The condition

!param->type->is_vector() || !param->type->is_scalar()

alawys evaluates to true:

* type is not scalar or vector -> true
* type is vector, i.e. num_components > 1 -> num_components == 1 is
  false and !is_scalar() == true
* type is scalar, i.e. num_components == 1 -> num_components > 1 is
  false and !is_vector() == true

There is no comment explaining why such code has been written, therefore
this seems to be a mistake.

To maintain consistency with the surrounding code,
glsl_type_is_scalar_or_vector has been used instead of
replacing || with &&.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24914>
2023-09-07 15:00:26 +10:00
Timothy Arceri
5d203c4ae0 glsl_to_nir: add more unhandled function types
These are unhandled but were working ok because a mistake fixed
in the following patch caused all functions to be skipped.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24914>
2023-09-07 14:08:02 +10:00
Timothy Arceri
67d1c36bb4 glsl: fix out params in glsl to nir
We must use a temp var for out params and later copy the out values
to the correct parameter otherwise we can end up overwriting
global variables prematurely.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24914>
2023-09-07 14:03:21 +10:00
Mike Blumenkrantz
51ad269198 aux/tc: handle stride mismatch during rp-optimized subdata
to avoid splitting renderpasses, this subdata optimization handles the usual
driver dance of staging buffer -> gpu copy

if the pbo stride doesn't match the image format's stride, however, then
a direct copy will yield broken pixels and the image will misrender. to avoid this,
detect stride mismatch and translate the single subdata call into a sequence
of non-overlapping subdata calls that the driver can magically figure out
while continuing to not split renderpasses

fixes #9589

cc: mesa-stable

Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24849>
2023-09-07 01:37:22 +00:00
Eric Engestrom
3ecc5f0180 docs: add one more 23.1.x release
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25090>
2023-09-07 00:28:49 +00:00
Eric Engestrom
a6b8bfabeb docs: update calendar for 23.1.7
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25090>
2023-09-07 00:28:49 +00:00
Eric Engestrom
67f97816b9 docs: add sha256sum for 23.1.7
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25090>
2023-09-07 00:28:49 +00:00
Eric Engestrom
bd58c84b03 docs: add release notes for 23.1.7
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25090>
2023-09-07 00:28:49 +00:00
Dave Airlie
12967c8dcb rusticl: don't store ptrs to nir_variables across opt passes.
If we use NIR_DEBUG=serialize all these ptrs will be left hanging,
just store the var locations and look them up after opt passes.

Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25072>
2023-09-06 21:58:17 +00:00
Sil Vilerino
f857c9a96f d3d12: Extend video screen AV1 encode tile support checking
Add fallback case to take into account driver reported tile restrictions if
default hardcoded tile configurations are not supported by driver

Reviewed-by: Tanner Van De Walle <tvandewalle@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25070>
2023-09-06 21:30:02 +00:00
Sil Vilerino
967133cc91 util/vl_vlc: Use UINT64_MAX instead of ~0UL with MSVC compiler
vl_vlc_removebits fails on MSVC where ~0UL is taken as 32 bits.
Use the UINT64_MAX constant instead in that case.

Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25059>
2023-09-06 20:47:20 +00:00
Lionel Landwerlin
23071b9adc docs: update Anv documentation about dynamic state emission
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24536>
2023-09-06 20:07:02 +00:00
Lionel Landwerlin
ceb1c6033b anv: split BLEND_STATE packing from BLEND_STATE_POINTERS emit
This way when blorp changes the 3DSTATE_BLEND_STATE_POINTERS, we can
just reemit the prior Vulkan state without repacking any of the values
in the BLEND_STATE structure.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24536>
2023-09-06 20:07:02 +00:00
Lionel Landwerlin
2b5f9cc30a anv: remove unused state emission
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24536>
2023-09-06 20:07:02 +00:00
Lionel Landwerlin
50f6903bd9 anv: add new low level emission & dirty state tracking
A single Vulkan state can map to multiple fields in different GPU
instructions. This change introduces the bottom half of a simplified
emission mechanism where we do the following :
          Vulkan runtime state
                   |
                   V
        Intermediate driver state
                   |
                   V
         Instruction programming

This way we can detect that the intermediate state didn't change and
avoid HW instruction emission.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24536>
2023-09-06 20:07:02 +00:00
Lionel Landwerlin
8d66ff01b1 vulkan/runtime: add helper to name dirty states
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24536>
2023-09-06 20:07:02 +00:00
Lionel Landwerlin
44656f98d5 anv: split pipeline programming into instructions
The goal of this change it to move away from a single batch buffer
containing all kind of pipeline instructions to a list of instructions
we can emit separately.

We will later implement pipeline diffing and finer state tracking that
will allow fewer instructions to be emitted.

This changes the following things :

   * instead of having a batch & partially packed instructions, move
     everything into the batch

   * add a set of pointer in the batch that allows us to point to each
     instruction (almost... we group some like URB instructions,
     etc...).

At pipeline emission time, we just go through all of those pointers
and emit the instruction into the batch. No additional packing is
involved.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24536>
2023-09-06 20:07:02 +00:00
Lionel Landwerlin
758540d741 anv: add a flag tracking occlusion query count change
We'll use this later to know when to reemit
3DSTATE_STREAMOUT::ForceRendering

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24536>
2023-09-06 20:07:02 +00:00
Lionel Landwerlin
0ce772bd19 anv: split 3DSTATE_VFG emission
Leave the static part in genX_pipeline.c and only repack the dynamic
part in genX_gfx_state.c

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24536>
2023-09-06 20:07:02 +00:00
Lionel Landwerlin
1e081bd680 anv: split 3DSTATE_TE packing between static & dynamic parts
We can reduce the amount of packing we do by only packing the dynamic
part.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24536>
2023-09-06 20:07:02 +00:00