Commit Graph

198100 Commits

Author SHA1 Message Date
Samuel Pitoiset
aca20fd2e1 radv: mark VERDE (GFX6) as Vulkan 1.3 conformant
https://www.khronos.org/conformance/adopters/conformant-products#submission_820

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32255>
2024-11-20 19:26:20 +00:00
Karmjit Mahil
21baf2f6c1 tu: Fix memory leaks on VK_PIPELINE_COMPILE_REQUIRED
For a TU_PIPELINE_GRAPHICS_LIB we were taking a ref to the descriptor
set layout but never releasing on VK_PIPELINE_COMPILE_REQUIRED.
Since VK_PIPELINE_COMPILE_REQUIRED is technically an error, the user
doesn't call vkDestroyPipeline() for it so the descriptor sets
referenced were never getting freed.

Addresses:
```
Direct leak of 304 byte(s) in 1 object(s) allocated from:
    #0 0x7fa5a93ee0 in __interceptor_malloc
       ../../../../src/libsanitizer/asan/asan_malloc_linux.cpp:145
    #1 0x7fa44bac84 in vk_default_alloc ../src/vulkan/util/vk_alloc.c:26
    #2 0x7fa32ea5d8 in vk_alloc ../src/vulkan/util/vk_alloc.h:48
    #3 0x7fa32ea60c in vk_zalloc ../src/vulkan/util/vk_alloc.h:56
    #4 0x7fa32ea750 in vk_descriptor_set_layout_zalloc
       ../src/vulkan/runtime/vk_descriptor_set_layout.c:49
    #5 0x7fa306fc98 in tu_CreateDescriptorSetLayout(VkDevice_T*,
       VkDescriptorSetLayoutCreateInfo const*, VkAllocationCallbacks
const*, VkDescriptorSetLayout_T**)
../src/freedreno/vulkan/tu_descriptor_set.cc:161
```
and
```
Direct leak of 48 byte(s) in 1 object(s) allocated from:
    #0 0x7f9b4b3ee0 in __interceptor_malloc
       ../../../../src/libsanitizer/asan/asan_malloc_linux.cpp:145
    #1 0x7f9925e900 in ralloc_size ../src/util/ralloc.c:118
    #2 0x7f9925e8d4 in ralloc_context ../src/util/ralloc.c:105
    #3 0x7f98b4b214 in tu_pipeline_builder_build<(chip)7>
       ../src/freedreno/vulkan/tu_pipeline.cc:3898
    #4 0x7f98b46bd8 in tu_graphics_pipeline_create<(chip)7>
       ../src/freedreno/vulkan/tu_pipeline.cc:4203
    #5 0x7f98b22588 in VkResult
       tu_CreateGraphicsPipelines<(chip)7>(VkDevice_T*,
VkPipelineCache_T*, unsigned int, VkGraphicsPipelineCreateInfo const*,
VkAllocationCallbacks const*, VkPipeline_T**)
../src/freedreno/vulkan/tu_pipeline.cc:4234
```
seen in:
dEQP-VK.pipeline.pipeline_library.shader_module_identifier.pipeline_from_id.graphics.4_variants.no_spec_constants.no_pipeline_cache.all_zeros_id.no_exec_properties.vert_tesc_tese_frag

Cc: mesa-stable
Signed-off-by: Karmjit Mahil <karmjit.mahil@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32188>
2024-11-20 18:52:35 +00:00
Zan Dobersek
2817a286e0 tu: ensure completion of generic-clear resolves for color, depth/stencil clears
Combination of concurrent resolve groups and generic clear support on a750
exposed a problem around color and depth/stencil clears. With all resolves
now non-blocking in nature, we need a guarantee that clears issued through
commands will complete before any future resolves.

To achieve that, in case of generic clears being used, a cache flush is
done in order to generate the CCU_RESOLVE_CLEAN event that will ensure any
future resolve will block until the just-emitted clears are completed.

Fixes following flaky CTS tests on a750:
  dEQP-VK.pipeline.monolithic.framebuffer_attachment.2d_array_32x32_48x48_4_ms
  dEQP-VK.pipeline.pipeline_library.framebuffer_attachment.2d_array_32x32_48x48_4_ms

Signed-off-by: Zan Dobersek <zdobersek@igalia.com>
Fixes: 25b73dff5a ("tu/a7xx: use concurrent resolve groups")
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32242>
2024-11-20 17:39:31 +00:00
Alyssa Rosenzweig
4477eed302 compiler: make glsl_sampler_dim available to CL
useful with the NIR bindings for image load/store.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32208>
2024-11-20 16:53:51 +00:00
Alyssa Rosenzweig
39afffe956 nir: split off some definitions for OpenCL
we want some enum values on device for NIR->CL bindings. specifically,
src_type/dest_type indices.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32208>
2024-11-20 16:53:51 +00:00
Alyssa Rosenzweig
e3b14481e3 vtn: preserve name, is_return in bindings
we want to plumb as much signature through as possible.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32208>
2024-11-20 16:53:51 +00:00
Alyssa Rosenzweig
733ec7c675 vtn: use named parameters in bindgen
If the input spir-v isn't stripped, preserving the names makes the generated
header more readable. This makes semantic autocomplete (IDEs) work properly with
vtn_bindgen prototypes.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32208>
2024-11-20 16:53:51 +00:00
Alyssa Rosenzweig
f25b7103fe vtn: use rzalloc in bindgen
we don't want garbage.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32208>
2024-11-20 16:53:51 +00:00
Alyssa Rosenzweig
5d7a230324 vtn: gather function parameter names
Unstripped SPIR-V libraries generated from OpenCL have lots of function
parameter names. Gather them.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32208>
2024-11-20 16:53:51 +00:00
Alyssa Rosenzweig
d248618d81 nir/print: print parameter names in calls
if we have them. example:

call libagx_geometry_input_address %10, p %3, vtx %9, location %0 (0x0)

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32208>
2024-11-20 16:53:51 +00:00
Alyssa Rosenzweig
6b35d7eb13 nir/print: annotate entrypoints
we can have multiple in a collection of OpenCL kernels.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32208>
2024-11-20 16:53:51 +00:00
Alyssa Rosenzweig
eebfbf5ecd nir/print: print function signature
parameter dimensions and names if we have them. example:

decl_function libagx_geometry_input_address (64 return, 64 p, 32 vtx, 32 location)

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32208>
2024-11-20 16:53:51 +00:00
Alyssa Rosenzweig
3da8444be5 nir: add names to function parameters
SPIR-V has this information. We should try to preserve it.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32208>
2024-11-20 16:53:51 +00:00
Alyssa Rosenzweig
61862b209e nir/opt_algebraic: optimize convert_uint_sat(ulong)
I wrote this in my query copy shader, it didn't get the codegen I expected, so I
investigated.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32208>
2024-11-20 16:53:50 +00:00
Alyssa Rosenzweig
07ba9335ae nir/conversion_builder: avoid redundant uint->uint clamp
algebraic will clean up but there's no reason to generate it.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32208>
2024-11-20 16:53:50 +00:00
Alyssa Rosenzweig
76927a3b43 nir/lower_convert_alu_types: use intrinsics_pass
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32208>
2024-11-20 16:53:50 +00:00
Alyssa Rosenzweig
b94d640ba0 agx: make needs_g13x_coherency a tri-state
If we know the shader doesn't use global atomics, we don't care if the target
has this quirk or not and we can produce a single binary for all G13/G14
hardware. Model that in the shader key.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32224>
2024-11-20 16:10:11 +00:00
Alyssa Rosenzweig
358f40ea90 panfrost: switch to u_tristate
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32224>
2024-11-20 16:10:11 +00:00
Alyssa Rosenzweig
847e0e78f8 util: add u_tristate data structure
rip the pan_tristate enum from panfrost and move it to common.

I've often wanted some sort of "yes/no/maybe" or "true/false/unknown" or
"always/never/sometimes" data structure. This adds a common one that is
hopefully neutral enough to cover all of the above.

Asahi will use this.

The Intel drivers could be ported to this (brw_sometimes/elk_sometimes), it
should be straightforward but I don't want to do that without being able to
easily test those changes.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32224>
2024-11-20 16:10:11 +00:00
David Rosca
1cf5ae4854 radeonsi/vpe: Don't allow DCC surfaces
Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32136>
2024-11-20 15:43:30 +00:00
David Rosca
f5903ab60d radeonsi/vpe: Set correct surface swizzle mode
Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32136>
2024-11-20 15:43:30 +00:00
Erik Faye-Lund
60146cc57c panvk: implement sampleRateShading
It doesn't feel great that we need to compile multiple identical shaders
just because we're going to toggle a bit in the command-stream, but this
seems to be the current state-of-art in mesa, so hmpf...

It makes state-validation trivial, so there's that.

This is loosely based on what NVK does.

Reviewed-by: Chia-I Wu <olvaffe@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32004>
2024-11-20 15:16:18 +00:00
Mary Guillemard
83c2d82637 panvk: Advertise VK_KHR_map_memory2
Already supported.

Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32248>
2024-11-20 14:45:14 +00:00
Mary Guillemard
6ffde9294e panvk: Advertise VK_KHR_index_type_uint8
We already support VK_EXT_index_type_uint8 and this is the promoted
version of it.

Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32248>
2024-11-20 14:45:14 +00:00
Mary Guillemard
52a03ab179 panvk: Enable shaderInt16
We already have all the lowering we need for this.

Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32248>
2024-11-20 14:45:14 +00:00
Mary Guillemard
6e8cfc3ce4 panvk: Enable depthClamp and depthBiasClamp
Both are implemented but were not enabled.

Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32248>
2024-11-20 14:45:14 +00:00
Jose Maria Casanova Crespo
48978d5ce5 rpi4/ci: Increase timeout for rusticl jobs.
Test run time has increased to 26min so last days
the nightly jobs have reached the 30min timeout just
before finishing the test execution.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32243>
2024-11-20 14:09:04 +00:00
Jose Maria Casanova Crespo
4675dfb959 vc4/ci: fails udpate after last piglit uprev
spec@arb_clear_texture@arb_clear_texture-supported-formats was fixed
with https://gitlab.freedesktop.org/mesa/piglit/-/merge_requests/970

Fixes: 93c8a65dee ("Uprev Piglit to d04d6fff00849a2a8e29ef3251c6ca04a2f68dc7")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32243>
2024-11-20 14:09:04 +00:00
Philipp Zabel
7805a20d7b etnaviv/nn: Enable fused ReLU activation
Handle fused ReLU activation by setting the corresponding
flag in the NN engine configuration.

Reviewed-by: Tomeu Vizoso <tomeu@tomeuvizoso.net>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31981>
2024-11-20 13:33:11 +00:00
Philipp Zabel
01dc82bc63 teflon: Support fused ReLU activation
Enable support for fused ReLU activation on Conv2D and
DepthwiseConv2D operations.

Reviewed-by: Tomeu Vizoso <tomeu@tomeuvizoso.net>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31981>
2024-11-20 13:33:11 +00:00
Philipp Zabel
ad0ea175d5 teflon: Mark dilated convolutions and fused activation as not supported
Dilation and fused activations are not yet implemented.
Mark them as unsupported for now.

Reviewed-by: Tomeu Vizoso <tomeu@tomeuvizoso.net>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31981>
2024-11-20 13:33:11 +00:00
Philipp Zabel
319c56b10a teflon: Use correct convolution params struct
Use TfLiteDepthwiseConvParams for kTfLiteBuiltinDepthwiseConv2d.
The layout of stride_width, stride_height, and padding struct members
happens to be the same, but we shouldn't depend on that.
This prepares for using the activation, dilation_width_factor, and
dilation_height_factor members, which are at different offsets.

Reviewed-by: Tomeu Vizoso <tomeu@tomeuvizoso.net>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31981>
2024-11-20 13:33:11 +00:00
Lucas Stach
e3257f7461 etnaviv: drm: use list_first_entry
Instead of open-coding the same logic.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32233>
2024-11-20 13:08:28 +00:00
Lucas Stach
916bd73f1d etnaviv: drm: assert mutual exclusivity between cache and zombie list
The BO list member is used to track the BO both on the cache bucket list
as well as the zombie list. The BO being on both lists at the same time
is an invalid state. Add some asserts to validate this assumption.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32233>
2024-11-20 13:08:28 +00:00
Lucas Stach
6dd1640ff6 etnaviv: drm: properly handle BO list member
The BO list member isn't the head/entrypoint for a list, but is only
to be used to link the BO in various lists, so it should not be
initialized as a list head.

Now that the member is properly NULL initialized, we can use the
proper list_is_linked() function to check if the BO is on any
cache bucket or the zombie list.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32233>
2024-11-20 13:08:28 +00:00
Eric Engestrom
b471f75215 docs: fix invalid expression in teflon docs
Fixes: 4d23156127 ("teflon/docs: Clarify smoke test instructions")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32247>
2024-11-20 12:54:28 +00:00
Eric Engestrom
d61dc62c59 docs: fix invalid expression in new pipe cap
Fixes: 89dad5618d ("gallium: add PIPE_CAP_CALL_FINALIZE_NIR_IN_LINKER")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32247>
2024-11-20 12:54:28 +00:00
Peyton Lee
8ee52b5e23 frontends/va: function process_frame has return value
if the video post-processing is failed with some reason, the flow can
fall back to use shader/gfx to perform the processing.

Signed-off-by: Peyton Lee <peytolee@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32106>
2024-11-20 12:18:48 +00:00
Erik Faye-Lund
efe62ee03f panvk: remove duplicate property
We're setting this twice, whoops.

Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32244>
2024-11-20 11:51:15 +00:00
Erik Faye-Lund
3305f772fa panvk: wire up swapchain image creation
This is also needed to properly support VK_KHR_swapchain, so we should
implement it.

Fixes: d970fe2e9d ("panfrost: Add a Vulkan driver for Midgard/Bifrost GPUs")
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32216>
2024-11-20 11:28:39 +00:00
Erik Faye-Lund
f77fe432c1 panvk: support binding swapchain memory
This is required by VK_KHR_swapchain, so let's support it.

Fixes a crash in this CTS test-case:
dEQP-VK.wsi.wayland.swapchain.simulate_oom.image_swapchain_create_info

Fixes: d970fe2e9d ("panfrost: Add a Vulkan driver for Midgard/Bifrost GPUs")
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32216>
2024-11-20 11:28:39 +00:00
Daniel Schürmann
1ff9a0fe80 aco: remove Pseudo_instruction::tmp_in_scc
This information is redundant, now.

No fossil-changes.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32217>
2024-11-20 11:04:32 +00:00
Daniel Schürmann
a1a4a6061c aco/ra: explicitly assign scratch SGPR for linear phis
We are about to remove the branch definitions which previously
served this purpose. Also remove Block::scc_live_out.
Some changes due to round-robin RA.

Totals from 939 (1.18% of 79395) affected shaders: (Navi31)

Instrs: 5038786 -> 5038611 (-0.00%); split: -0.01%, +0.00%
CodeSize: 26153412 -> 26152904 (-0.00%); split: -0.00%, +0.00%
Latency: 41649989 -> 41650120 (+0.00%); split: -0.00%, +0.00%
InvThroughput: 6447508 -> 6447536 (+0.00%); split: -0.00%, +0.00%
SClause: 131319 -> 131276 (-0.03%); split: -0.03%, +0.00%
Copies: 359362 -> 359256 (-0.03%); split: -0.05%, +0.02%
SALU: 639275 -> 639169 (-0.02%); split: -0.03%, +0.01%
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32217>
2024-11-20 11:04:32 +00:00
Daniel Schürmann
17da551133 aco/ra: use bitset for sgpr_operands_alias_defs
We cannot rely on SGPR Temps being fully aligned to 64 SGPRs.

Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32217>
2024-11-20 11:04:32 +00:00
Daniel Schürmann
a04e096339 aco/ra: set Pseudo_instruction::scratch_sgpr to SCC if it doesn't need to be preserved
Also ensure that 'needs_scratch_reg' is always true if SCC might be overwritten.
Few changes, because some p_split_vector get SCC as scratch reg assigned,
and thus, can inhibit some postRA optimizations.

Totals from 3 (0.00% of 79395) affected shaders: (Navi31)
Instrs: 10501 -> 10500 (-0.01%); split: -0.02%, +0.01%
CodeSize: 51580 -> 51520 (-0.12%); split: -0.12%, +0.01%
Latency: 84166 -> 84174 (+0.01%)
InvThroughput: 13109 -> 13111 (+0.02%)
SALU: 859 -> 860 (+0.12%)

Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32217>
2024-11-20 11:04:32 +00:00
Samuel Pitoiset
08c9dca8db radv: fix skipping on-disk shaders cache when not useful
This was just broken because individual shaders were still stored
on-disk in many situations:
- for shader object, all compute/graphics shaders were stored
- for fast-GPL, graphics shaders were stored
- for pipeline binaries, when the create flag was used
- for rt capture/replay and ray history

This should stop storing unused binaries on-disk and save space.

Found this by inspection.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32227>
2024-11-20 10:01:26 +00:00
Erik Faye-Lund
9c1de5c6b3 panvk: set correct max extents for images
We updated maxImageDimension2D etc to report the actual max size, but we
forgot to update GetPhysicalDeviceImageFormatProperties in the same way.
Let's do that to make things consistent.

This fixes the following CTS test-case:
dEQP-VK.wsi.wayland.swapchain.create.image_extent

Fixes: d5ed77800e ("panvk: Fix GetPhysicalDeviceProperties2() to report accurate info")
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32221>
2024-11-20 09:20:17 +00:00
Erik Faye-Lund
00b25ec769 panfrost: use 64-bits for layout calculations
On modern Mali GPUs, we can have 16 bits for the X and Y sizes, already
overflowing 32-bit barrier even with a single layer of byte-sized
formats.

So let's make sure we have enough bits to avoid overflows here.

Fixes: d5ed77800e ("panvk: Fix GetPhysicalDeviceProperties2() to report accurate info")
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32221>
2024-11-20 09:20:17 +00:00
Samuel Pitoiset
92446a2dcc radv: remove VK_VALVE_descriptor_set_host_mapping
This extension was only enabled for vkd3d-proton and it's obsolete
since VK_EXT_descriptor_buffer, which landed in September 2022.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32218>
2024-11-20 08:56:41 +00:00
David Rosca
c3ee2129ae pipe: Remove video update_decoder_target
Not used anymore.

Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32095>
2024-11-20 08:31:00 +00:00