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intel: Pull in xe_drm.h
This is the uapi of the new Xe kernel driver. Signed-off-by: José Roberto de Souza <jose.souza@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21368>
This commit is contained in:
José Roberto de Souza
Marge Bot
parent
276f4a9d8c
commit
ee510e2c50
807
include/drm-uapi/xe_drm.h
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807
include/drm-uapi/xe_drm.h
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@ -0,0 +1,807 @@
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/*
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* Copyright 2021 Intel Corporation. All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the
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* "Software"), to deal in the Software without restriction, including
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* without limitation the rights to use, copy, modify, merge, publish,
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* distribute, sub license, and/or sell copies of the Software, and to
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* permit persons to whom the Software is furnished to do so, subject to
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* the following conditions:
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*
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* The above copyright notice and this permission notice (including the
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* next paragraph) shall be included in all copies or substantial portions
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* of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
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* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
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* IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
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* ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
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* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
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* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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*
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*/
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#ifndef _UAPI_XE_DRM_H_
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#define _UAPI_XE_DRM_H_
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#include "drm.h"
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#if defined(__cplusplus)
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extern "C" {
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#endif
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/* Please note that modifications to all structs defined here are
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* subject to backwards-compatibility constraints.
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*/
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/**
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* struct i915_user_extension - Base class for defining a chain of extensions
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*
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* Many interfaces need to grow over time. In most cases we can simply
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* extend the struct and have userspace pass in more data. Another option,
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* as demonstrated by Vulkan's approach to providing extensions for forward
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* and backward compatibility, is to use a list of optional structs to
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* provide those extra details.
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*
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* The key advantage to using an extension chain is that it allows us to
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* redefine the interface more easily than an ever growing struct of
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* increasing complexity, and for large parts of that interface to be
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* entirely optional. The downside is more pointer chasing; chasing across
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* the __user boundary with pointers encapsulated inside u64.
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*
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* Example chaining:
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*
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* .. code-block:: C
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*
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* struct i915_user_extension ext3 {
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* .next_extension = 0, // end
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* .name = ...,
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* };
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* struct i915_user_extension ext2 {
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* .next_extension = (uintptr_t)&ext3,
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* .name = ...,
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* };
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* struct i915_user_extension ext1 {
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* .next_extension = (uintptr_t)&ext2,
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* .name = ...,
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* };
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*
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* Typically the struct i915_user_extension would be embedded in some uAPI
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* struct, and in this case we would feed it the head of the chain(i.e ext1),
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* which would then apply all of the above extensions.
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*
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*/
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struct xe_user_extension {
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/**
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* @next_extension:
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*
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* Pointer to the next struct i915_user_extension, or zero if the end.
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*/
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__u64 next_extension;
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/**
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* @name: Name of the extension.
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*
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* Note that the name here is just some integer.
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*
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* Also note that the name space for this is not global for the whole
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* driver, but rather its scope/meaning is limited to the specific piece
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* of uAPI which has embedded the struct i915_user_extension.
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*/
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__u32 name;
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/**
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* @flags: MBZ
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*
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* All undefined bits must be zero.
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*/
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__u32 pad;
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};
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/*
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* i915 specific ioctls.
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*
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* The device specific ioctl range is [DRM_COMMAND_BASE, DRM_COMMAND_END) ie
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* [0x40, 0xa0) (a0 is excluded). The numbers below are defined as offset
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* against DRM_COMMAND_BASE and should be between [0x0, 0x60).
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*/
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#define DRM_XE_DEVICE_QUERY 0x00
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#define DRM_XE_GEM_CREATE 0x01
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#define DRM_XE_GEM_MMAP_OFFSET 0x02
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#define DRM_XE_VM_CREATE 0x03
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#define DRM_XE_VM_DESTROY 0x04
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#define DRM_XE_VM_BIND 0x05
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#define DRM_XE_ENGINE_CREATE 0x06
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#define DRM_XE_ENGINE_DESTROY 0x07
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#define DRM_XE_EXEC 0x08
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#define DRM_XE_MMIO 0x09
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#define DRM_XE_ENGINE_SET_PROPERTY 0x0a
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#define DRM_XE_WAIT_USER_FENCE 0x0b
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#define DRM_XE_VM_MADVISE 0x0c
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#define DRM_XE_ENGINE_GET_PROPERTY 0x0d
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/* Must be kept compact -- no holes */
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#define DRM_IOCTL_XE_DEVICE_QUERY DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_DEVICE_QUERY, struct drm_xe_device_query)
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#define DRM_IOCTL_XE_GEM_CREATE DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_GEM_CREATE, struct drm_xe_gem_create)
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#define DRM_IOCTL_XE_GEM_MMAP_OFFSET DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_GEM_MMAP_OFFSET, struct drm_xe_gem_mmap_offset)
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#define DRM_IOCTL_XE_VM_CREATE DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_VM_CREATE, struct drm_xe_vm_create)
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#define DRM_IOCTL_XE_VM_DESTROY DRM_IOW( DRM_COMMAND_BASE + DRM_XE_VM_DESTROY, struct drm_xe_vm_destroy)
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#define DRM_IOCTL_XE_VM_BIND DRM_IOW( DRM_COMMAND_BASE + DRM_XE_VM_BIND, struct drm_xe_vm_bind)
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#define DRM_IOCTL_XE_ENGINE_CREATE DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_ENGINE_CREATE, struct drm_xe_engine_create)
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#define DRM_IOCTL_XE_ENGINE_GET_PROPERTY DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_ENGINE_GET_PROPERTY, struct drm_xe_engine_get_property)
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#define DRM_IOCTL_XE_ENGINE_DESTROY DRM_IOW( DRM_COMMAND_BASE + DRM_XE_ENGINE_DESTROY, struct drm_xe_engine_destroy)
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#define DRM_IOCTL_XE_EXEC DRM_IOW( DRM_COMMAND_BASE + DRM_XE_EXEC, struct drm_xe_exec)
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#define DRM_IOCTL_XE_MMIO DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_MMIO, struct drm_xe_mmio)
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#define DRM_IOCTL_XE_ENGINE_SET_PROPERTY DRM_IOW( DRM_COMMAND_BASE + DRM_XE_ENGINE_SET_PROPERTY, struct drm_xe_engine_set_property)
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#define DRM_IOCTL_XE_WAIT_USER_FENCE DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_WAIT_USER_FENCE, struct drm_xe_wait_user_fence)
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#define DRM_IOCTL_XE_VM_MADVISE DRM_IOW( DRM_COMMAND_BASE + DRM_XE_VM_MADVISE, struct drm_xe_vm_madvise)
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struct drm_xe_engine_class_instance {
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__u16 engine_class;
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#define DRM_XE_ENGINE_CLASS_RENDER 0
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#define DRM_XE_ENGINE_CLASS_COPY 1
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#define DRM_XE_ENGINE_CLASS_VIDEO_DECODE 2
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#define DRM_XE_ENGINE_CLASS_VIDEO_ENHANCE 3
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#define DRM_XE_ENGINE_CLASS_COMPUTE 4
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/*
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* Kernel only class (not actual hardware engine class). Used for
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* creating ordered queues of VM bind operations.
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*/
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#define DRM_XE_ENGINE_CLASS_VM_BIND 5
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__u16 engine_instance;
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__u16 gt_id;
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};
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#define XE_MEM_REGION_CLASS_SYSMEM 0
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#define XE_MEM_REGION_CLASS_VRAM 1
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struct drm_xe_query_mem_usage {
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__u32 num_regions;
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__u32 pad;
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struct drm_xe_query_mem_region {
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__u16 mem_class;
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__u16 instance; /* unique ID even among different classes */
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__u32 pad;
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__u32 min_page_size;
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__u32 max_page_size;
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__u64 total_size;
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__u64 used;
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__u64 reserved[8];
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} regions[];
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};
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struct drm_xe_query_config {
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__u32 num_params;
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__u32 pad;
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#define XE_QUERY_CONFIG_REV_AND_DEVICE_ID 0
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#define XE_QUERY_CONFIG_FLAGS 1
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#define XE_QUERY_CONFIG_FLAGS_HAS_VRAM (0x1 << 0)
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#define XE_QUERY_CONFIG_FLAGS_USE_GUC (0x1 << 1)
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#define XE_QUERY_CONFIG_MIN_ALIGNEMENT 2
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#define XE_QUERY_CONFIG_VA_BITS 3
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#define XE_QUERY_CONFIG_GT_COUNT 4
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#define XE_QUERY_CONFIG_MEM_REGION_COUNT 5
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#define XE_QUERY_CONFIG_NUM_PARAM XE_QUERY_CONFIG_MEM_REGION_COUNT + 1
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__u64 info[];
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};
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struct drm_xe_query_gts {
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__u32 num_gt;
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__u32 pad;
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/*
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* TODO: Perhaps info about every mem region relative to this GT? e.g.
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* bandwidth between this GT and remote region?
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*/
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struct drm_xe_query_gt {
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#define XE_QUERY_GT_TYPE_MAIN 0
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#define XE_QUERY_GT_TYPE_REMOTE 1
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#define XE_QUERY_GT_TYPE_MEDIA 2
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__u16 type;
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__u16 instance;
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__u32 clock_freq;
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__u64 features;
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__u64 native_mem_regions; /* bit mask of instances from drm_xe_query_mem_usage */
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__u64 slow_mem_regions; /* bit mask of instances from drm_xe_query_mem_usage */
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__u64 inaccessible_mem_regions; /* bit mask of instances from drm_xe_query_mem_usage */
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__u64 reserved[8];
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} gts[];
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};
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struct drm_xe_query_topology_mask {
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/** @gt_id: GT ID the mask is associated with */
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__u16 gt_id;
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/** @type: type of mask */
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__u16 type;
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#define XE_TOPO_DSS_GEOMETRY (1 << 0)
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#define XE_TOPO_DSS_COMPUTE (1 << 1)
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#define XE_TOPO_EU_PER_DSS (1 << 2)
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/** @num_bytes: number of bytes in requested mask */
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__u32 num_bytes;
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/** @mask: little-endian mask of @num_bytes */
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__u8 mask[];
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};
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struct drm_xe_device_query {
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/** @extensions: Pointer to the first extension struct, if any */
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__u64 extensions;
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/** @query: The type of data to query */
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__u32 query;
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#define DRM_XE_DEVICE_QUERY_ENGINES 0
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#define DRM_XE_DEVICE_QUERY_MEM_USAGE 1
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#define DRM_XE_DEVICE_QUERY_CONFIG 2
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#define DRM_XE_DEVICE_QUERY_GTS 3
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#define DRM_XE_DEVICE_QUERY_HWCONFIG 4
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#define DRM_XE_DEVICE_QUERY_GT_TOPOLOGY 5
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/** @size: Size of the queried data */
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__u32 size;
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/** @data: Queried data is placed here */
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__u64 data;
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/** @reserved: Reserved */
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__u64 reserved[2];
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};
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struct drm_xe_gem_create {
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/** @extensions: Pointer to the first extension struct, if any */
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__u64 extensions;
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/**
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* @size: Requested size for the object
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*
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* The (page-aligned) allocated size for the object will be returned.
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*/
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__u64 size;
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/**
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* @flags: Flags, currently a mask of memory instances of where BO can
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* be placed
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*/
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#define XE_GEM_CREATE_FLAG_DEFER_BACKING (0x1 << 24)
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#define XE_GEM_CREATE_FLAG_SCANOUT (0x1 << 25)
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__u32 flags;
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/**
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* @vm_id: Attached VM, if any
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*
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* If a VM is specified, this BO must:
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*
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* 1. Only ever be bound to that VM.
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*
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* 2. Cannot be exported as a PRIME fd.
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*/
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__u32 vm_id;
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/**
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* @handle: Returned handle for the object.
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*
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* Object handles are nonzero.
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*/
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__u32 handle;
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/** @reserved: Reserved */
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__u64 reserved[2];
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};
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struct drm_xe_gem_mmap_offset {
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/** @extensions: Pointer to the first extension struct, if any */
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__u64 extensions;
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/** @handle: Handle for the object being mapped. */
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__u32 handle;
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/** @flags: Must be zero */
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__u32 flags;
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/** @offset: The fake offset to use for subsequent mmap call */
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__u64 offset;
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/** @reserved: Reserved */
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__u64 reserved[2];
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};
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/**
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* struct drm_xe_vm_bind_op_error_capture - format of VM bind op error capture
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*/
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struct drm_xe_vm_bind_op_error_capture {
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/** @error: errno that occured */
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__s32 error;
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/** @op: operation that encounter an error */
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__u32 op;
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/** @addr: address of bind op */
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__u64 addr;
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/** @size: size of bind */
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__u64 size;
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};
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/** struct drm_xe_ext_vm_set_property - VM set property extension */
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struct drm_xe_ext_vm_set_property {
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/** @base: base user extension */
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struct xe_user_extension base;
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/** @property: property to set */
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#define XE_VM_PROPERTY_BIND_OP_ERROR_CAPTURE_ADDRESS 0
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__u32 property;
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/** @value: property value */
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__u64 value;
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/** @reserved: Reserved */
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__u64 reserved[2];
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};
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struct drm_xe_vm_create {
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/** @extensions: Pointer to the first extension struct, if any */
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#define XE_VM_EXTENSION_SET_PROPERTY 0
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__u64 extensions;
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/** @flags: Flags */
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__u32 flags;
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#define DRM_XE_VM_CREATE_SCRATCH_PAGE (0x1 << 0)
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#define DRM_XE_VM_CREATE_COMPUTE_MODE (0x1 << 1)
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#define DRM_XE_VM_CREATE_ASYNC_BIND_OPS (0x1 << 2)
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#define DRM_XE_VM_CREATE_FAULT_MODE (0x1 << 3)
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/** @vm_id: Returned VM ID */
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__u32 vm_id;
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/** @reserved: Reserved */
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__u64 reserved[2];
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};
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struct drm_xe_vm_destroy {
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/** @vm_id: VM ID */
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__u32 vm_id;
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/** @pad: MBZ */
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__u32 pad;
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/** @reserved: Reserved */
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__u64 reserved[2];
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};
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struct drm_xe_vm_bind_op {
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/**
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* @obj: GEM object to operate on, MBZ for MAP_USERPTR, MBZ for UNMAP
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*/
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__u32 obj;
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union {
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/**
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* @obj_offset: Offset into the object, MBZ for CLEAR_RANGE,
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* ignored for unbind
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*/
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__u64 obj_offset;
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/** @userptr: user pointer to bind on */
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__u64 userptr;
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};
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/**
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* @range: Number of bytes from the object to bind to addr, MBZ for UNMAP_ALL
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*/
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__u64 range;
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/** @addr: Address to operate on, MBZ for UNMAP_ALL */
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__u64 addr;
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/**
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* @gt_mask: Mask for which GTs to create binds for, 0 == All GTs,
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* only applies to creating new VMAs
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*/
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__u64 gt_mask;
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/** @op: Operation to perform (lower 16 bits) and flags (upper 16 bits) */
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__u32 op;
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/** @mem_region: Memory region to prefetch VMA to, instance not a mask */
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__u32 region;
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#define XE_VM_BIND_OP_MAP 0x0
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#define XE_VM_BIND_OP_UNMAP 0x1
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#define XE_VM_BIND_OP_MAP_USERPTR 0x2
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#define XE_VM_BIND_OP_RESTART 0x3
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#define XE_VM_BIND_OP_UNMAP_ALL 0x4
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#define XE_VM_BIND_OP_PREFETCH 0x5
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#define XE_VM_BIND_FLAG_READONLY (0x1 << 16)
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/*
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* A bind ops completions are always async, hence the support for out
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* sync. This flag indicates the allocation of the memory for new page
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* tables and the job to program the pages tables is asynchronous
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* relative to the IOCTL. That part of a bind operation can fail under
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* memory pressure, the job in practice can't fail unless the system is
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* totally shot.
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*
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* If this flag is clear and the IOCTL doesn't return an error, in
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* practice the bind op is good and will complete.
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*
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* If this flag is set and doesn't return return an error, the bind op
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* can still fail and recovery is needed. If configured, the bind op that
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* caused the error will be captured in drm_xe_vm_bind_op_error_capture.
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* Once the user sees the error (via a ufence +
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* XE_VM_PROPERTY_BIND_OP_ERROR_CAPTURE_ADDRESS), it should free memory
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* via non-async unbinds, and then restart all queue'd async binds op via
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* XE_VM_BIND_OP_RESTART. Or alternatively the user should destroy the
|
||||
* VM.
|
||||
*
|
||||
* This flag is only allowed when DRM_XE_VM_CREATE_ASYNC_BIND_OPS is
|
||||
* configured in the VM and must be set if the VM is configured with
|
||||
* DRM_XE_VM_CREATE_ASYNC_BIND_OPS and not in an error state.
|
||||
*/
|
||||
#define XE_VM_BIND_FLAG_ASYNC (0x1 << 17)
|
||||
/*
|
||||
* Valid on a faulting VM only, do the MAP operation immediately rather
|
||||
* than differing the MAP to the page fault handler.
|
||||
*/
|
||||
#define XE_VM_BIND_FLAG_IMMEDIATE (0x1 << 18)
|
||||
|
||||
/** @reserved: Reserved */
|
||||
__u64 reserved[2];
|
||||
};
|
||||
|
||||
struct drm_xe_vm_bind {
|
||||
/** @extensions: Pointer to the first extension struct, if any */
|
||||
__u64 extensions;
|
||||
|
||||
/** @vm_id: The ID of the VM to bind to */
|
||||
__u32 vm_id;
|
||||
|
||||
/**
|
||||
* @engine_id: engine_id, must be of class DRM_XE_ENGINE_CLASS_VM_BIND
|
||||
* and engine must have same vm_id. If zero, the default VM bind engine
|
||||
* is used.
|
||||
*/
|
||||
__u32 engine_id;
|
||||
|
||||
/** @num_binds: number of binds in this IOCTL */
|
||||
__u32 num_binds;
|
||||
|
||||
union {
|
||||
/** @bind: used if num_binds == 1 */
|
||||
struct drm_xe_vm_bind_op bind;
|
||||
/**
|
||||
* @vector_of_binds: userptr to array of struct
|
||||
* drm_xe_vm_bind_op if num_binds > 1
|
||||
*/
|
||||
__u64 vector_of_binds;
|
||||
};
|
||||
|
||||
/** @num_syncs: amount of syncs to wait on */
|
||||
__u32 num_syncs;
|
||||
|
||||
/** @syncs: pointer to struct drm_xe_sync array */
|
||||
__u64 syncs;
|
||||
|
||||
/** @reserved: Reserved */
|
||||
__u64 reserved[2];
|
||||
};
|
||||
|
||||
/** struct drm_xe_ext_engine_set_property - engine set property extension */
|
||||
struct drm_xe_ext_engine_set_property {
|
||||
/** @base: base user extension */
|
||||
struct xe_user_extension base;
|
||||
|
||||
/** @property: property to set */
|
||||
__u32 property;
|
||||
|
||||
/** @value: property value */
|
||||
__u64 value;
|
||||
};
|
||||
|
||||
/**
|
||||
* struct drm_xe_engine_set_property - engine set property
|
||||
*
|
||||
* Same namespace for extensions as drm_xe_engine_create
|
||||
*/
|
||||
struct drm_xe_engine_set_property {
|
||||
/** @extensions: Pointer to the first extension struct, if any */
|
||||
__u64 extensions;
|
||||
|
||||
/** @engine_id: Engine ID */
|
||||
__u32 engine_id;
|
||||
|
||||
/** @property: property to set */
|
||||
#define XE_ENGINE_SET_PROPERTY_PRIORITY 0
|
||||
#define XE_ENGINE_SET_PROPERTY_TIMESLICE 1
|
||||
#define XE_ENGINE_SET_PROPERTY_PREEMPTION_TIMEOUT 2
|
||||
/*
|
||||
* Long running or ULLS engine mode. DMA fences not allowed in this
|
||||
* mode. Must match the value of DRM_XE_VM_CREATE_COMPUTE_MODE, serves
|
||||
* as a sanity check the UMD knows what it is doing. Can only be set at
|
||||
* engine create time.
|
||||
*/
|
||||
#define XE_ENGINE_SET_PROPERTY_COMPUTE_MODE 3
|
||||
#define XE_ENGINE_SET_PROPERTY_PERSISTENCE 4
|
||||
#define XE_ENGINE_SET_PROPERTY_JOB_TIMEOUT 5
|
||||
#define XE_ENGINE_SET_PROPERTY_ACC_TRIGGER 6
|
||||
#define XE_ENGINE_SET_PROPERTY_ACC_NOTIFY 7
|
||||
#define XE_ENGINE_SET_PROPERTY_ACC_GRANULARITY 8
|
||||
__u32 property;
|
||||
|
||||
/** @value: property value */
|
||||
__u64 value;
|
||||
|
||||
/** @reserved: Reserved */
|
||||
__u64 reserved[2];
|
||||
};
|
||||
|
||||
struct drm_xe_engine_create {
|
||||
/** @extensions: Pointer to the first extension struct, if any */
|
||||
#define XE_ENGINE_EXTENSION_SET_PROPERTY 0
|
||||
__u64 extensions;
|
||||
|
||||
/** @width: submission width (number BB per exec) for this engine */
|
||||
__u16 width;
|
||||
|
||||
/** @num_placements: number of valid placements for this engine */
|
||||
__u16 num_placements;
|
||||
|
||||
/** @vm_id: VM to use for this engine */
|
||||
__u32 vm_id;
|
||||
|
||||
/** @flags: MBZ */
|
||||
__u32 flags;
|
||||
|
||||
/** @engine_id: Returned engine ID */
|
||||
__u32 engine_id;
|
||||
|
||||
/**
|
||||
* @instances: user pointer to a 2-d array of struct
|
||||
* drm_xe_engine_class_instance
|
||||
*
|
||||
* length = width (i) * num_placements (j)
|
||||
* index = j + i * width
|
||||
*/
|
||||
__u64 instances;
|
||||
|
||||
/** @reserved: Reserved */
|
||||
__u64 reserved[2];
|
||||
};
|
||||
|
||||
struct drm_xe_engine_get_property {
|
||||
/** @extensions: Pointer to the first extension struct, if any */
|
||||
__u64 extensions;
|
||||
|
||||
/** @engine_id: Engine ID */
|
||||
__u32 engine_id;
|
||||
|
||||
/** @property: property to get */
|
||||
#define XE_ENGINE_GET_PROPERTY_BAN 0
|
||||
__u32 property;
|
||||
|
||||
/** @value: property value */
|
||||
__u64 value;
|
||||
|
||||
/** @reserved: Reserved */
|
||||
__u64 reserved[2];
|
||||
};
|
||||
|
||||
struct drm_xe_engine_destroy {
|
||||
/** @engine_id: Engine ID */
|
||||
__u32 engine_id;
|
||||
|
||||
/** @pad: MBZ */
|
||||
__u32 pad;
|
||||
|
||||
/** @reserved: Reserved */
|
||||
__u64 reserved[2];
|
||||
};
|
||||
|
||||
struct drm_xe_sync {
|
||||
/** @extensions: Pointer to the first extension struct, if any */
|
||||
__u64 extensions;
|
||||
|
||||
__u32 flags;
|
||||
|
||||
#define DRM_XE_SYNC_SYNCOBJ 0x0
|
||||
#define DRM_XE_SYNC_TIMELINE_SYNCOBJ 0x1
|
||||
#define DRM_XE_SYNC_DMA_BUF 0x2
|
||||
#define DRM_XE_SYNC_USER_FENCE 0x3
|
||||
#define DRM_XE_SYNC_SIGNAL 0x10
|
||||
|
||||
union {
|
||||
__u32 handle;
|
||||
/**
|
||||
* @addr: Address of user fence. When sync passed in via exec
|
||||
* IOCTL this a GPU address in the VM. When sync passed in via
|
||||
* VM bind IOCTL this is a user pointer. In either case, it is
|
||||
* the users responsibility that this address is present and
|
||||
* mapped when the user fence is signalled. Must be qword
|
||||
* aligned.
|
||||
*/
|
||||
__u64 addr;
|
||||
};
|
||||
|
||||
__u64 timeline_value;
|
||||
|
||||
/** @reserved: Reserved */
|
||||
__u64 reserved[2];
|
||||
};
|
||||
|
||||
struct drm_xe_exec {
|
||||
/** @extensions: Pointer to the first extension struct, if any */
|
||||
__u64 extensions;
|
||||
|
||||
/** @vm_id: VM ID to run batch buffer in */
|
||||
__u32 engine_id;
|
||||
|
||||
/** @num_syncs: Amount of struct drm_xe_sync in array. */
|
||||
__u32 num_syncs;
|
||||
|
||||
/** @syncs: Pointer to struct drm_xe_sync array. */
|
||||
__u64 syncs;
|
||||
|
||||
/**
|
||||
* @address: address of batch buffer if num_batch_buffer == 1 or an
|
||||
* array of batch buffer addresses
|
||||
*/
|
||||
__u64 address;
|
||||
|
||||
/**
|
||||
* @num_batch_buffer: number of batch buffer in this exec, must match
|
||||
* the width of the engine
|
||||
*/
|
||||
__u16 num_batch_buffer;
|
||||
|
||||
/** @reserved: Reserved */
|
||||
__u64 reserved[2];
|
||||
};
|
||||
|
||||
struct drm_xe_mmio {
|
||||
/** @extensions: Pointer to the first extension struct, if any */
|
||||
__u64 extensions;
|
||||
|
||||
__u32 addr;
|
||||
|
||||
__u32 flags;
|
||||
|
||||
#define DRM_XE_MMIO_8BIT 0x0
|
||||
#define DRM_XE_MMIO_16BIT 0x1
|
||||
#define DRM_XE_MMIO_32BIT 0x2
|
||||
#define DRM_XE_MMIO_64BIT 0x3
|
||||
#define DRM_XE_MMIO_BITS_MASK 0x3
|
||||
#define DRM_XE_MMIO_READ 0x4
|
||||
#define DRM_XE_MMIO_WRITE 0x8
|
||||
|
||||
__u64 value;
|
||||
|
||||
/** @reserved: Reserved */
|
||||
__u64 reserved[2];
|
||||
};
|
||||
|
||||
/**
|
||||
* struct drm_xe_wait_user_fence - wait user fence
|
||||
*
|
||||
* Wait on user fence, XE will wakeup on every HW engine interrupt in the
|
||||
* instances list and check if user fence is complete:
|
||||
* (*addr & MASK) OP (VALUE & MASK)
|
||||
*
|
||||
* Returns to user on user fence completion or timeout.
|
||||
*/
|
||||
struct drm_xe_wait_user_fence {
|
||||
/** @extensions: Pointer to the first extension struct, if any */
|
||||
__u64 extensions;
|
||||
union {
|
||||
/**
|
||||
* @addr: user pointer address to wait on, must qword aligned
|
||||
*/
|
||||
__u64 addr;
|
||||
/**
|
||||
* @vm_id: The ID of the VM which encounter an error used with
|
||||
* DRM_XE_UFENCE_WAIT_VM_ERROR. Upper 32 bits must be clear.
|
||||
*/
|
||||
__u64 vm_id;
|
||||
};
|
||||
/** @op: wait operation (type of comparison) */
|
||||
#define DRM_XE_UFENCE_WAIT_EQ 0
|
||||
#define DRM_XE_UFENCE_WAIT_NEQ 1
|
||||
#define DRM_XE_UFENCE_WAIT_GT 2
|
||||
#define DRM_XE_UFENCE_WAIT_GTE 3
|
||||
#define DRM_XE_UFENCE_WAIT_LT 4
|
||||
#define DRM_XE_UFENCE_WAIT_LTE 5
|
||||
__u16 op;
|
||||
/** @flags: wait flags */
|
||||
#define DRM_XE_UFENCE_WAIT_SOFT_OP (1 << 0) /* e.g. Wait on VM bind */
|
||||
#define DRM_XE_UFENCE_WAIT_ABSTIME (1 << 1)
|
||||
#define DRM_XE_UFENCE_WAIT_VM_ERROR (1 << 2)
|
||||
__u16 flags;
|
||||
/** @value: compare value */
|
||||
__u64 value;
|
||||
/** @mask: comparison mask */
|
||||
#define DRM_XE_UFENCE_WAIT_U8 0xffu
|
||||
#define DRM_XE_UFENCE_WAIT_U16 0xffffu
|
||||
#define DRM_XE_UFENCE_WAIT_U32 0xffffffffu
|
||||
#define DRM_XE_UFENCE_WAIT_U64 0xffffffffffffffffu
|
||||
__u64 mask;
|
||||
/** @timeout: how long to wait before bailing, value in jiffies */
|
||||
__s64 timeout;
|
||||
/**
|
||||
* @num_engines: number of engine instances to wait on, must be zero
|
||||
* when DRM_XE_UFENCE_WAIT_SOFT_OP set
|
||||
*/
|
||||
__u64 num_engines;
|
||||
/**
|
||||
* @instances: user pointer to array of drm_xe_engine_class_instance to
|
||||
* wait on, must be NULL when DRM_XE_UFENCE_WAIT_SOFT_OP set
|
||||
*/
|
||||
__u64 instances;
|
||||
|
||||
/** @reserved: Reserved */
|
||||
__u64 reserved[2];
|
||||
};
|
||||
|
||||
struct drm_xe_vm_madvise {
|
||||
/** @extensions: Pointer to the first extension struct, if any */
|
||||
__u64 extensions;
|
||||
|
||||
/** @vm_id: The ID VM in which the VMA exists */
|
||||
__u32 vm_id;
|
||||
|
||||
/** @range: Number of bytes in the VMA */
|
||||
__u64 range;
|
||||
|
||||
/** @addr: Address of the VMA to operation on */
|
||||
__u64 addr;
|
||||
|
||||
/*
|
||||
* Setting the preferred location will trigger a migrate of the VMA
|
||||
* backing store to new location if the backing store is already
|
||||
* allocated.
|
||||
*/
|
||||
#define DRM_XE_VM_MADVISE_PREFERRED_MEM_CLASS 0
|
||||
#define DRM_XE_VM_MADVISE_PREFERRED_GT 1
|
||||
/*
|
||||
* In this case lower 32 bits are mem class, upper 32 are GT.
|
||||
* Combination provides a single IOCTL plus migrate VMA to preferred
|
||||
* location.
|
||||
*/
|
||||
#define DRM_XE_VM_MADVISE_PREFERRED_MEM_CLASS_GT 2
|
||||
/*
|
||||
* The CPU will do atomic memory operations to this VMA. Must be set on
|
||||
* some devices for atomics to behave correctly.
|
||||
*/
|
||||
#define DRM_XE_VM_MADVISE_CPU_ATOMIC 3
|
||||
/*
|
||||
* The device will do atomic memory operations to this VMA. Must be set
|
||||
* on some devices for atomics to behave correctly.
|
||||
*/
|
||||
#define DRM_XE_VM_MADVISE_DEVICE_ATOMIC 4
|
||||
/*
|
||||
* Priority WRT to eviction (moving from preferred memory location due
|
||||
* to memory pressure). The lower the priority, the more likely to be
|
||||
* evicted.
|
||||
*/
|
||||
#define DRM_XE_VM_MADVISE_PRIORITY 5
|
||||
#define DRM_XE_VMA_PRIORITY_LOW 0
|
||||
#define DRM_XE_VMA_PRIORITY_NORMAL 1 /* Default */
|
||||
#define DRM_XE_VMA_PRIORITY_HIGH 2 /* Must be elevated user */
|
||||
/* Pin the VMA in memory, must be elevated user */
|
||||
#define DRM_XE_VM_MADVISE_PIN 6
|
||||
|
||||
/** @property: property to set */
|
||||
__u32 property;
|
||||
|
||||
/** @value: property value */
|
||||
__u64 value;
|
||||
|
||||
/** @reserved: Reserved */
|
||||
__u64 reserved[2];
|
||||
};
|
||||
|
||||
#if defined(__cplusplus)
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* _UAPI_XE_DRM_H_ */
|
||||
Loading…
Reference in New Issue
Block a user