radeonsi: implement GL_INTEL_blackhole_render

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7031>
This commit is contained in:
Marek Olšák 2020-09-21 02:05:49 -04:00 committed by Marge Bot
parent bad7b38aa1
commit ed3c5fe469
9 changed files with 25 additions and 2 deletions

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@ -1,4 +1,5 @@
GL 4.5 on llvmpipe
GL_INTEL_blackhole_render on radeonsi
GL_NV_copy_depth_to_color for NIR
GL_NV_half_float
GL_NV_shader_atomic_int64 on radeonsi

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@ -28,6 +28,9 @@
/* The public winsys interface header for the radeon driver. */
/* Skip command submission. Same as RADEON_NOOP=1. */
#define RADEON_FLUSH_NOOP (1u << 30)
/* Whether the next IB can start immediately and not wait for draws and
* dispatches from the current IB to finish. */
#define RADEON_FLUSH_START_NEXT_GFX_IB_NOW (1u << 31)

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@ -300,6 +300,9 @@ void si_flush_dma_cs(struct si_context *ctx, unsigned flags, struct pipe_fence_h
if (check_vm)
si_save_cs(ctx->ws, cs, &saved, true);
if (ctx->is_noop)
flags |= RADEON_FLUSH_NOOP;
ctx->ws->cs_flush(cs, flags, &ctx->last_sdma_fence);
if (fence)
ctx->ws->fence_reference(fence, ctx->last_sdma_fence);

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@ -162,6 +162,7 @@ static int si_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
case PIPE_CAP_MAP_UNSYNCHRONIZED_THREAD_SAFE:
case PIPE_CAP_NO_CLIP_ON_COPY_TEX:
case PIPE_CAP_SHADER_ATOMIC_INT64:
case PIPE_CAP_FRONTEND_NOOP:
return 1;
case PIPE_CAP_GLSL_ZERO_INIT:

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@ -227,6 +227,9 @@ void si_flush_gfx_cs(struct si_context *ctx, unsigned flags, struct pipe_fence_h
}
}
if (ctx->is_noop)
flags |= RADEON_FLUSH_NOOP;
/* Flush the CS. */
ws->cs_flush(cs, flags, &ctx->last_gfx_fence);
if (fence)

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@ -423,6 +423,14 @@ static void si_set_context_param(struct pipe_context *ctx, enum pipe_context_par
}
}
static void si_set_frontend_noop(struct pipe_context *ctx, bool enable)
{
struct si_context *sctx = (struct si_context *)ctx;
ctx->flush(ctx, NULL, PIPE_FLUSH_ASYNC);
sctx->is_noop = enable;
}
static struct pipe_context *si_create_context(struct pipe_screen *screen, unsigned flags)
{
struct si_screen *sscreen = (struct si_screen *)screen;
@ -556,6 +564,7 @@ static struct pipe_context *si_create_context(struct pipe_screen *screen, unsign
sctx->b.set_context_param = si_set_context_param;
sctx->b.get_device_reset_status = si_get_reset_status;
sctx->b.set_device_reset_callback = si_set_device_reset_callback;
sctx->b.set_frontend_noop = si_set_frontend_noop;
si_init_all_descriptors(sctx);
si_init_buffer_functions(sctx);

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@ -954,6 +954,7 @@ struct si_context {
unsigned wait_mem_number;
uint16_t prefetch_L2_mask;
bool is_noop;
bool has_graphics;
bool gfx_flush_in_progress : 1;
bool gfx_last_ib_is_busy : 1;

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@ -1796,7 +1796,8 @@ static int amdgpu_cs_flush(struct radeon_cmdbuf *rcs,
/* If the CS is not empty or overflowed.... */
if (likely(radeon_emitted(&cs->main.base, 0) &&
cs->main.base.current.cdw <= cs->main.base.current.max_dw &&
!debug_get_option_noop())) {
!debug_get_option_noop() &&
!(flags & RADEON_FLUSH_NOOP))) {
struct amdgpu_cs_context *cur = cs->csc;
/* Set IB sizes. */

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@ -638,7 +638,8 @@ static int radeon_drm_cs_flush(struct radeon_cmdbuf *rcs,
cs->cst = tmp;
/* If the CS is not empty or overflowed, emit it in a separate thread. */
if (cs->base.current.cdw && cs->base.current.cdw <= cs->base.current.max_dw && !debug_get_option_noop()) {
if (cs->base.current.cdw && cs->base.current.cdw <= cs->base.current.max_dw &&
!debug_get_option_noop() && !(flags & RADEON_FLUSH_NOOP)) {
unsigned i, num_relocs;
num_relocs = cs->cst->num_relocs;