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intel/brw: Use REG_CLASS_COUNT
Fixes:5d87f41a54
("intel/fs/ra: Define REG_CLASS_COUNT constant specifying the number of register classes.") Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30314> (cherry picked from commit5e24c21625
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e4bceffb5f
@ -1454,7 +1454,7 @@
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"description": "intel/brw: Use REG_CLASS_COUNT",
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"nominated": true,
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"nomination_type": 1,
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"resolution": 0,
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"resolution": 1,
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"main_sha": null,
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"because_sha": "5d87f41a546b26650b15fb33c5f1153aa041a037",
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"notes": null
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@ -47,6 +47,8 @@ struct shader_info;
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struct nir_shader_compiler_options;
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typedef struct nir_shader nir_shader;
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#define REG_CLASS_COUNT 20
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struct brw_compiler {
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const struct intel_device_info *devinfo;
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@ -64,7 +66,7 @@ struct brw_compiler {
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* Array of the ra classes for the unaligned contiguous register
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* block sizes used, indexed by register size.
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*/
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struct ra_class *classes[16];
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struct ra_class *classes[REG_CLASS_COUNT];
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} fs_reg_set;
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void (*shader_debug_log)(void *, unsigned *id, const char *str, ...) PRINTFLIKE(3, 4);
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@ -34,8 +34,6 @@
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using namespace brw;
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#define REG_CLASS_COUNT 20
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static void
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assign_reg(const struct intel_device_info *devinfo,
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unsigned *reg_hw_locations, fs_reg *reg)
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