From e21405912025ace512c8f2f11c6afdec87b23663 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Timur=20Krist=C3=B3f?= Date: Thu, 6 Apr 2023 13:08:27 +0200 Subject: [PATCH] radv/amdgpu: Only allow IB BOs on graphics and compute queues. MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This disallows IB BOs on eg. SDMA queues which was previously mistakenly left out. Cc: mesa-stable Signed-off-by: Timur Kristóf Reviewed-by: Bas Nieuwenhuizen Part-of: --- src/amd/vulkan/winsys/amdgpu/radv_amdgpu_cs.c | 8 +------- 1 file changed, 1 insertion(+), 7 deletions(-) diff --git a/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_cs.c b/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_cs.c index 939414e5690..8c1c4d230c2 100644 --- a/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_cs.c +++ b/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_cs.c @@ -119,13 +119,7 @@ static bool ring_can_use_ib_bos(const struct radv_amdgpu_winsys *ws, enum amd_ip_type ip_type) { - if (ip_type == AMD_IP_UVD || - ip_type == AMD_IP_VCE || - ip_type == AMD_IP_UVD_ENC || - ip_type == AMD_IP_VCN_DEC || - ip_type == AMD_IP_VCN_ENC) - return false; - return ws->use_ib_bos; + return ws->use_ib_bos && (ip_type == AMD_IP_GFX || ip_type == AMD_IP_COMPUTE); } struct radv_amdgpu_cs_request {