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radv: enable DCC stores with MSAA 4x/8x on GFX10+

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Should work now.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10052>
This commit is contained in:
Samuel Pitoiset 2021-04-06 08:50:34 +02:00 committed by Marge Bot
parent 1286e73c2c
commit d4db68b338
1 changed files with 2 additions and 5 deletions
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7
src/amd/vulkan/radv_image.c
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@ -291,14 +291,11 @@ bool radv_image_use_dcc_image_stores(const struct radv_device *device,
* TODO: Enable on more HW. DIMGREY and VANGOGH need a workaround and
* we need more perf analysis.
* https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6796#note_643853
*
* DCC with MSAA > 2 samples results in CTS failures (some of dEQP-VK.pipeline.multisample.storage_image.*).
*/
return (device->physical_device->rad_info.chip_class == GFX10 ||
return device->physical_device->rad_info.chip_class == GFX10 ||
(device->physical_device->rad_info.chip_class == GFX10_3 &&
(device->instance->perftest_flags & RADV_PERFTEST_DCC_STORES) &&
!device->physical_device->use_llvm)) &&
image->info.samples <= 2;
!device->physical_device->use_llvm);
}
/*