amd: drop support for LLVM 10

It doesn't support RDNA 2.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10199>
This commit is contained in:
Marek Olšák 2021-03-27 05:38:57 -04:00 committed by Marge Bot
parent 2747332723
commit b878444c3a
8 changed files with 13 additions and 40 deletions

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@ -1536,7 +1536,9 @@ if with_tests or with_gallium_softpipe
llvm_modules += 'native'
endif
if with_microsoft_clc or with_amd_vk or with_gallium_radeonsi
if with_amd_vk or with_gallium_radeonsi
_llvm_version = '>= 11.0.0'
elif with_microsoft_clc
_llvm_version = '>= 10.0.0'
elif with_gallium_opencl
_llvm_version = '>= 8.0.0'

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@ -5,9 +5,7 @@
#include "ac_llvm_util.h"
#include <llvm/ADT/StringRef.h>
#if LLVM_VERSION_MAJOR >= 11
#include <llvm/MC/MCDisassembler/MCDisassembler.h>
#endif
namespace aco {
namespace {
@ -161,11 +159,7 @@ bool print_asm(Program *program, std::vector<uint32_t>& binary,
referenced_blocks[succ] = true;
}
#if LLVM_VERSION_MAJOR >= 11
std::vector<llvm::SymbolInfoTy> symbols;
#else
std::vector<std::tuple<uint64_t, llvm::StringRef, uint8_t>> symbols;
#endif
std::vector<std::array<char,16>> block_names;
block_names.reserve(program->blocks.size());
for (Block& block : program->blocks) {

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@ -205,9 +205,7 @@ void finish_assembler_test()
/* we could use CLRX for disassembly but that would require it to be
* installed */
if (program->chip_class == GFX10_3 && LLVM_VERSION_MAJOR < 11) {
skip_test("LLVM 11 needed for GFX10_3 disassembly");
} else if (program->chip_class >= GFX8) {
if (program->chip_class >= GFX8) {
print_asm(program.get(), binary, exec_size / 4u, output);
} else {
//TODO: maybe we should use CLRX and skip this test if it's not available?

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@ -4698,13 +4698,11 @@ LLVMValueRef ac_build_main(const struct ac_shader_args *args, struct ac_llvm_con
ctx->main_function = main_function;
if (LLVM_VERSION_MAJOR >= 11) {
/* Enable denormals for FP16 and FP64: */
LLVMAddTargetDependentFunctionAttr(main_function, "denormal-fp-math", "ieee,ieee");
/* Disable denormals for FP32: */
LLVMAddTargetDependentFunctionAttr(main_function, "denormal-fp-math-f32",
"preserve-sign,preserve-sign");
}
/* Enable denormals for FP16 and FP64: */
LLVMAddTargetDependentFunctionAttr(main_function, "denormal-fp-math", "ieee,ieee");
/* Disable denormals for FP32: */
LLVMAddTargetDependentFunctionAttr(main_function, "denormal-fp-math-f32",
"preserve-sign,preserve-sign");
return main_function;
}

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@ -69,10 +69,8 @@ static void ac_init_llvm_target(void)
"-global-isel-abort=2",
/* Atomic optimizations require LLVM 10.0 for gfx10 support. */
"-amdgpu-atomic-optimizations=true",
#if LLVM_VERSION_MAJOR >= 11
/* This was disabled by default in: https://reviews.llvm.org/D77228 */
"-structurizecfg-skip-uniform-regions",
#endif
};
LLVMParseCommandLineOptions(ARRAY_SIZE(argv), argv, NULL);
}
@ -194,8 +192,7 @@ static LLVMTargetMachineRef ac_create_target_machine(enum radeon_family family,
const char *triple = (tm_options & AC_TM_SUPPORTS_SPILL) ? "amdgcn-mesa-mesa3d" : "amdgcn--";
LLVMTargetRef target = ac_get_llvm_target(triple);
snprintf(features, sizeof(features), "+DumpCode%s%s%s",
LLVM_VERSION_MAJOR >= 11 ? "" : ",-fp32-denormals,+fp64-denormals",
snprintf(features, sizeof(features), "+DumpCode%s%s",
family >= CHIP_NAVI10 && !(tm_options & AC_TM_WAVE32)
? ",+wavefrontsize64,-wavefrontsize32"
: "",

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@ -461,7 +461,7 @@ radv_physical_device_get_supported_extensions(const struct radv_physical_device
.EXT_scalar_block_layout = device->rad_info.chip_class >= GFX7,
.EXT_shader_atomic_float = true,
.EXT_shader_demote_to_helper_invocation = true,
.EXT_shader_image_atomic_int64 = LLVM_VERSION_MAJOR >= 11 || !device->use_llvm,
.EXT_shader_image_atomic_int64 = true,
.EXT_shader_stencil_export = true,
.EXT_shader_subgroup_ballot = true,
.EXT_shader_subgroup_vote = true,
@ -1604,8 +1604,8 @@ radv_GetPhysicalDeviceFeatures2(VkPhysicalDevice physicalDevice,
case VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_SHADER_IMAGE_ATOMIC_INT64_FEATURES_EXT: {
VkPhysicalDeviceShaderImageAtomicInt64FeaturesEXT *features =
(VkPhysicalDeviceShaderImageAtomicInt64FeaturesEXT *)ext;
features->shaderImageInt64Atomics = LLVM_VERSION_MAJOR >= 11 || !pdevice->use_llvm;
features->sparseImageInt64Atomics = LLVM_VERSION_MAJOR >= 11 || !pdevice->use_llvm;
features->shaderImageInt64Atomics = true;
features->sparseImageInt64Atomics = true;
break;
}
case VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_MUTABLE_DESCRIPTOR_TYPE_FEATURES_VALVE: {

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@ -49,12 +49,6 @@ do_winsys_init(struct radv_amdgpu_winsys *ws, int fd)
return false;
}
/* LLVM 11 is required for GFX10.3. */
if (ws->info.chip_class == GFX10_3 && ws->use_llvm && LLVM_VERSION_MAJOR < 11) {
fprintf(stderr, "radv: GFX 10.3 requires LLVM 11 or higher\n");
return false;
}
ws->addrlib = ac_addrlib_create(&ws->info, &ws->info.max_alignment);
if (!ws->addrlib) {
fprintf(stderr, "amdgpu: Cannot create addrlib.\n");

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@ -1013,16 +1013,6 @@ static struct pipe_screen *radeonsi_screen_create_impl(struct radeon_winsys *ws,
sscreen->options.enable_sam,
sscreen->options.disable_sam);
/* Older LLVM have buggy v_pk_* instructions. */
if (!sscreen->info.has_packed_math_16bit || LLVM_VERSION_MAJOR < 11)
sscreen->options.fp16 = false;
if (sscreen->info.chip_class == GFX10_3 && LLVM_VERSION_MAJOR < 11) {
fprintf(stderr, "radeonsi: GFX 10.3 requires LLVM 11 or higher\n");
FREE(sscreen);
return NULL;
}
if (sscreen->info.chip_class >= GFX9) {
sscreen->se_tile_repeat = 32 * sscreen->info.max_se;
} else {