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freedreno/a7xx: Add CP_CCHE_INVALIDATE
Fixes: 95104707f1
("tu: Basic a7xx support")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28445>
This commit is contained in:
parent
a47a65c1c2
commit
abe9bd38ff
@ -162,7 +162,6 @@ nop
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CP_BLIT:
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CP_BOOTSTRAP_UCODE:
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CP_COND_EXEC:
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CP_COND_INDIRECT_BUFFER_PFE:
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CP_COND_REG_EXEC:
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CP_COND_WRITE5:
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CP_CONTEXT_REG_BUNCH:
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@ -268,6 +267,7 @@ UNKN32:
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UNKN45:
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UNKN48:
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UNKN5:
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UNKN58:
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UNKN6:
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UNKN7:
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UNKN73:
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@ -189,8 +189,8 @@ nop
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CP_BLIT:
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CP_BOOTSTRAP_UCODE:
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CP_BV_BR_COUNT_OPS:
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CP_CCHE_INVALIDATE:
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CP_COND_EXEC:
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CP_COND_INDIRECT_BUFFER_PFE:
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CP_COND_REG_EXEC:
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CP_COND_WRITE5:
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CP_CONTEXT_REG_BUNCH:
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@ -350,8 +350,8 @@ mov $01, $data
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CP_BLIT:
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CP_BOOTSTRAP_UCODE:
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CP_BV_BR_COUNT_OPS:
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CP_CCHE_INVALIDATE:
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CP_COND_EXEC:
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CP_COND_INDIRECT_BUFFER_PFE:
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CP_COND_REG_EXEC:
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CP_COND_WRITE5:
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CP_CONTEXT_REG_BUNCH:
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@ -513,8 +513,8 @@ cwrite $00, [$00 + @PACKET_TABLE_WRITE_ADDR]
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CP_BLIT:
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CP_BOOTSTRAP_UCODE:
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CP_BV_BR_COUNT_OPS:
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CP_CCHE_INVALIDATE:
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CP_COND_EXEC:
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CP_COND_INDIRECT_BUFFER_PFE:
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CP_COND_REG_EXEC:
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CP_COND_WRITE5:
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CP_CONTEXT_REG_BUNCH:
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@ -269,7 +269,7 @@ CP_LOAD_STATE6:
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CP_INDIRECT_BUFFER_PFD:
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CP_DRAW_INDX_OFFSET:
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CP_REG_TEST:
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CP_COND_INDIRECT_BUFFER_PFE:
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UNKN58:
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CP_INVALIDATE_STATE:
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CP_WAIT_REG_MEM:
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CP_REG_TO_MEM:
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@ -305,7 +305,7 @@ CP_LOAD_STATE6:
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CP_INDIRECT_BUFFER_PFD:
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CP_DRAW_INDX_OFFSET:
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CP_REG_TEST:
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CP_COND_INDIRECT_BUFFER_PFE:
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CP_CCHE_INVALIDATE:
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CP_INVALIDATE_STATE:
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CP_WAIT_REG_MEM:
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CP_REG_TO_MEM:
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@ -483,7 +483,7 @@ CP_LOAD_STATE6:
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CP_INDIRECT_BUFFER_PFD:
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CP_DRAW_INDX_OFFSET:
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CP_REG_TEST:
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CP_COND_INDIRECT_BUFFER_PFE:
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CP_CCHE_INVALIDATE:
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CP_INVALIDATE_STATE:
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CP_WAIT_REG_MEM:
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CP_REG_TO_MEM:
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@ -651,7 +651,7 @@ CP_LOAD_STATE6:
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CP_INDIRECT_BUFFER_PFD:
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CP_DRAW_INDX_OFFSET:
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CP_REG_TEST:
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CP_COND_INDIRECT_BUFFER_PFE:
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CP_CCHE_INVALIDATE:
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CP_INVALIDATE_STATE:
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CP_WAIT_REG_MEM:
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CP_REG_TO_MEM:
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@ -372,7 +372,7 @@ xsi:schemaLocation="https://gitlab.freedesktop.org/freedreno/ rules-fd.xsd">
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<value name="CP_LOAD_STATE" value="0x30" variants="A3XX"/>
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<value name="CP_LOAD_STATE4" value="0x30" variants="A4XX-A5XX"/>
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<doc>Conditionally load a IB based on a flag, prefetch enabled</doc>
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<value name="CP_COND_INDIRECT_BUFFER_PFE" value="0x3a"/>
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<value name="CP_COND_INDIRECT_BUFFER_PFE" value="0x3a" variants="A3XX-A5XX"/>
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<doc>Conditionally load a IB based on a flag, prefetch disabled</doc>
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<value name="CP_COND_INDIRECT_BUFFER_PFD" value="0x32" variants="A3XX"/>
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<doc>Load a buffer with pre-fetch enabled</doc>
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@ -651,6 +651,9 @@ xsi:schemaLocation="https://gitlab.freedesktop.org/freedreno/ rules-fd.xsd">
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<doc>Reset various on-chip state used for synchronization</doc>
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<value name="CP_RESET_CONTEXT_STATE" value="0x1f" variants="A7XX-"/>
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<doc>Invalidates the "CCHE" introduced on a740</doc>
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<value name="CP_CCHE_INVALIDATE" value="0x3a" variants="A7XX-"/>
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</enum>
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