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ir3, tu: Use a UBO for VS primitive params on a750+
Before we were using direct CP_LOAD_STATE, which is broken with multiple
back-to-back draws. This caused regressions in some DX11 traces when
enabling early preamble. We still need to use indirect CP_LOAD_STATE for
VS params, which are sometimes written by the CP, however for everything
else we should use the new UBO path instead.
Fixes: 76e417ca59
("turnip,ir3/a750: Implement consts loading via preamble")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30675>
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parent
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@ -14,9 +14,6 @@ lower_driver_param_to_ubo(nir_builder *b, nir_intrinsic_instr *intr, void *in)
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{
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struct ir3_const_state *const_state = in;
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if (b->shader->info.stage == MESA_SHADER_VERTEX)
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return false;
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unsigned components = nir_intrinsic_dest_components(intr);
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b->cursor = nir_before_instr(&intr->instr);
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@ -52,6 +49,14 @@ lower_driver_param_to_ubo(nir_builder *b, nir_intrinsic_instr *intr, void *in)
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result = ir3_load_driver_ubo(b, components,
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&const_state->primitive_param_ubo, 6);
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break;
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/* These are still loaded using CP_LOAD_STATE for compatibility with indirect
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* draws where the CP does a CP_LOAD_STATE for us internally:
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*/
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case nir_intrinsic_load_draw_id:
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case nir_intrinsic_load_base_vertex:
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case nir_intrinsic_load_first_vertex:
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case nir_intrinsic_load_base_instance:
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return false;
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default: {
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struct driver_param_info param_info;
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if (!ir3_get_driver_param_info(b->shader, intr, ¶m_info))
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@ -615,7 +615,7 @@ tu6_emit_const(struct tu_cs *cs, uint32_t opcode, enum tu_geom_consts_type type,
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assert(size % 4 == 0);
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dwords = (uint32_t *)&((uint8_t *)dwords)[offset];
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if (block == SB6_VS_SHADER || !cs->device->physical_device->info->a7xx.load_shader_consts_via_preamble) {
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if (!cs->device->physical_device->info->a7xx.load_shader_consts_via_preamble) {
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uint32_t base;
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switch (type) {
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case TU_CONSTS_PRIMITIVE_MAP:
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