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freedreno/a5xx: Set MIN_LAYERSZ on 3D textures like we do on a6xx.

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These fields (TILE_ALL and MIN_LAYERSZ) seem to be the same on a5xx as
a6xx, having looked at some UBWC vs non-UBWC texturator cases.  Setting
MIN_LAYERSZ does fix the 3D fail we see in the CTS.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5127>
This commit is contained in:
Eric Anholt 2020-05-19 16:21:20 -07:00
parent 9f62566ef6
commit 6a154aea0d
3 changed files with 15 additions and 1 deletions
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1
.gitlab-ci/deqp-freedreno-a530-fails.txt
View File

@ -9,7 +9,6 @@ dEQP-GLES2.functional.texture.specification.basic_copytexsubimage2d.2d_luminance
dEQP-GLES2.functional.texture.specification.basic_copytexsubimage2d.2d_rgb
dEQP-GLES2.functional.texture.specification.basic_copytexsubimage2d.2d_rgba
dEQP-GLES3.functional.fbo.blit.rect.nearest_consistency_mag_reverse_dst_y
dEQP-GLES3.functional.texture.specification.texstorage3d.size.3d_57x63x11_2_levels
dEQP-GLES3.functional.transform_feedback.array.interleaved.lines.lowp_float
dEQP-GLES3.functional.transform_feedback.array.interleaved.lines.mediump_int
dEQP-GLES3.functional.transform_feedback.array.interleaved.points.highp_mat3x2

13
src/freedreno/registers/a5xx.xml
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@ -2902,7 +2902,20 @@ different border-color states per texture.. Looks something like:
<bitfield name="TYPE" low="29" high="30" type="a5xx_tex_type"/>
</reg32>
<reg32 offset="3" name="3">
<!--
ARRAY_PITCH is basically LAYERSZ for the first mipmap level, and
for 3d textures (laid out mipmap level first) MIN_LAYERSZ is the
layer size at the point that it stops being reduced moving to
higher (smaller) mipmap levels
-->
<bitfield name="ARRAY_PITCH" low="0" high="13" shr="12" type="uint"/>
<!--
by default levels with w < 16 are linear
TILE_ALL makes all levels have tiling
seems required when using UBWC, since all levels have UBWC (can possibly be disabled?)
-->
<bitfield name="TILE_ALL" pos="27" type="boolean"/>
<bitfield name="MIN_LAYERSZ" low="23" high="26" shr="12"/>
<bitfield name="FLAG" pos="28" type="boolean"/>
</reg32>
<reg32 offset="4" name="4">

2
src/gallium/drivers/freedreno/a5xx/fd5_texture.c
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@ -306,6 +306,8 @@ fd5_sampler_view_create(struct pipe_context *pctx, struct pipe_resource *prsc,
break;
case PIPE_TEXTURE_3D:
so->texconst3 =
A5XX_TEX_CONST_3_MIN_LAYERSZ(
fd_resource_slice(rsc, prsc->last_level)->size0) |
A5XX_TEX_CONST_3_ARRAY_PITCH(slice->size0);
so->texconst5 =
A5XX_TEX_CONST_5_DEPTH(u_minify(prsc->depth0, lvl));