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amd/addrlib: expose HTILE address equations to drivers on GFX10+
Similar to the DCC address equations. Only GFX10+ because this is for copying VRS rates to the HTILE buffer. Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10187>
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@ -2785,6 +2785,10 @@ typedef struct _ADDR2_COMPUTE_HTILE_INFO_OUTPUT
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UINT_32 metaBlkNumPerSlice; ///< Number of metablock within one slice
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ADDR2_META_MIP_INFO* pMipInfo; ///< HTILE mip information
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struct {
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UINT_16* gfx10_bits; /* 72 2-byte elements */
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} equation;
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} ADDR2_COMPUTE_HTILE_INFO_OUTPUT;
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/**
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@ -252,6 +252,14 @@ ADDR_E_RETURNCODE Gfx10Lib::HwlComputeHtileInfo(
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pOut->pMipInfo[0].sliceSize = pOut->sliceSize;
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}
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}
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// Get the HTILE address equation (copied from HtileAddrFromCoord).
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// Note that HTILE doesn't depend on the number of samples.
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const UINT_32 index = m_xmaskBaseIndex;
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const UINT_8* patIdxTable = m_settings.supportRbPlus ? GFX10_HTILE_RBPLUS_PATIDX : GFX10_HTILE_PATIDX;
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ADDR_C_ASSERT(sizeof(GFX10_HTILE_SW_PATTERN[patIdxTable[index]]) == 72 * 2);
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pOut->equation.gfx10_bits = (UINT_16 *)GFX10_HTILE_SW_PATTERN[patIdxTable[index]];
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}
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return ret;
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