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nir: split off some definitions for OpenCL

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we want some enum values on device for NIR->CL bindings. specifically,
src_type/dest_type indices.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32208>
This commit is contained in:
Alyssa Rosenzweig 2024-11-18 16:07:17 -04:00 committed by Marge Bot
parent e3b14481e3
commit 39afffe956
2 changed files with 62 additions and 47 deletions
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48
src/compiler/nir/nir.h
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@ -46,6 +46,7 @@
#include "util/set.h"
#include "util/u_math.h"
#include "util/u_printf.h"
#include "nir_defines.h"
#define XXH_INLINE_ALL
#include <stdio.h>
#include "util/xxhash.h"
@ -1259,53 +1260,6 @@ typedef struct nir_alu_src {
uint8_t swizzle[NIR_MAX_VEC_COMPONENTS];
} nir_alu_src;
/** NIR sized and unsized types
*
* The values in this enum are carefully chosen so that the sized type is
* just the unsized type OR the number of bits.
*/
/* clang-format off */
typedef enum ENUM_PACKED {
nir_type_invalid = 0, /* Not a valid type */
nir_type_int = 2,
nir_type_uint = 4,
nir_type_bool = 6,
nir_type_float = 128,
nir_type_bool1 = 1 | nir_type_bool,
nir_type_bool8 = 8 | nir_type_bool,
nir_type_bool16 = 16 | nir_type_bool,
nir_type_bool32 = 32 | nir_type_bool,
nir_type_int1 = 1 | nir_type_int,
nir_type_int8 = 8 | nir_type_int,
nir_type_int16 = 16 | nir_type_int,
nir_type_int32 = 32 | nir_type_int,
nir_type_int64 = 64 | nir_type_int,
nir_type_uint1 = 1 | nir_type_uint,
nir_type_uint8 = 8 | nir_type_uint,
nir_type_uint16 = 16 | nir_type_uint,
nir_type_uint32 = 32 | nir_type_uint,
nir_type_uint64 = 64 | nir_type_uint,
nir_type_float16 = 16 | nir_type_float,
nir_type_float32 = 32 | nir_type_float,
nir_type_float64 = 64 | nir_type_float,
} nir_alu_type;
/* clang-format on */
#define NIR_ALU_TYPE_SIZE_MASK 0x79
#define NIR_ALU_TYPE_BASE_TYPE_MASK 0x86
static inline unsigned
nir_alu_type_get_type_size(nir_alu_type type)
{
return type & NIR_ALU_TYPE_SIZE_MASK;
}
static inline nir_alu_type
nir_alu_type_get_base_type(nir_alu_type type)
{
return (nir_alu_type)(type & NIR_ALU_TYPE_BASE_TYPE_MASK);
}
nir_alu_type
nir_get_nir_type_for_glsl_base_type(enum glsl_base_type base_type);

61
src/compiler/nir/nir_defines.h Normal file
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@ -0,0 +1,61 @@
/*
* Copyright © 2014 Connor Abbott
* SPDX-License-Identifier: MIT
*/
/*
* This file is split off from nir.h to allow #include'ing these defines from
* OpenCL code.
*/
#ifndef NIR_DEFINES_H
#define NIR_DEFINES_H
/** NIR sized and unsized types
*
* The values in this enum are carefully chosen so that the sized type is
* just the unsized type OR the number of bits.
*/
/* clang-format off */
typedef enum ENUM_PACKED {
nir_type_invalid = 0, /* Not a valid type */
nir_type_int = 2,
nir_type_uint = 4,
nir_type_bool = 6,
nir_type_float = 128,
nir_type_bool1 = 1 | nir_type_bool,
nir_type_bool8 = 8 | nir_type_bool,
nir_type_bool16 = 16 | nir_type_bool,
nir_type_bool32 = 32 | nir_type_bool,
nir_type_int1 = 1 | nir_type_int,
nir_type_int8 = 8 | nir_type_int,
nir_type_int16 = 16 | nir_type_int,
nir_type_int32 = 32 | nir_type_int,
nir_type_int64 = 64 | nir_type_int,
nir_type_uint1 = 1 | nir_type_uint,
nir_type_uint8 = 8 | nir_type_uint,
nir_type_uint16 = 16 | nir_type_uint,
nir_type_uint32 = 32 | nir_type_uint,
nir_type_uint64 = 64 | nir_type_uint,
nir_type_float16 = 16 | nir_type_float,
nir_type_float32 = 32 | nir_type_float,
nir_type_float64 = 64 | nir_type_float,
} nir_alu_type;
/* clang-format on */
#define NIR_ALU_TYPE_SIZE_MASK 0x79
#define NIR_ALU_TYPE_BASE_TYPE_MASK 0x86
static inline unsigned
nir_alu_type_get_type_size(nir_alu_type type)
{
return type & NIR_ALU_TYPE_SIZE_MASK;
}
static inline nir_alu_type
nir_alu_type_get_base_type(nir_alu_type type)
{
return (nir_alu_type)(type & NIR_ALU_TYPE_BASE_TYPE_MASK);
}
#endif