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fix from DRI trunk
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parent
2844285297
commit
2ed4797848
@ -137,7 +137,7 @@ static struct {
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{ 0, 5, "R200_PP_CUBIC_OFFSET_F1_5" },
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{ RADEON_PP_TEX_SIZE_0, 2, "RADEON_PP_TEX_SIZE_0" },
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{ RADEON_PP_TEX_SIZE_1, 2, "RADEON_PP_TEX_SIZE_1" },
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{ RADEON_PP_TEX_SIZE_2, 2, "RADEON_PP_TEX_SIZE_1" },
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{ RADEON_PP_TEX_SIZE_2, 2, "RADEON_PP_TEX_SIZE_2" },
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};
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struct reg_names {
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@ -178,22 +178,22 @@ static struct reg_names reg_names[] = {
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{ RADEON_PP_TXFILTER_2, "RADEON_PP_TXFILTER_2" },
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{ RADEON_PP_TXFORMAT_0, "RADEON_PP_TXFORMAT_0" },
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{ RADEON_PP_TXFORMAT_1, "RADEON_PP_TXFORMAT_1" },
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{ RADEON_PP_TXFORMAT_2, "RADEON_PP_TXFORMAT_3" },
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{ RADEON_PP_TXFORMAT_2, "RADEON_PP_TXFORMAT_2" },
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{ RADEON_PP_TXOFFSET_0, "RADEON_PP_TXOFFSET_0" },
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{ RADEON_PP_TXOFFSET_1, "RADEON_PP_TXOFFSET_1" },
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{ RADEON_PP_TXOFFSET_2, "RADEON_PP_TXOFFSET_3" },
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{ RADEON_PP_TXOFFSET_2, "RADEON_PP_TXOFFSET_2" },
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{ RADEON_PP_TXCBLEND_0, "RADEON_PP_TXCBLEND_0" },
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{ RADEON_PP_TXCBLEND_1, "RADEON_PP_TXCBLEND_1" },
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{ RADEON_PP_TXCBLEND_2, "RADEON_PP_TXCBLEND_3" },
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{ RADEON_PP_TXCBLEND_2, "RADEON_PP_TXCBLEND_2" },
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{ RADEON_PP_TXABLEND_0, "RADEON_PP_TXABLEND_0" },
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{ RADEON_PP_TXABLEND_1, "RADEON_PP_TXABLEND_1" },
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{ RADEON_PP_TXABLEND_2, "RADEON_PP_TXABLEND_3" },
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{ RADEON_PP_TXABLEND_2, "RADEON_PP_TXABLEND_2" },
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{ RADEON_PP_TFACTOR_0, "RADEON_PP_TFACTOR_0" },
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{ RADEON_PP_TFACTOR_1, "RADEON_PP_TFACTOR_1" },
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{ RADEON_PP_TFACTOR_2, "RADEON_PP_TFACTOR_3" },
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{ RADEON_PP_TFACTOR_2, "RADEON_PP_TFACTOR_2" },
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{ RADEON_PP_BORDER_COLOR_0, "RADEON_PP_BORDER_COLOR_0" },
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{ RADEON_PP_BORDER_COLOR_1, "RADEON_PP_BORDER_COLOR_1" },
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{ RADEON_PP_BORDER_COLOR_2, "RADEON_PP_BORDER_COLOR_3" },
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{ RADEON_PP_BORDER_COLOR_2, "RADEON_PP_BORDER_COLOR_2" },
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{ RADEON_SE_ZBIAS_FACTOR, "RADEON_SE_ZBIAS_FACTOR" },
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{ RADEON_SE_ZBIAS_CONSTANT, "RADEON_SE_ZBIAS_CONSTANT" },
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{ RADEON_SE_TCL_OUTPUT_VTX_FMT, "RADEON_SE_TCL_OUTPUT_VTXFMT" },
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