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synced 2024-12-11 19:24:26 +08:00
merge i830 DRI driver from DRI trunk
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a5a7d208c4
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@ -1248,11 +1248,14 @@ static void i830Enable(GLcontext *ctx, GLenum cap, GLboolean state)
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if (imesa->hw_stencil) {
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I830_STATECHANGE(imesa, I830_UPLOAD_CTX);
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imesa->Setup[I830_CTXREG_ENABLES_1] &= ~ENABLE_STENCIL_TEST;
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imesa->Setup[I830_CTXREG_ENABLES_2] &= ~ENABLE_STENCIL_WRITE;
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if (state) {
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imesa->Setup[I830_CTXREG_ENABLES_1] |= ENABLE_STENCIL_TEST;
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imesa->Setup[I830_CTXREG_ENABLES_2] |= ENABLE_STENCIL_WRITE;
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} else {
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imesa->Setup[I830_CTXREG_ENABLES_1] |= DISABLE_STENCIL_TEST;
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imesa->Setup[I830_CTXREG_ENABLES_2] |= DISABLE_STENCIL_WRITE;
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}
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} else {
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FALLBACK( imesa, I830_FALLBACK_STENCIL, state );
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@ -62,7 +62,7 @@ static void i830SetTexImages( i830ContextPtr imesa,
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GLuint total_height, pitch, i, textureFormat;
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i830TextureObjectPtr t = (i830TextureObjectPtr) tObj->DriverData;
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const struct gl_texture_image *baseImage = tObj->Image[tObj->BaseLevel];
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GLint firstLevel, lastLevel, numLevels;
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GLint numLevels;
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switch( baseImage->TexFormat->MesaFormat ) {
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case MESA_FORMAT_L8:
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@ -119,52 +119,27 @@ static void i830SetTexImages( i830ContextPtr imesa,
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}
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/* Compute which mipmap levels we really want to send to the hardware.
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* This depends on the base image size, GL_TEXTURE_MIN_LOD,
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* GL_TEXTURE_MAX_LOD, GL_TEXTURE_BASE_LEVEL, and GL_TEXTURE_MAX_LEVEL.
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* Yes, this looks overly complicated, but it's all needed.
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*/
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switch (tObj->Target) {
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case GL_TEXTURE_1D:
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case GL_TEXTURE_2D:
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firstLevel = tObj->BaseLevel + (GLint) (tObj->MinLod + 0.5);
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firstLevel = MAX2(firstLevel, tObj->BaseLevel);
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lastLevel = tObj->BaseLevel + (GLint) (tObj->MaxLod + 0.5);
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lastLevel = MAX2(lastLevel, tObj->BaseLevel);
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lastLevel = MIN2(lastLevel, tObj->BaseLevel + baseImage->MaxLog2);
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lastLevel = MIN2(lastLevel, tObj->MaxLevel);
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lastLevel = MAX2(firstLevel, lastLevel); /* need at least one level */
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break;
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case GL_TEXTURE_RECTANGLE_NV:
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firstLevel = lastLevel = 0;
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break;
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default:
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fprintf(stderr, "%s: bad target %s\n", __FUNCTION__,
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_mesa_lookup_enum_by_nr(tObj->Target));
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return;
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}
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/* save these values */
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t->base.firstLevel = firstLevel;
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t->base.lastLevel = lastLevel;
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driCalculateTextureFirstLastLevel( (driTextureObject *) t );
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/* Figure out the amount of memory required to hold all the mipmap
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* levels. Choose the smallest pitch to accomodate the largest
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* mipmap:
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*/
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numLevels = lastLevel - firstLevel + 1;
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numLevels = t->base.lastLevel - t->base.firstLevel + 1;
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/* Pitch would be subject to additional rules if texture memory were
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* tiled. Currently it isn't.
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*/
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if (0) {
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pitch = 128;
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while (pitch < tObj->Image[firstLevel]->Width * t->texelBytes)
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while (pitch < tObj->Image[t->base.firstLevel]->Width * t->texelBytes)
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pitch *= 2;
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}
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else {
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pitch = tObj->Image[firstLevel]->Width * t->texelBytes;
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pitch = tObj->Image[t->base.firstLevel]->Width * t->texelBytes;
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pitch = (pitch + 3) & ~3;
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}
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@ -173,7 +148,7 @@ static void i830SetTexImages( i830ContextPtr imesa,
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* lines required:
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*/
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for ( total_height = i = 0 ; i < numLevels ; i++ ) {
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t->image[0][i].image = tObj->Image[firstLevel + i];
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t->image[0][i].image = tObj->Image[t->base.firstLevel + i];
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if (!t->image[0][i].image)
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break;
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@ -185,8 +160,8 @@ static void i830SetTexImages( i830ContextPtr imesa,
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t->Pitch = pitch;
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t->base.totalSize = total_height*pitch;
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t->Setup[I830_TEXREG_TM0S1] =
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(((tObj->Image[firstLevel]->Height - 1) << TM0S1_HEIGHT_SHIFT) |
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((tObj->Image[firstLevel]->Width - 1) << TM0S1_WIDTH_SHIFT) |
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(((tObj->Image[t->base.firstLevel]->Height - 1) << TM0S1_HEIGHT_SHIFT) |
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((tObj->Image[t->base.firstLevel]->Width - 1) << TM0S1_WIDTH_SHIFT) |
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textureFormat);
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t->Setup[I830_TEXREG_TM0S2] =
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((((pitch / 4) - 1) << TM0S2_PITCH_SHIFT));
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