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radv: enable DCC stores on RDNA2

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It seems this gives 2-3% improvements most of the time. This also
enables DCC for concurrent images.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10454>
This commit is contained in:
Samuel Pitoiset 2021-04-26 13:46:58 +02:00 committed by Marge Bot
parent 7bd88dfaa2
commit 1bbbdfe590
4 changed files with 2 additions and 12 deletions
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2
docs/envvars.rst
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@ -633,8 +633,6 @@ RADV driver environment variables
enable wave32 for compute shaders (GFX10+)
``dccmsaa``
enable DCC for MSAA images
``dccstores``
enable DCC for storage images (for performance testing on GFX10.3 only)
``dfsm``
enable DFSM
``gewave32``

1
src/amd/vulkan/radv_debug.h
View File

@ -74,7 +74,6 @@ enum {
RADV_PERFTEST_DFSM = 1u << 6,
RADV_PERFTEST_NO_SAM = 1u << 7,
RADV_PERFTEST_SAM = 1u << 8,
RADV_PERFTEST_DCC_STORES = 1u << 9,
};
bool radv_init_trace(struct radv_device *device);

2
src/amd/vulkan/radv_device.c
View File

@ -816,7 +816,7 @@ static const struct debug_control radv_perftest_options[] = {
{"cswave32", RADV_PERFTEST_CS_WAVE_32}, {"pswave32", RADV_PERFTEST_PS_WAVE_32},
{"gewave32", RADV_PERFTEST_GE_WAVE_32}, {"dfsm", RADV_PERFTEST_DFSM},
{"nosam", RADV_PERFTEST_NO_SAM}, {"sam", RADV_PERFTEST_SAM},
{"dccstores", RADV_PERFTEST_DCC_STORES}, {NULL, 0}};
{NULL, 0}};
const char *
radv_get_perftest_option_name(int id)

9
src/amd/vulkan/radv_image.c
View File

@ -276,14 +276,7 @@ radv_use_dcc_for_image(struct radv_device *device, const struct radv_image *imag
bool
radv_image_use_dcc_image_stores(const struct radv_device *device, const struct radv_image *image)
{
/*
* TODO: Enable on more HW. DIMGREY and VANGOGH need a workaround and
* we need more perf analysis.
* https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6796#note_643853
*/
return device->physical_device->rad_info.chip_class == GFX10 ||
(device->physical_device->rad_info.chip_class == GFX10_3 &&
(device->instance->perftest_flags & RADV_PERFTEST_DCC_STORES));
return device->physical_device->rad_info.chip_class >= GFX10;
}
/*