mirror of
https://gitlab.freedesktop.org/mesa/mesa.git
synced 2024-12-03 07:04:02 +08:00
nir: gather all IO info from IO intrinsics
nir_io_add_const_offset_to_base will shrink num_slots, so it's better to call it before nir_shader_gather_info. Reviewed-by: Eric Anholt <eric@anholt.net> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6442>
This commit is contained in:
parent
502abfce7f
commit
17af07024d
@ -297,6 +297,14 @@ static void
|
|||||||
gather_intrinsic_info(nir_intrinsic_instr *instr, nir_shader *shader,
|
gather_intrinsic_info(nir_intrinsic_instr *instr, nir_shader *shader,
|
||||||
void *dead_ctx)
|
void *dead_ctx)
|
||||||
{
|
{
|
||||||
|
unsigned slot_mask = 0;
|
||||||
|
|
||||||
|
if (nir_intrinsic_infos[instr->intrinsic].index_map[NIR_INTRINSIC_IO_SEMANTICS] > 0) {
|
||||||
|
nir_io_semantics semantics = nir_intrinsic_io_semantics(instr);
|
||||||
|
|
||||||
|
slot_mask = BITFIELD64_RANGE(semantics.location, semantics.num_slots);
|
||||||
|
}
|
||||||
|
|
||||||
switch (instr->intrinsic) {
|
switch (instr->intrinsic) {
|
||||||
case nir_intrinsic_demote:
|
case nir_intrinsic_demote:
|
||||||
case nir_intrinsic_demote_if:
|
case nir_intrinsic_demote_if:
|
||||||
@ -345,6 +353,41 @@ gather_intrinsic_info(nir_intrinsic_instr *instr, nir_shader *shader,
|
|||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
case nir_intrinsic_load_input:
|
||||||
|
if (shader->info.stage == MESA_SHADER_TESS_EVAL)
|
||||||
|
shader->info.patch_inputs_read |= slot_mask;
|
||||||
|
else
|
||||||
|
shader->info.inputs_read |= slot_mask;
|
||||||
|
break;
|
||||||
|
|
||||||
|
case nir_intrinsic_load_per_vertex_input:
|
||||||
|
case nir_intrinsic_load_input_vertex:
|
||||||
|
case nir_intrinsic_load_interpolated_input:
|
||||||
|
shader->info.inputs_read |= slot_mask;
|
||||||
|
break;
|
||||||
|
|
||||||
|
case nir_intrinsic_load_output:
|
||||||
|
if (shader->info.stage == MESA_SHADER_TESS_CTRL)
|
||||||
|
shader->info.patch_outputs_read |= slot_mask;
|
||||||
|
else
|
||||||
|
shader->info.outputs_read |= slot_mask;
|
||||||
|
break;
|
||||||
|
|
||||||
|
case nir_intrinsic_load_per_vertex_output:
|
||||||
|
shader->info.outputs_read |= slot_mask;
|
||||||
|
break;
|
||||||
|
|
||||||
|
case nir_intrinsic_store_output:
|
||||||
|
if (shader->info.stage == MESA_SHADER_TESS_CTRL)
|
||||||
|
shader->info.patch_outputs_written |= slot_mask;
|
||||||
|
else
|
||||||
|
shader->info.outputs_written |= slot_mask;
|
||||||
|
break;
|
||||||
|
|
||||||
|
case nir_intrinsic_store_per_vertex_output:
|
||||||
|
shader->info.outputs_written |= slot_mask;
|
||||||
|
break;
|
||||||
|
|
||||||
case nir_intrinsic_load_draw_id:
|
case nir_intrinsic_load_draw_id:
|
||||||
case nir_intrinsic_load_frag_coord:
|
case nir_intrinsic_load_frag_coord:
|
||||||
case nir_intrinsic_load_point_coord:
|
case nir_intrinsic_load_point_coord:
|
||||||
|
Loading…
Reference in New Issue
Block a user